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targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/system_stm32l4xx.c@637:ed69428d4850, 2015-12-22 (annotated)

Committer:
jaerts
Date:
Tue Dec 22 13:22:16 2015 +0000
Revision:
637:ed69428d4850
Parent:
622:db79ecd649d0 
Add very shady LPC1768 CAN Filter implementation

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 622:db79ecd649d0 1 /**
mbed_official 622:db79ecd649d0 2 ******************************************************************************
mbed_official 622:db79ecd649d0 3 * @file system_stm32l4xx.c
mbed_official 622:db79ecd649d0 4 * @author MCD Application Team
mbed_official 622:db79ecd649d0 5 * @version V1.0.0
mbed_official 622:db79ecd649d0 6 * @date 26-June-2015
mbed_official 622:db79ecd649d0 7 * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
mbed_official 622:db79ecd649d0 8 *
mbed_official 622:db79ecd649d0 9 * This file provides two functions and one global variable to be called from
mbed_official 622:db79ecd649d0 10 * user application:
mbed_official 622:db79ecd649d0 11 * - SystemInit(): This function is called at startup just after reset and
mbed_official 622:db79ecd649d0 12 * before branch to main program. This call is made inside
mbed_official 622:db79ecd649d0 13 * the "startup_stm32l4xx.s" file.
mbed_official 622:db79ecd649d0 14 *
mbed_official 622:db79ecd649d0 15 * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
mbed_official 622:db79ecd649d0 16 * by the user application to setup the SysTick
mbed_official 622:db79ecd649d0 17 * timer or configure other parameters.
mbed_official 622:db79ecd649d0 18 *
mbed_official 622:db79ecd649d0 19 * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
mbed_official 622:db79ecd649d0 20 * be called whenever the core clock is changed
mbed_official 622:db79ecd649d0 21 * during program execution.
mbed_official 622:db79ecd649d0 22 *
mbed_official 622:db79ecd649d0 23 * After each device reset the MSI (4 MHz) is used as system clock source.
mbed_official 622:db79ecd649d0 24 * Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to
mbed_official 622:db79ecd649d0 25 * configure the system clock before to branch to main program.
mbed_official 622:db79ecd649d0 26 *
mbed_official 622:db79ecd649d0 27 * This file configures the system clock as follows:
mbed_official 622:db79ecd649d0 28 *=============================================================================
mbed_official 622:db79ecd649d0 29 * System clock source | 1- PLL_HSE_EXTC | 3- PLL_HSI
mbed_official 622:db79ecd649d0 30 * | (external 8 MHz clock) | (internal 16 MHz)
mbed_official 622:db79ecd649d0 31 * | 2- PLL_HSE_XTAL | or PLL_MSI
mbed_official 622:db79ecd649d0 32 * | (external 8 MHz xtal) | (internal 4 MHz)
mbed_official 622:db79ecd649d0 33 *-----------------------------------------------------------------------------
mbed_official 622:db79ecd649d0 34 * SYSCLK(MHz) | 48 | 80
mbed_official 622:db79ecd649d0 35 *-----------------------------------------------------------------------------
mbed_official 622:db79ecd649d0 36 * AHBCLK (MHz) | 48 | 80
mbed_official 622:db79ecd649d0 37 *-----------------------------------------------------------------------------
mbed_official 622:db79ecd649d0 38 * APB1CLK (MHz) | 48 | 80
mbed_official 622:db79ecd649d0 39 *-----------------------------------------------------------------------------
mbed_official 622:db79ecd649d0 40 * APB2CLK (MHz) | 48 | 80
mbed_official 622:db79ecd649d0 41 *-----------------------------------------------------------------------------
mbed_official 622:db79ecd649d0 42 * USB capable (48 MHz precise clock) | YES | NO
mbed_official 622:db79ecd649d0 43 *-----------------------------------------------------------------------------
mbed_official 622:db79ecd649d0 44 *=============================================================================
mbed_official 622:db79ecd649d0 45 ******************************************************************************
mbed_official 622:db79ecd649d0 46 * @attention
mbed_official 622:db79ecd649d0 47 *
mbed_official 622:db79ecd649d0 48 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 622:db79ecd649d0 49 *
mbed_official 622:db79ecd649d0 50 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 622:db79ecd649d0 51 * are permitted provided that the following conditions are met:
mbed_official 622:db79ecd649d0 52 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 622:db79ecd649d0 53 * this list of conditions and the following disclaimer.
mbed_official 622:db79ecd649d0 54 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 622:db79ecd649d0 55 * this list of conditions and the following disclaimer in the documentation
mbed_official 622:db79ecd649d0 56 * and/or other materials provided with the distribution.
mbed_official 622:db79ecd649d0 57 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 622:db79ecd649d0 58 * may be used to endorse or promote products derived from this software
mbed_official 622:db79ecd649d0 59 * without specific prior written permission.
mbed_official 622:db79ecd649d0 60 *
mbed_official 622:db79ecd649d0 61 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 622:db79ecd649d0 62 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 622:db79ecd649d0 63 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 622:db79ecd649d0 64 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 622:db79ecd649d0 65 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 622:db79ecd649d0 66 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 622:db79ecd649d0 67 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 622:db79ecd649d0 68 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 622:db79ecd649d0 69 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 622:db79ecd649d0 70 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 622:db79ecd649d0 71 *
mbed_official 622:db79ecd649d0 72 ******************************************************************************
mbed_official 622:db79ecd649d0 73 */
mbed_official 622:db79ecd649d0 74
mbed_official 622:db79ecd649d0 75 /** @addtogroup CMSIS
mbed_official 622:db79ecd649d0 76 * @{
mbed_official 622:db79ecd649d0 77 */
mbed_official 622:db79ecd649d0 78
mbed_official 622:db79ecd649d0 79 /** @addtogroup stm32l4xx_system
mbed_official 622:db79ecd649d0 80 * @{
mbed_official 622:db79ecd649d0 81 */
mbed_official 622:db79ecd649d0 82
mbed_official 622:db79ecd649d0 83 /** @addtogroup STM32L4xx_System_Private_Includes
mbed_official 622:db79ecd649d0 84 * @{
mbed_official 622:db79ecd649d0 85 */
mbed_official 622:db79ecd649d0 86
mbed_official 622:db79ecd649d0 87 #include "stm32l4xx.h"
mbed_official 622:db79ecd649d0 88 #include "hal_tick.h"
mbed_official 622:db79ecd649d0 89
mbed_official 622:db79ecd649d0 90 #if !defined (HSE_VALUE)
mbed_official 622:db79ecd649d0 91 #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
mbed_official 622:db79ecd649d0 92 #endif /* HSE_VALUE */
mbed_official 622:db79ecd649d0 93
mbed_official 622:db79ecd649d0 94 #if !defined (MSI_VALUE)
mbed_official 622:db79ecd649d0 95 #define MSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
mbed_official 622:db79ecd649d0 96 #endif /* MSI_VALUE */
mbed_official 622:db79ecd649d0 97
mbed_official 622:db79ecd649d0 98 #if !defined (HSI_VALUE)
mbed_official 622:db79ecd649d0 99 #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
mbed_official 622:db79ecd649d0 100 #endif /* HSI_VALUE */
mbed_official 622:db79ecd649d0 101
mbed_official 622:db79ecd649d0 102 /**
mbed_official 622:db79ecd649d0 103 * @}
mbed_official 622:db79ecd649d0 104 */
mbed_official 622:db79ecd649d0 105
mbed_official 622:db79ecd649d0 106 /** @addtogroup STM32L4xx_System_Private_TypesDefinitions
mbed_official 622:db79ecd649d0 107 * @{
mbed_official 622:db79ecd649d0 108 */
mbed_official 622:db79ecd649d0 109
mbed_official 622:db79ecd649d0 110 /**
mbed_official 622:db79ecd649d0 111 * @}
mbed_official 622:db79ecd649d0 112 */
mbed_official 622:db79ecd649d0 113
mbed_official 622:db79ecd649d0 114 /** @addtogroup STM32L4xx_System_Private_Defines
mbed_official 622:db79ecd649d0 115 * @{
mbed_official 622:db79ecd649d0 116 */
mbed_official 622:db79ecd649d0 117
mbed_official 622:db79ecd649d0 118 /************************* Miscellaneous Configuration ************************/
mbed_official 622:db79ecd649d0 119 /*!< Uncomment the following line if you need to relocate your vector Table in
mbed_official 622:db79ecd649d0 120 Internal SRAM. */
mbed_official 622:db79ecd649d0 121 /* #define VECT_TAB_SRAM */
mbed_official 622:db79ecd649d0 122 #define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
mbed_official 622:db79ecd649d0 123 This value must be a multiple of 0x200. */
mbed_official 622:db79ecd649d0 124 /******************************************************************************/
mbed_official 622:db79ecd649d0 125 /**
mbed_official 622:db79ecd649d0 126 * @}
mbed_official 622:db79ecd649d0 127 */
mbed_official 622:db79ecd649d0 128
mbed_official 622:db79ecd649d0 129 /** @addtogroup STM32L4xx_System_Private_Macros
mbed_official 622:db79ecd649d0 130 * @{
mbed_official 622:db79ecd649d0 131 */
mbed_official 622:db79ecd649d0 132
mbed_official 622:db79ecd649d0 133 // Select the clock sources (default is PLL_MSI) to start with (0=OFF, 1=ON)
mbed_official 622:db79ecd649d0 134 #define USE_PLL_HSE_EXTC (1) // Use external clock
mbed_official 622:db79ecd649d0 135 #define USE_PLL_HSE_XTAL (0) // Use external xtal
mbed_official 622:db79ecd649d0 136 #define USE_PLL_HSI (0) // Use HSI/MSI internal clock (0=MSI, 1=HSI)
mbed_official 622:db79ecd649d0 137 #define DEBUG_MCO (0) // Output the MCO on PA8 for debugging (0=OFF, 1=SYSCLK, 2=HSE, 3=HSI, 4=MSI)
mbed_official 622:db79ecd649d0 138 /**
mbed_official 622:db79ecd649d0 139 * @}
mbed_official 622:db79ecd649d0 140 */
mbed_official 622:db79ecd649d0 141
mbed_official 622:db79ecd649d0 142 /** @addtogroup STM32L4xx_System_Private_Variables
mbed_official 622:db79ecd649d0 143 * @{
mbed_official 622:db79ecd649d0 144 */
mbed_official 622:db79ecd649d0 145 /* This variable is updated in three ways:
mbed_official 622:db79ecd649d0 146 1) by calling CMSIS function SystemCoreClockUpdate()
mbed_official 622:db79ecd649d0 147 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
mbed_official 622:db79ecd649d0 148 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
mbed_official 622:db79ecd649d0 149 Note: If you use this function to configure the system clock; then there
mbed_official 622:db79ecd649d0 150 is no need to call the 2 first functions listed above, since SystemCoreClock
mbed_official 622:db79ecd649d0 151 variable is updated automatically.
mbed_official 622:db79ecd649d0 152 */
mbed_official 622:db79ecd649d0 153 uint32_t SystemCoreClock = 4000000;
mbed_official 622:db79ecd649d0 154
mbed_official 622:db79ecd649d0 155 const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
mbed_official 622:db79ecd649d0 156 const uint32_t MSIRangeTable[12] = {100000, 200000, 400000, 800000, 1000000, 2000000, \
mbed_official 622:db79ecd649d0 157 4000000, 8000000, 16000000, 24000000, 32000000, 48000000};
mbed_official 622:db79ecd649d0 158 /**
mbed_official 622:db79ecd649d0 159 * @}
mbed_official 622:db79ecd649d0 160 */
mbed_official 622:db79ecd649d0 161
mbed_official 622:db79ecd649d0 162 /** @addtogroup STM32L4xx_System_Private_FunctionPrototypes
mbed_official 622:db79ecd649d0 163 * @{
mbed_official 622:db79ecd649d0 164 */
mbed_official 622:db79ecd649d0 165
mbed_official 622:db79ecd649d0 166 #if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
mbed_official 622:db79ecd649d0 167 uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
mbed_official 622:db79ecd649d0 168 #endif
mbed_official 622:db79ecd649d0 169
mbed_official 622:db79ecd649d0 170 #if (USE_PLL_HSI != 0)
mbed_official 622:db79ecd649d0 171 uint8_t SetSysClock_PLL_HSI(void);
mbed_official 622:db79ecd649d0 172 #endif
mbed_official 622:db79ecd649d0 173
mbed_official 622:db79ecd649d0 174 uint8_t SetSysClock_PLL_MSI(void);
mbed_official 622:db79ecd649d0 175
mbed_official 622:db79ecd649d0 176 /**
mbed_official 622:db79ecd649d0 177 * @}
mbed_official 622:db79ecd649d0 178 */
mbed_official 622:db79ecd649d0 179
mbed_official 622:db79ecd649d0 180 /** @addtogroup STM32L4xx_System_Private_Functions
mbed_official 622:db79ecd649d0 181 * @{
mbed_official 622:db79ecd649d0 182 */
mbed_official 622:db79ecd649d0 183
mbed_official 622:db79ecd649d0 184 /**
mbed_official 622:db79ecd649d0 185 * @brief Setup the microcontroller system.
mbed_official 622:db79ecd649d0 186 * @param None
mbed_official 622:db79ecd649d0 187 * @retval None
mbed_official 622:db79ecd649d0 188 */
mbed_official 622:db79ecd649d0 189
mbed_official 622:db79ecd649d0 190 void SystemInit(void)
mbed_official 622:db79ecd649d0 191 {
mbed_official 622:db79ecd649d0 192 /* FPU settings ------------------------------------------------------------*/
mbed_official 622:db79ecd649d0 193 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
mbed_official 622:db79ecd649d0 194 SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
mbed_official 622:db79ecd649d0 195 #endif
mbed_official 622:db79ecd649d0 196 /* Reset the RCC clock configuration to the default reset state ------------*/
mbed_official 622:db79ecd649d0 197 /* Set MSION bit */
mbed_official 622:db79ecd649d0 198 RCC->CR |= RCC_CR_MSION;
mbed_official 622:db79ecd649d0 199
mbed_official 622:db79ecd649d0 200 /* Reset CFGR register */
mbed_official 622:db79ecd649d0 201 RCC->CFGR = 0x00000000;
mbed_official 622:db79ecd649d0 202
mbed_official 622:db79ecd649d0 203 /* Reset HSEON, CSSON , HSION, and PLLON bits */
mbed_official 622:db79ecd649d0 204 RCC->CR &= (uint32_t)0xEAF6FFFF;
mbed_official 622:db79ecd649d0 205
mbed_official 622:db79ecd649d0 206 /* Reset PLLCFGR register */
mbed_official 622:db79ecd649d0 207 RCC->PLLCFGR = 0x00000800;
mbed_official 622:db79ecd649d0 208
mbed_official 622:db79ecd649d0 209 /* Reset HSEBYP bit */
mbed_official 622:db79ecd649d0 210 RCC->CR &= (uint32_t)0xFFFBFFFF;
mbed_official 622:db79ecd649d0 211
mbed_official 622:db79ecd649d0 212 /* Disable all interrupts */
mbed_official 622:db79ecd649d0 213 RCC->CIER = 0x00000000;
mbed_official 622:db79ecd649d0 214
mbed_official 622:db79ecd649d0 215 /* Configure the Vector Table location add offset address ------------------*/
mbed_official 622:db79ecd649d0 216 #ifdef VECT_TAB_SRAM
mbed_official 622:db79ecd649d0 217 SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
mbed_official 622:db79ecd649d0 218 #else
mbed_official 622:db79ecd649d0 219 SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
mbed_official 622:db79ecd649d0 220 #endif
mbed_official 622:db79ecd649d0 221
mbed_official 622:db79ecd649d0 222 /* Configure the Cube driver */
mbed_official 622:db79ecd649d0 223 SystemCoreClock = MSI_VALUE; // At this stage the MSI is used as system clock
mbed_official 622:db79ecd649d0 224 HAL_Init();
mbed_official 622:db79ecd649d0 225
mbed_official 622:db79ecd649d0 226 /* Configure the System clock source, PLL Multiplier and Divider factors,
mbed_official 622:db79ecd649d0 227 AHB/APBx prescalers and Flash settings */
mbed_official 622:db79ecd649d0 228 SetSysClock();
mbed_official 622:db79ecd649d0 229
mbed_official 622:db79ecd649d0 230 /* Reset the timer to avoid issues after the RAM initialization */
mbed_official 622:db79ecd649d0 231 TIM_MST_RESET_ON;
mbed_official 622:db79ecd649d0 232 TIM_MST_RESET_OFF;
mbed_official 622:db79ecd649d0 233 }
mbed_official 622:db79ecd649d0 234
mbed_official 622:db79ecd649d0 235 /**
mbed_official 622:db79ecd649d0 236 * @brief Update SystemCoreClock variable according to Clock Register Values.
mbed_official 622:db79ecd649d0 237 * The SystemCoreClock variable contains the core clock (HCLK), it can
mbed_official 622:db79ecd649d0 238 * be used by the user application to setup the SysTick timer or configure
mbed_official 622:db79ecd649d0 239 * other parameters.
mbed_official 622:db79ecd649d0 240 *
mbed_official 622:db79ecd649d0 241 * @note Each time the core clock (HCLK) changes, this function must be called
mbed_official 622:db79ecd649d0 242 * to update SystemCoreClock variable value. Otherwise, any configuration
mbed_official 622:db79ecd649d0 243 * based on this variable will be incorrect.
mbed_official 622:db79ecd649d0 244 *
mbed_official 622:db79ecd649d0 245 * @note - The system frequency computed by this function is not the real
mbed_official 622:db79ecd649d0 246 * frequency in the chip. It is calculated based on the predefined
mbed_official 622:db79ecd649d0 247 * constant and the selected clock source:
mbed_official 622:db79ecd649d0 248 *
mbed_official 622:db79ecd649d0 249 * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*)
mbed_official 622:db79ecd649d0 250 *
mbed_official 622:db79ecd649d0 251 * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
mbed_official 622:db79ecd649d0 252 *
mbed_official 622:db79ecd649d0 253 * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
mbed_official 622:db79ecd649d0 254 *
mbed_official 622:db79ecd649d0 255 * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
mbed_official 622:db79ecd649d0 256 * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors.
mbed_official 622:db79ecd649d0 257 *
mbed_official 622:db79ecd649d0 258 * (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value
mbed_official 622:db79ecd649d0 259 * 4 MHz) but the real value may vary depending on the variations
mbed_official 622:db79ecd649d0 260 * in voltage and temperature.
mbed_official 622:db79ecd649d0 261 *
mbed_official 622:db79ecd649d0 262 * (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value
mbed_official 622:db79ecd649d0 263 * 16 MHz) but the real value may vary depending on the variations
mbed_official 622:db79ecd649d0 264 * in voltage and temperature.
mbed_official 622:db79ecd649d0 265 *
mbed_official 622:db79ecd649d0 266 * (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value
mbed_official 622:db79ecd649d0 267 * 8 MHz), user has to ensure that HSE_VALUE is same as the real
mbed_official 622:db79ecd649d0 268 * frequency of the crystal used. Otherwise, this function may
mbed_official 622:db79ecd649d0 269 * have wrong result.
mbed_official 622:db79ecd649d0 270 *
mbed_official 622:db79ecd649d0 271 * - The result of this function could be not correct when using fractional
mbed_official 622:db79ecd649d0 272 * value for HSE crystal.
mbed_official 622:db79ecd649d0 273 *
mbed_official 622:db79ecd649d0 274 * @param None
mbed_official 622:db79ecd649d0 275 * @retval None
mbed_official 622:db79ecd649d0 276 */
mbed_official 622:db79ecd649d0 277 void SystemCoreClockUpdate(void)
mbed_official 622:db79ecd649d0 278 {
mbed_official 622:db79ecd649d0 279 uint32_t tmp = 0, msirange = 0, pllvco = 0, pllr = 2, pllsource = 0, pllm = 2;
mbed_official 622:db79ecd649d0 280
mbed_official 622:db79ecd649d0 281 /* Get MSI Range frequency--------------------------------------------------*/
mbed_official 622:db79ecd649d0 282 if((RCC->CR & RCC_CR_MSIRGSEL) == RESET)
mbed_official 622:db79ecd649d0 283 { /* MSISRANGE from RCC_CSR applies */
mbed_official 622:db79ecd649d0 284 msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8;
mbed_official 622:db79ecd649d0 285 }
mbed_official 622:db79ecd649d0 286 else
mbed_official 622:db79ecd649d0 287 { /* MSIRANGE from RCC_CR applies */
mbed_official 622:db79ecd649d0 288 msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4;
mbed_official 622:db79ecd649d0 289 }
mbed_official 622:db79ecd649d0 290 /*MSI frequency range in HZ*/
mbed_official 622:db79ecd649d0 291 msirange = MSIRangeTable[msirange];
mbed_official 622:db79ecd649d0 292
mbed_official 622:db79ecd649d0 293 /* Get SYSCLK source -------------------------------------------------------*/
mbed_official 622:db79ecd649d0 294 switch (RCC->CFGR & RCC_CFGR_SWS)
mbed_official 622:db79ecd649d0 295 {
mbed_official 622:db79ecd649d0 296 case 0x00: /* MSI used as system clock source */
mbed_official 622:db79ecd649d0 297 SystemCoreClock = msirange;
mbed_official 622:db79ecd649d0 298 break;
mbed_official 622:db79ecd649d0 299
mbed_official 622:db79ecd649d0 300 case 0x04: /* HSI used as system clock source */
mbed_official 622:db79ecd649d0 301 SystemCoreClock = HSI_VALUE;
mbed_official 622:db79ecd649d0 302 break;
mbed_official 622:db79ecd649d0 303
mbed_official 622:db79ecd649d0 304 case 0x08: /* HSE used as system clock source */
mbed_official 622:db79ecd649d0 305 SystemCoreClock = HSE_VALUE;
mbed_official 622:db79ecd649d0 306 break;
mbed_official 622:db79ecd649d0 307
mbed_official 622:db79ecd649d0 308 case 0x0C: /* PLL used as system clock source */
mbed_official 622:db79ecd649d0 309 /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
mbed_official 622:db79ecd649d0 310 SYSCLK = PLL_VCO / PLLR
mbed_official 622:db79ecd649d0 311 */
mbed_official 622:db79ecd649d0 312 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
mbed_official 622:db79ecd649d0 313 pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1 ;
mbed_official 622:db79ecd649d0 314
mbed_official 622:db79ecd649d0 315 switch (pllsource)
mbed_official 622:db79ecd649d0 316 {
mbed_official 622:db79ecd649d0 317 case 0x02: /* HSI used as PLL clock source */
mbed_official 622:db79ecd649d0 318 pllvco = (HSI_VALUE / pllm);
mbed_official 622:db79ecd649d0 319 break;
mbed_official 622:db79ecd649d0 320
mbed_official 622:db79ecd649d0 321 case 0x03: /* HSE used as PLL clock source */
mbed_official 622:db79ecd649d0 322 pllvco = (HSE_VALUE / pllm);
mbed_official 622:db79ecd649d0 323 break;
mbed_official 622:db79ecd649d0 324
mbed_official 622:db79ecd649d0 325 default: /* MSI used as PLL clock source */
mbed_official 622:db79ecd649d0 326 pllvco = (msirange / pllm);
mbed_official 622:db79ecd649d0 327 break;
mbed_official 622:db79ecd649d0 328 }
mbed_official 622:db79ecd649d0 329 pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
mbed_official 622:db79ecd649d0 330 pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1) * 2;
mbed_official 622:db79ecd649d0 331 SystemCoreClock = pllvco/pllr;
mbed_official 622:db79ecd649d0 332 break;
mbed_official 622:db79ecd649d0 333
mbed_official 622:db79ecd649d0 334 default:
mbed_official 622:db79ecd649d0 335 SystemCoreClock = msirange;
mbed_official 622:db79ecd649d0 336 break;
mbed_official 622:db79ecd649d0 337 }
mbed_official 622:db79ecd649d0 338 /* Compute HCLK clock frequency --------------------------------------------*/
mbed_official 622:db79ecd649d0 339 /* Get HCLK prescaler */
mbed_official 622:db79ecd649d0 340 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
mbed_official 622:db79ecd649d0 341 /* HCLK clock frequency */
mbed_official 622:db79ecd649d0 342 SystemCoreClock >>= tmp;
mbed_official 622:db79ecd649d0 343 }
mbed_official 622:db79ecd649d0 344
mbed_official 622:db79ecd649d0 345 /**
mbed_official 622:db79ecd649d0 346 * @brief Configures the System clock source, PLL Multiplier and Divider factors,
mbed_official 622:db79ecd649d0 347 * AHB/APBx prescalers and Flash settings
mbed_official 622:db79ecd649d0 348 * @note This function should be called only once the RCC clock configuration
mbed_official 622:db79ecd649d0 349 * is reset to the default reset state (done in SystemInit() function).
mbed_official 622:db79ecd649d0 350 * @param None
mbed_official 622:db79ecd649d0 351 * @retval None
mbed_official 622:db79ecd649d0 352 */
mbed_official 622:db79ecd649d0 353 void SetSysClock(void)
mbed_official 622:db79ecd649d0 354 {
mbed_official 622:db79ecd649d0 355 /* 1- Try to start with HSE and external clock */
mbed_official 622:db79ecd649d0 356 #if USE_PLL_HSE_EXTC != 0
mbed_official 622:db79ecd649d0 357 if (SetSysClock_PLL_HSE(1) == 0)
mbed_official 622:db79ecd649d0 358 #endif
mbed_official 622:db79ecd649d0 359 {
mbed_official 622:db79ecd649d0 360 /* 2- If fail try to start with HSE and external xtal */
mbed_official 622:db79ecd649d0 361 #if USE_PLL_HSE_XTAL != 0
mbed_official 622:db79ecd649d0 362 if (SetSysClock_PLL_HSE(0) == 0)
mbed_official 622:db79ecd649d0 363 #endif
mbed_official 622:db79ecd649d0 364 {
mbed_official 622:db79ecd649d0 365 /* 3- If fail start with HSI or MSI clock */
mbed_official 622:db79ecd649d0 366 #if (USE_PLL_HSI != 0)
mbed_official 622:db79ecd649d0 367 if (SetSysClock_PLL_HSI() == 0)
mbed_official 622:db79ecd649d0 368 #else
mbed_official 622:db79ecd649d0 369 if (SetSysClock_PLL_MSI() == 0)
mbed_official 622:db79ecd649d0 370 #endif
mbed_official 622:db79ecd649d0 371 {
mbed_official 622:db79ecd649d0 372 while(1)
mbed_official 622:db79ecd649d0 373 {
mbed_official 622:db79ecd649d0 374 // [TODO] Put something here to tell the user that a problem occured...
mbed_official 622:db79ecd649d0 375 }
mbed_official 622:db79ecd649d0 376 }
mbed_official 622:db79ecd649d0 377 }
mbed_official 622:db79ecd649d0 378 }
mbed_official 622:db79ecd649d0 379
mbed_official 622:db79ecd649d0 380 // Output clock on MCO1 pin(PA8) for debugging purpose
mbed_official 622:db79ecd649d0 381 #if DEBUG_MCO == 1
mbed_official 622:db79ecd649d0 382 HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_SYSCLK, RCC_MCODIV_1);
mbed_official 622:db79ecd649d0 383 #endif
mbed_official 622:db79ecd649d0 384 }
mbed_official 622:db79ecd649d0 385
mbed_official 622:db79ecd649d0 386 #if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
mbed_official 622:db79ecd649d0 387 /******************************************************************************/
mbed_official 622:db79ecd649d0 388 /* PLL (clocked by HSE) used as System clock source */
mbed_official 622:db79ecd649d0 389 /******************************************************************************/
mbed_official 622:db79ecd649d0 390 uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
mbed_official 622:db79ecd649d0 391 {
mbed_official 622:db79ecd649d0 392 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
mbed_official 622:db79ecd649d0 393 RCC_OscInitTypeDef RCC_OscInitStruct = {0};
mbed_official 622:db79ecd649d0 394
mbed_official 622:db79ecd649d0 395 // Used to gain time after DeepSleep in case HSI is used
mbed_official 622:db79ecd649d0 396 if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
mbed_official 622:db79ecd649d0 397 {
mbed_official 622:db79ecd649d0 398 return 0;
mbed_official 622:db79ecd649d0 399 }
mbed_official 622:db79ecd649d0 400
mbed_official 622:db79ecd649d0 401 // Select MSI as system clock source to allow modification of the PLL configuration
mbed_official 622:db79ecd649d0 402 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
mbed_official 622:db79ecd649d0 403 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
mbed_official 622:db79ecd649d0 404 HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
mbed_official 622:db79ecd649d0 405
mbed_official 622:db79ecd649d0 406 // Enable HSE oscillator and activate PLL with HSE as source
mbed_official 622:db79ecd649d0 407 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
mbed_official 622:db79ecd649d0 408 if (bypass == 0)
mbed_official 622:db79ecd649d0 409 {
mbed_official 622:db79ecd649d0 410 RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
mbed_official 622:db79ecd649d0 411 }
mbed_official 622:db79ecd649d0 412 else
mbed_official 622:db79ecd649d0 413 {
mbed_official 622:db79ecd649d0 414 RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
mbed_official 622:db79ecd649d0 415 }
mbed_official 622:db79ecd649d0 416 RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
mbed_official 622:db79ecd649d0 417 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; // 8 MHz
mbed_official 622:db79ecd649d0 418 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
mbed_official 622:db79ecd649d0 419
mbed_official 622:db79ecd649d0 420 // Non-USB configuration : sysclock = 80MHz
mbed_official 622:db79ecd649d0 421 //RCC_OscInitStruct.PLL.PLLM = 1; // VCO input clock = 8 MHz (8 MHz / 1)
mbed_official 622:db79ecd649d0 422 //RCC_OscInitStruct.PLL.PLLN = 20; // VCO output clock = 160 MHz (8 MHz * 20)
mbed_official 622:db79ecd649d0 423 //RCC_OscInitStruct.PLL.PLLP = 7; // PLLSAI3 clock = 22 MHz (160 MHz / 7)
mbed_official 622:db79ecd649d0 424 //RCC_OscInitStruct.PLL.PLLQ = 4; // USB clock (PLL48M1) = 40 MHz (160 MHz / 4) --> Not good for USB
mbed_official 622:db79ecd649d0 425 //RCC_OscInitStruct.PLL.PLLR = 2; // PLL clock = 80 MHz (160 MHz / 2)
mbed_official 622:db79ecd649d0 426
mbed_official 622:db79ecd649d0 427 // USB configuration : sysclock = 48 MHz
mbed_official 622:db79ecd649d0 428 RCC_OscInitStruct.PLL.PLLM = 1; // VCO input clock = 8 MHz (8 MHz / 1)
mbed_official 622:db79ecd649d0 429 RCC_OscInitStruct.PLL.PLLN = 24; // VCO output clock = 192 MHz (8 MHz * 24)
mbed_official 622:db79ecd649d0 430 RCC_OscInitStruct.PLL.PLLP = 7; // PLLSAI3 clock = 27.4 MHz (192 MHz / 7)
mbed_official 622:db79ecd649d0 431 RCC_OscInitStruct.PLL.PLLQ = 4; // USB clock (PLL48M1) = 48 MHz (192 MHz / 4) --> OK for USB
mbed_official 622:db79ecd649d0 432 RCC_OscInitStruct.PLL.PLLR = 4; // PLL clock = 48 MHz (192 MHz / 4)
mbed_official 622:db79ecd649d0 433
mbed_official 622:db79ecd649d0 434 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
mbed_official 622:db79ecd649d0 435 {
mbed_official 622:db79ecd649d0 436 return 0; // FAIL
mbed_official 622:db79ecd649d0 437 }
mbed_official 622:db79ecd649d0 438
mbed_official 622:db79ecd649d0 439 // Select PLL clock as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
mbed_official 622:db79ecd649d0 440 RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
mbed_official 622:db79ecd649d0 441 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 80 MHz or 48 MHz
mbed_official 622:db79ecd649d0 442 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 80 MHz or 48 MHz
mbed_official 622:db79ecd649d0 443 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 80 MHz or 48 MHz
mbed_official 622:db79ecd649d0 444 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 80 MHz or 48 MHz
mbed_official 622:db79ecd649d0 445 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
mbed_official 622:db79ecd649d0 446 {
mbed_official 622:db79ecd649d0 447 return 0; // FAIL
mbed_official 622:db79ecd649d0 448 }
mbed_official 622:db79ecd649d0 449
mbed_official 622:db79ecd649d0 450 // Disable MSI Oscillator
mbed_official 622:db79ecd649d0 451 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
mbed_official 622:db79ecd649d0 452 RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
mbed_official 622:db79ecd649d0 453 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
mbed_official 622:db79ecd649d0 454 HAL_RCC_OscConfig(&RCC_OscInitStruct);
mbed_official 622:db79ecd649d0 455
mbed_official 622:db79ecd649d0 456 // Output clock on MCO1 pin(PA8) for debugging purpose
mbed_official 622:db79ecd649d0 457 #if DEBUG_MCO == 2
mbed_official 622:db79ecd649d0 458 if (bypass == 0)
mbed_official 622:db79ecd649d0 459 HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz
mbed_official 622:db79ecd649d0 460 else
mbed_official 622:db79ecd649d0 461 HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz
mbed_official 622:db79ecd649d0 462 #endif
mbed_official 622:db79ecd649d0 463
mbed_official 622:db79ecd649d0 464 return 1; // OK
mbed_official 622:db79ecd649d0 465 }
mbed_official 622:db79ecd649d0 466 #endif
mbed_official 622:db79ecd649d0 467
mbed_official 622:db79ecd649d0 468 #if (USE_PLL_HSI != 0)
mbed_official 622:db79ecd649d0 469 /******************************************************************************/
mbed_official 622:db79ecd649d0 470 /* PLL (clocked by HSI) used as System clock source */
mbed_official 622:db79ecd649d0 471 /******************************************************************************/
mbed_official 622:db79ecd649d0 472 uint8_t SetSysClock_PLL_HSI(void)
mbed_official 622:db79ecd649d0 473 {
mbed_official 622:db79ecd649d0 474 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
mbed_official 622:db79ecd649d0 475 RCC_OscInitTypeDef RCC_OscInitStruct = {0};
mbed_official 622:db79ecd649d0 476
mbed_official 622:db79ecd649d0 477 // Select MSI as system clock source to allow modification of the PLL configuration
mbed_official 622:db79ecd649d0 478 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
mbed_official 622:db79ecd649d0 479 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
mbed_official 622:db79ecd649d0 480 HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
mbed_official 622:db79ecd649d0 481
mbed_official 622:db79ecd649d0 482 // Enable HSI oscillator and activate PLL with HSI as source
mbed_official 622:db79ecd649d0 483 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
mbed_official 622:db79ecd649d0 484 RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
mbed_official 622:db79ecd649d0 485 RCC_OscInitStruct.HSIState = RCC_HSI_ON;
mbed_official 622:db79ecd649d0 486 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
mbed_official 622:db79ecd649d0 487 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
mbed_official 622:db79ecd649d0 488 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // 16 MHz
mbed_official 622:db79ecd649d0 489 RCC_OscInitStruct.PLL.PLLM = 2; // VCO input clock = 8 MHz (16 MHz / 2)
mbed_official 622:db79ecd649d0 490 RCC_OscInitStruct.PLL.PLLN = 20; // VCO output clock = 160 MHz (8 MHz * 20)
mbed_official 622:db79ecd649d0 491 RCC_OscInitStruct.PLL.PLLP = 7; // PLLSAI3 clock = 22 MHz (160 MHz / 7)
mbed_official 622:db79ecd649d0 492 RCC_OscInitStruct.PLL.PLLQ = 4; // USB clock (PLL48M1) = 40 MHz (160 MHz / 4) --> Not good for USB
mbed_official 622:db79ecd649d0 493 RCC_OscInitStruct.PLL.PLLR = 2; // PLL clock = 80 MHz (160 MHz / 2)
mbed_official 622:db79ecd649d0 494 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
mbed_official 622:db79ecd649d0 495 {
mbed_official 622:db79ecd649d0 496 return 0; // FAIL
mbed_official 622:db79ecd649d0 497 }
mbed_official 622:db79ecd649d0 498
mbed_official 622:db79ecd649d0 499 // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
mbed_official 622:db79ecd649d0 500 RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
mbed_official 622:db79ecd649d0 501 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 80 MHz
mbed_official 622:db79ecd649d0 502 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 80 MHz
mbed_official 622:db79ecd649d0 503 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 80 MHz
mbed_official 622:db79ecd649d0 504 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 80 MHz
mbed_official 622:db79ecd649d0 505 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
mbed_official 622:db79ecd649d0 506 {
mbed_official 622:db79ecd649d0 507 return 0; // FAIL
mbed_official 622:db79ecd649d0 508 }
mbed_official 622:db79ecd649d0 509
mbed_official 622:db79ecd649d0 510 // Disable MSI Oscillator
mbed_official 622:db79ecd649d0 511 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
mbed_official 622:db79ecd649d0 512 RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
mbed_official 622:db79ecd649d0 513 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
mbed_official 622:db79ecd649d0 514 HAL_RCC_OscConfig(&RCC_OscInitStruct);
mbed_official 622:db79ecd649d0 515
mbed_official 622:db79ecd649d0 516 // Output clock on MCO1 pin(PA8) for debugging purpose
mbed_official 622:db79ecd649d0 517 #if DEBUG_MCO == 3
mbed_official 622:db79ecd649d0 518 HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
mbed_official 622:db79ecd649d0 519 #endif
mbed_official 622:db79ecd649d0 520
mbed_official 622:db79ecd649d0 521 return 1; // OK
mbed_official 622:db79ecd649d0 522 }
mbed_official 622:db79ecd649d0 523 #endif
mbed_official 622:db79ecd649d0 524
mbed_official 622:db79ecd649d0 525 /******************************************************************************/
mbed_official 622:db79ecd649d0 526 /* PLL (clocked by MSI) used as System clock source */
mbed_official 622:db79ecd649d0 527 /******************************************************************************/
mbed_official 622:db79ecd649d0 528 uint8_t SetSysClock_PLL_MSI(void)
mbed_official 622:db79ecd649d0 529 {
mbed_official 622:db79ecd649d0 530 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
mbed_official 622:db79ecd649d0 531 RCC_OscInitTypeDef RCC_OscInitStruct = {0};
mbed_official 622:db79ecd649d0 532
mbed_official 622:db79ecd649d0 533 // Enable LSE Oscillator to automatically calibrate the MSI clock
mbed_official 622:db79ecd649d0 534 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
mbed_official 622:db79ecd649d0 535 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
mbed_official 622:db79ecd649d0 536 RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
mbed_official 622:db79ecd649d0 537 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
mbed_official 622:db79ecd649d0 538 RCC->CR |= RCC_CR_MSIPLLEN; // Enable MSI PLL-mode
mbed_official 622:db79ecd649d0 539 }
mbed_official 622:db79ecd649d0 540
mbed_official 622:db79ecd649d0 541 // Enable MSI oscillator and activate PLL with MSI as source
mbed_official 622:db79ecd649d0 542 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
mbed_official 622:db79ecd649d0 543 RCC_OscInitStruct.MSIState = RCC_MSI_ON;
mbed_official 622:db79ecd649d0 544 RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
mbed_official 622:db79ecd649d0 545 RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
mbed_official 622:db79ecd649d0 546 RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
mbed_official 622:db79ecd649d0 547 RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
mbed_official 622:db79ecd649d0 548 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
mbed_official 622:db79ecd649d0 549 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; // 4 MHz
mbed_official 622:db79ecd649d0 550 RCC_OscInitStruct.PLL.PLLM = 1; // VCO input clock = 4 MHz (4 MHz / 1)
mbed_official 622:db79ecd649d0 551 RCC_OscInitStruct.PLL.PLLN = 40; // VCO output clock = 160 MHz (4 MHz * 40)
mbed_official 622:db79ecd649d0 552 RCC_OscInitStruct.PLL.PLLP = 7; // PLLSAI3 clock = 22.86 MHz (160 MHz / 7)
mbed_official 622:db79ecd649d0 553 RCC_OscInitStruct.PLL.PLLQ = 4; // USB clock (PLL48M1) = 40 MHz (160 MHz / 4) --> Not good for USB
mbed_official 622:db79ecd649d0 554 RCC_OscInitStruct.PLL.PLLR = 2; // PLL clock = 80 MHz (160 MHz / 2)
mbed_official 622:db79ecd649d0 555 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
mbed_official 622:db79ecd649d0 556 {
mbed_official 622:db79ecd649d0 557 return 0; // FAIL
mbed_official 622:db79ecd649d0 558 }
mbed_official 622:db79ecd649d0 559
mbed_official 622:db79ecd649d0 560 // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
mbed_official 622:db79ecd649d0 561 RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
mbed_official 622:db79ecd649d0 562 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 80 MHz
mbed_official 622:db79ecd649d0 563 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 80 MHz
mbed_official 622:db79ecd649d0 564 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 80 MHz
mbed_official 622:db79ecd649d0 565 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 80 MHz
mbed_official 622:db79ecd649d0 566 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
mbed_official 622:db79ecd649d0 567 {
mbed_official 622:db79ecd649d0 568 return 0; // FAIL
mbed_official 622:db79ecd649d0 569 }
mbed_official 622:db79ecd649d0 570
mbed_official 622:db79ecd649d0 571 // Output clock on MCO1 pin(PA8) for debugging purpose
mbed_official 622:db79ecd649d0 572 #if DEBUG_MCO == 4
mbed_official 622:db79ecd649d0 573 HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_MSI, RCC_MCODIV_2); // 2 MHz
mbed_official 622:db79ecd649d0 574 #endif
mbed_official 622:db79ecd649d0 575
mbed_official 622:db79ecd649d0 576 return 1; // OK
mbed_official 622:db79ecd649d0 577 }
mbed_official 622:db79ecd649d0 578
mbed_official 622:db79ecd649d0 579 /**
mbed_official 622:db79ecd649d0 580 * @}
mbed_official 622:db79ecd649d0 581 */
mbed_official 622:db79ecd649d0 582
mbed_official 622:db79ecd649d0 583 /**
mbed_official 622:db79ecd649d0 584 * @}
mbed_official 622:db79ecd649d0 585 */
mbed_official 622:db79ecd649d0 586
mbed_official 622:db79ecd649d0 587 /**
mbed_official 622:db79ecd649d0 588 * @}
mbed_official 622:db79ecd649d0 589 */
mbed_official 622:db79ecd649d0 590
mbed_official 622:db79ecd649d0 591 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/