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targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_tim_ex.c@637:ed69428d4850, 2015-12-22 (annotated)
- Committer:
- jaerts
- Date:
- Tue Dec 22 13:22:16 2015 +0000
- Revision:
- 637:ed69428d4850
- Parent:
- 610:813dcc80987e
Add very shady LPC1768 CAN Filter implementation
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 573:ad23fe03a082 | 1 | /** |
mbed_official | 573:ad23fe03a082 | 2 | ****************************************************************************** |
mbed_official | 573:ad23fe03a082 | 3 | * @file stm32f7xx_hal_tim_ex.c |
mbed_official | 573:ad23fe03a082 | 4 | * @author MCD Application Team |
mbed_official | 610:813dcc80987e | 5 | * @version V1.0.1 |
mbed_official | 610:813dcc80987e | 6 | * @date 25-June-2015 |
mbed_official | 573:ad23fe03a082 | 7 | * @brief TIM HAL module driver. |
mbed_official | 573:ad23fe03a082 | 8 | * This file provides firmware functions to manage the following |
mbed_official | 573:ad23fe03a082 | 9 | * functionalities of the Timer extension peripheral: |
mbed_official | 573:ad23fe03a082 | 10 | * + Time Hall Sensor Interface Initialization |
mbed_official | 573:ad23fe03a082 | 11 | * + Time Hall Sensor Interface Start |
mbed_official | 573:ad23fe03a082 | 12 | * + Time Complementary signal bread and dead time configuration |
mbed_official | 573:ad23fe03a082 | 13 | * + Time Master and Slave synchronization configuration |
mbed_official | 573:ad23fe03a082 | 14 | * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6) |
mbed_official | 573:ad23fe03a082 | 15 | * + Time OCRef clear configuration |
mbed_official | 573:ad23fe03a082 | 16 | * + Timer remapping capabilities configuration |
mbed_official | 573:ad23fe03a082 | 17 | @verbatim |
mbed_official | 573:ad23fe03a082 | 18 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 19 | ##### TIMER Extended features ##### |
mbed_official | 573:ad23fe03a082 | 20 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 21 | [..] |
mbed_official | 573:ad23fe03a082 | 22 | The Timer Extension features include: |
mbed_official | 573:ad23fe03a082 | 23 | (#) Complementary outputs with programmable dead-time for : |
mbed_official | 573:ad23fe03a082 | 24 | (++) Input Capture |
mbed_official | 573:ad23fe03a082 | 25 | (++) Output Compare |
mbed_official | 573:ad23fe03a082 | 26 | (++) PWM generation (Edge and Center-aligned Mode) |
mbed_official | 573:ad23fe03a082 | 27 | (++) One-pulse mode output |
mbed_official | 573:ad23fe03a082 | 28 | (#) Synchronization circuit to control the timer with external signals and to |
mbed_official | 573:ad23fe03a082 | 29 | interconnect several timers together. |
mbed_official | 573:ad23fe03a082 | 30 | (#) Break input to put the timer output signals in reset state or in a known state. |
mbed_official | 573:ad23fe03a082 | 31 | (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for |
mbed_official | 573:ad23fe03a082 | 32 | positioning purposes |
mbed_official | 573:ad23fe03a082 | 33 | |
mbed_official | 573:ad23fe03a082 | 34 | ##### How to use this driver ##### |
mbed_official | 573:ad23fe03a082 | 35 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 36 | [..] |
mbed_official | 573:ad23fe03a082 | 37 | (#) Initialize the TIM low level resources by implementing the following functions |
mbed_official | 573:ad23fe03a082 | 38 | depending from feature used : |
mbed_official | 573:ad23fe03a082 | 39 | (++) Complementary Output Compare : HAL_TIM_OC_MspInit() |
mbed_official | 573:ad23fe03a082 | 40 | (++) Complementary PWM generation : HAL_TIM_PWM_MspInit() |
mbed_official | 573:ad23fe03a082 | 41 | (++) Complementary One-pulse mode output : HAL_TIM_OnePulse_MspInit() |
mbed_official | 573:ad23fe03a082 | 42 | (++) Hall Sensor output : HAL_TIM_HallSensor_MspInit() |
mbed_official | 573:ad23fe03a082 | 43 | |
mbed_official | 573:ad23fe03a082 | 44 | (#) Initialize the TIM low level resources : |
mbed_official | 573:ad23fe03a082 | 45 | (##) Enable the TIM interface clock using __TIMx_CLK_ENABLE(); |
mbed_official | 573:ad23fe03a082 | 46 | (##) TIM pins configuration |
mbed_official | 573:ad23fe03a082 | 47 | (+++) Enable the clock for the TIM GPIOs using the following function: |
mbed_official | 573:ad23fe03a082 | 48 | __GPIOx_CLK_ENABLE(); |
mbed_official | 573:ad23fe03a082 | 49 | (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); |
mbed_official | 573:ad23fe03a082 | 50 | |
mbed_official | 573:ad23fe03a082 | 51 | (#) The external Clock can be configured, if needed (the default clock is the |
mbed_official | 573:ad23fe03a082 | 52 | internal clock from the APBx), using the following function: |
mbed_official | 573:ad23fe03a082 | 53 | HAL_TIM_ConfigClockSource, the clock configuration should be done before |
mbed_official | 573:ad23fe03a082 | 54 | any start function. |
mbed_official | 573:ad23fe03a082 | 55 | |
mbed_official | 573:ad23fe03a082 | 56 | (#) Configure the TIM in the desired functioning mode using one of the |
mbed_official | 573:ad23fe03a082 | 57 | initialization function of this driver: |
mbed_official | 573:ad23fe03a082 | 58 | (++) HAL_TIMEx_HallSensor_Init and HAL_TIMEx_ConfigCommutationEvent: to use the |
mbed_official | 573:ad23fe03a082 | 59 | Timer Hall Sensor Interface and the commutation event with the corresponding |
mbed_official | 573:ad23fe03a082 | 60 | Interrupt and DMA request if needed (Note that One Timer is used to interface |
mbed_official | 573:ad23fe03a082 | 61 | with the Hall sensor Interface and another Timer should be used to use |
mbed_official | 573:ad23fe03a082 | 62 | the commutation event). |
mbed_official | 573:ad23fe03a082 | 63 | |
mbed_official | 573:ad23fe03a082 | 64 | (#) Activate the TIM peripheral using one of the start functions: |
mbed_official | 573:ad23fe03a082 | 65 | (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT() |
mbed_official | 573:ad23fe03a082 | 66 | (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT() |
mbed_official | 573:ad23fe03a082 | 67 | (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() |
mbed_official | 573:ad23fe03a082 | 68 | (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT(). |
mbed_official | 573:ad23fe03a082 | 69 | |
mbed_official | 573:ad23fe03a082 | 70 | |
mbed_official | 573:ad23fe03a082 | 71 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 72 | ****************************************************************************** |
mbed_official | 573:ad23fe03a082 | 73 | * @attention |
mbed_official | 573:ad23fe03a082 | 74 | * |
mbed_official | 573:ad23fe03a082 | 75 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
mbed_official | 573:ad23fe03a082 | 76 | * |
mbed_official | 573:ad23fe03a082 | 77 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 573:ad23fe03a082 | 78 | * are permitted provided that the following conditions are met: |
mbed_official | 573:ad23fe03a082 | 79 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 573:ad23fe03a082 | 80 | * this list of conditions and the following disclaimer. |
mbed_official | 573:ad23fe03a082 | 81 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 573:ad23fe03a082 | 82 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 573:ad23fe03a082 | 83 | * and/or other materials provided with the distribution. |
mbed_official | 573:ad23fe03a082 | 84 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 573:ad23fe03a082 | 85 | * may be used to endorse or promote products derived from this software |
mbed_official | 573:ad23fe03a082 | 86 | * without specific prior written permission. |
mbed_official | 573:ad23fe03a082 | 87 | * |
mbed_official | 573:ad23fe03a082 | 88 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 573:ad23fe03a082 | 89 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 573:ad23fe03a082 | 90 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 573:ad23fe03a082 | 91 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 573:ad23fe03a082 | 92 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 573:ad23fe03a082 | 93 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 573:ad23fe03a082 | 94 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 573:ad23fe03a082 | 95 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 573:ad23fe03a082 | 96 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 573:ad23fe03a082 | 97 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 573:ad23fe03a082 | 98 | * |
mbed_official | 573:ad23fe03a082 | 99 | ****************************************************************************** |
mbed_official | 573:ad23fe03a082 | 100 | */ |
mbed_official | 573:ad23fe03a082 | 101 | |
mbed_official | 573:ad23fe03a082 | 102 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 103 | #include "stm32f7xx_hal.h" |
mbed_official | 573:ad23fe03a082 | 104 | |
mbed_official | 573:ad23fe03a082 | 105 | /** @addtogroup STM32F7xx_HAL_Driver |
mbed_official | 573:ad23fe03a082 | 106 | * @{ |
mbed_official | 573:ad23fe03a082 | 107 | */ |
mbed_official | 573:ad23fe03a082 | 108 | |
mbed_official | 573:ad23fe03a082 | 109 | /** @defgroup TIMEx TIMEx |
mbed_official | 573:ad23fe03a082 | 110 | * @brief TIM Extended HAL module driver |
mbed_official | 573:ad23fe03a082 | 111 | * @{ |
mbed_official | 573:ad23fe03a082 | 112 | */ |
mbed_official | 573:ad23fe03a082 | 113 | |
mbed_official | 573:ad23fe03a082 | 114 | #ifdef HAL_TIM_MODULE_ENABLED |
mbed_official | 573:ad23fe03a082 | 115 | |
mbed_official | 573:ad23fe03a082 | 116 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 117 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 118 | #define BDTR_BKF_SHIFT (16) |
mbed_official | 573:ad23fe03a082 | 119 | #define BDTR_BK2F_SHIFT (20) |
mbed_official | 573:ad23fe03a082 | 120 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 121 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 122 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 123 | /** @addtogroup TIMEx_Private_Functions |
mbed_official | 573:ad23fe03a082 | 124 | * @{ |
mbed_official | 573:ad23fe03a082 | 125 | */ |
mbed_official | 573:ad23fe03a082 | 126 | static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState); |
mbed_official | 573:ad23fe03a082 | 127 | static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); |
mbed_official | 573:ad23fe03a082 | 128 | static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); |
mbed_official | 573:ad23fe03a082 | 129 | /** |
mbed_official | 573:ad23fe03a082 | 130 | * @} |
mbed_official | 573:ad23fe03a082 | 131 | */ |
mbed_official | 573:ad23fe03a082 | 132 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 133 | |
mbed_official | 573:ad23fe03a082 | 134 | /** @defgroup TIMEx_Exported_Functions TIMEx Exported Functions |
mbed_official | 573:ad23fe03a082 | 135 | * @{ |
mbed_official | 573:ad23fe03a082 | 136 | */ |
mbed_official | 573:ad23fe03a082 | 137 | |
mbed_official | 573:ad23fe03a082 | 138 | /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions |
mbed_official | 573:ad23fe03a082 | 139 | * @brief Timer Hall Sensor functions |
mbed_official | 573:ad23fe03a082 | 140 | * |
mbed_official | 573:ad23fe03a082 | 141 | @verbatim |
mbed_official | 573:ad23fe03a082 | 142 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 143 | ##### Timer Hall Sensor functions ##### |
mbed_official | 573:ad23fe03a082 | 144 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 145 | [..] |
mbed_official | 573:ad23fe03a082 | 146 | This section provides functions allowing to: |
mbed_official | 573:ad23fe03a082 | 147 | (+) Initialize and configure TIM HAL Sensor. |
mbed_official | 573:ad23fe03a082 | 148 | (+) De-initialize TIM HAL Sensor. |
mbed_official | 573:ad23fe03a082 | 149 | (+) Start the Hall Sensor Interface. |
mbed_official | 573:ad23fe03a082 | 150 | (+) Stop the Hall Sensor Interface. |
mbed_official | 573:ad23fe03a082 | 151 | (+) Start the Hall Sensor Interface and enable interrupts. |
mbed_official | 573:ad23fe03a082 | 152 | (+) Stop the Hall Sensor Interface and disable interrupts. |
mbed_official | 573:ad23fe03a082 | 153 | (+) Start the Hall Sensor Interface and enable DMA transfers. |
mbed_official | 573:ad23fe03a082 | 154 | (+) Stop the Hall Sensor Interface and disable DMA transfers. |
mbed_official | 573:ad23fe03a082 | 155 | |
mbed_official | 573:ad23fe03a082 | 156 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 157 | * @{ |
mbed_official | 573:ad23fe03a082 | 158 | */ |
mbed_official | 573:ad23fe03a082 | 159 | /** |
mbed_official | 573:ad23fe03a082 | 160 | * @brief Initializes the TIM Hall Sensor Interface and create the associated handle. |
mbed_official | 573:ad23fe03a082 | 161 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 162 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 163 | * @param sConfig: TIM Hall Sensor configuration structure |
mbed_official | 573:ad23fe03a082 | 164 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 165 | */ |
mbed_official | 573:ad23fe03a082 | 166 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig) |
mbed_official | 573:ad23fe03a082 | 167 | { |
mbed_official | 573:ad23fe03a082 | 168 | TIM_OC_InitTypeDef OC_Config; |
mbed_official | 573:ad23fe03a082 | 169 | |
mbed_official | 573:ad23fe03a082 | 170 | /* Check the TIM handle allocation */ |
mbed_official | 573:ad23fe03a082 | 171 | if(htim == NULL) |
mbed_official | 573:ad23fe03a082 | 172 | { |
mbed_official | 573:ad23fe03a082 | 173 | return HAL_ERROR; |
mbed_official | 573:ad23fe03a082 | 174 | } |
mbed_official | 573:ad23fe03a082 | 175 | |
mbed_official | 573:ad23fe03a082 | 176 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 177 | assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); |
mbed_official | 573:ad23fe03a082 | 178 | assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); |
mbed_official | 573:ad23fe03a082 | 179 | assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); |
mbed_official | 573:ad23fe03a082 | 180 | assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); |
mbed_official | 573:ad23fe03a082 | 181 | assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); |
mbed_official | 573:ad23fe03a082 | 182 | |
mbed_official | 573:ad23fe03a082 | 183 | /* Set the TIM state */ |
mbed_official | 573:ad23fe03a082 | 184 | htim->State= HAL_TIM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 185 | |
mbed_official | 573:ad23fe03a082 | 186 | /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ |
mbed_official | 573:ad23fe03a082 | 187 | HAL_TIMEx_HallSensor_MspInit(htim); |
mbed_official | 573:ad23fe03a082 | 188 | |
mbed_official | 573:ad23fe03a082 | 189 | /* Configure the Time base in the Encoder Mode */ |
mbed_official | 573:ad23fe03a082 | 190 | TIM_Base_SetConfig(htim->Instance, &htim->Init); |
mbed_official | 573:ad23fe03a082 | 191 | |
mbed_official | 573:ad23fe03a082 | 192 | /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */ |
mbed_official | 573:ad23fe03a082 | 193 | TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); |
mbed_official | 573:ad23fe03a082 | 194 | |
mbed_official | 573:ad23fe03a082 | 195 | /* Reset the IC1PSC Bits */ |
mbed_official | 573:ad23fe03a082 | 196 | htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; |
mbed_official | 573:ad23fe03a082 | 197 | /* Set the IC1PSC value */ |
mbed_official | 573:ad23fe03a082 | 198 | htim->Instance->CCMR1 |= sConfig->IC1Prescaler; |
mbed_official | 573:ad23fe03a082 | 199 | |
mbed_official | 573:ad23fe03a082 | 200 | /* Enable the Hall sensor interface (XOR function of the three inputs) */ |
mbed_official | 573:ad23fe03a082 | 201 | htim->Instance->CR2 |= TIM_CR2_TI1S; |
mbed_official | 573:ad23fe03a082 | 202 | |
mbed_official | 573:ad23fe03a082 | 203 | /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ |
mbed_official | 573:ad23fe03a082 | 204 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
mbed_official | 573:ad23fe03a082 | 205 | htim->Instance->SMCR |= TIM_TS_TI1F_ED; |
mbed_official | 573:ad23fe03a082 | 206 | |
mbed_official | 573:ad23fe03a082 | 207 | /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ |
mbed_official | 573:ad23fe03a082 | 208 | htim->Instance->SMCR &= ~TIM_SMCR_SMS; |
mbed_official | 573:ad23fe03a082 | 209 | htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; |
mbed_official | 573:ad23fe03a082 | 210 | |
mbed_official | 573:ad23fe03a082 | 211 | /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ |
mbed_official | 573:ad23fe03a082 | 212 | OC_Config.OCFastMode = TIM_OCFAST_DISABLE; |
mbed_official | 573:ad23fe03a082 | 213 | OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; |
mbed_official | 573:ad23fe03a082 | 214 | OC_Config.OCMode = TIM_OCMODE_PWM2; |
mbed_official | 573:ad23fe03a082 | 215 | OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; |
mbed_official | 573:ad23fe03a082 | 216 | OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; |
mbed_official | 573:ad23fe03a082 | 217 | OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; |
mbed_official | 573:ad23fe03a082 | 218 | OC_Config.Pulse = sConfig->Commutation_Delay; |
mbed_official | 573:ad23fe03a082 | 219 | |
mbed_official | 573:ad23fe03a082 | 220 | TIM_OC2_SetConfig(htim->Instance, &OC_Config); |
mbed_official | 573:ad23fe03a082 | 221 | |
mbed_official | 573:ad23fe03a082 | 222 | /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 |
mbed_official | 573:ad23fe03a082 | 223 | register to 101 */ |
mbed_official | 573:ad23fe03a082 | 224 | htim->Instance->CR2 &= ~TIM_CR2_MMS; |
mbed_official | 573:ad23fe03a082 | 225 | htim->Instance->CR2 |= TIM_TRGO_OC2REF; |
mbed_official | 573:ad23fe03a082 | 226 | |
mbed_official | 573:ad23fe03a082 | 227 | /* Initialize the TIM state*/ |
mbed_official | 573:ad23fe03a082 | 228 | htim->State= HAL_TIM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 229 | |
mbed_official | 573:ad23fe03a082 | 230 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 231 | } |
mbed_official | 573:ad23fe03a082 | 232 | |
mbed_official | 573:ad23fe03a082 | 233 | /** |
mbed_official | 573:ad23fe03a082 | 234 | * @brief DeInitializes the TIM Hall Sensor interface |
mbed_official | 573:ad23fe03a082 | 235 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 236 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 237 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 238 | */ |
mbed_official | 573:ad23fe03a082 | 239 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) |
mbed_official | 573:ad23fe03a082 | 240 | { |
mbed_official | 573:ad23fe03a082 | 241 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 242 | assert_param(IS_TIM_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 243 | |
mbed_official | 573:ad23fe03a082 | 244 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 245 | |
mbed_official | 573:ad23fe03a082 | 246 | /* Disable the TIM Peripheral Clock */ |
mbed_official | 573:ad23fe03a082 | 247 | __HAL_TIM_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 248 | |
mbed_official | 573:ad23fe03a082 | 249 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
mbed_official | 573:ad23fe03a082 | 250 | HAL_TIMEx_HallSensor_MspDeInit(htim); |
mbed_official | 573:ad23fe03a082 | 251 | |
mbed_official | 573:ad23fe03a082 | 252 | /* Change TIM state */ |
mbed_official | 573:ad23fe03a082 | 253 | htim->State = HAL_TIM_STATE_RESET; |
mbed_official | 573:ad23fe03a082 | 254 | |
mbed_official | 573:ad23fe03a082 | 255 | /* Release Lock */ |
mbed_official | 573:ad23fe03a082 | 256 | __HAL_UNLOCK(htim); |
mbed_official | 573:ad23fe03a082 | 257 | |
mbed_official | 573:ad23fe03a082 | 258 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 259 | } |
mbed_official | 573:ad23fe03a082 | 260 | |
mbed_official | 573:ad23fe03a082 | 261 | /** |
mbed_official | 573:ad23fe03a082 | 262 | * @brief Initializes the TIM Hall Sensor MSP. |
mbed_official | 573:ad23fe03a082 | 263 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 264 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 265 | * @retval None |
mbed_official | 573:ad23fe03a082 | 266 | */ |
mbed_official | 573:ad23fe03a082 | 267 | __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) |
mbed_official | 573:ad23fe03a082 | 268 | { |
mbed_official | 573:ad23fe03a082 | 269 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 573:ad23fe03a082 | 270 | the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file |
mbed_official | 573:ad23fe03a082 | 271 | */ |
mbed_official | 573:ad23fe03a082 | 272 | } |
mbed_official | 573:ad23fe03a082 | 273 | |
mbed_official | 573:ad23fe03a082 | 274 | /** |
mbed_official | 573:ad23fe03a082 | 275 | * @brief DeInitializes TIM Hall Sensor MSP. |
mbed_official | 573:ad23fe03a082 | 276 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 277 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 278 | * @retval None |
mbed_official | 573:ad23fe03a082 | 279 | */ |
mbed_official | 573:ad23fe03a082 | 280 | __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) |
mbed_official | 573:ad23fe03a082 | 281 | { |
mbed_official | 573:ad23fe03a082 | 282 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 573:ad23fe03a082 | 283 | the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file |
mbed_official | 573:ad23fe03a082 | 284 | */ |
mbed_official | 573:ad23fe03a082 | 285 | } |
mbed_official | 573:ad23fe03a082 | 286 | |
mbed_official | 573:ad23fe03a082 | 287 | /** |
mbed_official | 573:ad23fe03a082 | 288 | * @brief Starts the TIM Hall Sensor Interface. |
mbed_official | 573:ad23fe03a082 | 289 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 290 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 291 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 292 | */ |
mbed_official | 573:ad23fe03a082 | 293 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) |
mbed_official | 573:ad23fe03a082 | 294 | { |
mbed_official | 573:ad23fe03a082 | 295 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 296 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 297 | |
mbed_official | 573:ad23fe03a082 | 298 | /* Enable the Input Capture channels 1 |
mbed_official | 573:ad23fe03a082 | 299 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
mbed_official | 573:ad23fe03a082 | 300 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
mbed_official | 573:ad23fe03a082 | 301 | |
mbed_official | 573:ad23fe03a082 | 302 | /* Enable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 303 | __HAL_TIM_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 304 | |
mbed_official | 573:ad23fe03a082 | 305 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 306 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 307 | } |
mbed_official | 573:ad23fe03a082 | 308 | |
mbed_official | 573:ad23fe03a082 | 309 | /** |
mbed_official | 573:ad23fe03a082 | 310 | * @brief Stops the TIM Hall sensor Interface. |
mbed_official | 573:ad23fe03a082 | 311 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 312 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 313 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 314 | */ |
mbed_official | 573:ad23fe03a082 | 315 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) |
mbed_official | 573:ad23fe03a082 | 316 | { |
mbed_official | 573:ad23fe03a082 | 317 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 318 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 319 | |
mbed_official | 573:ad23fe03a082 | 320 | /* Disable the Input Capture channels 1, 2 and 3 |
mbed_official | 573:ad23fe03a082 | 321 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
mbed_official | 573:ad23fe03a082 | 322 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
mbed_official | 573:ad23fe03a082 | 323 | |
mbed_official | 573:ad23fe03a082 | 324 | /* Disable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 325 | __HAL_TIM_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 326 | |
mbed_official | 573:ad23fe03a082 | 327 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 328 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 329 | } |
mbed_official | 573:ad23fe03a082 | 330 | |
mbed_official | 573:ad23fe03a082 | 331 | /** |
mbed_official | 573:ad23fe03a082 | 332 | * @brief Starts the TIM Hall Sensor Interface in interrupt mode. |
mbed_official | 573:ad23fe03a082 | 333 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 334 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 335 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 336 | */ |
mbed_official | 573:ad23fe03a082 | 337 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) |
mbed_official | 573:ad23fe03a082 | 338 | { |
mbed_official | 573:ad23fe03a082 | 339 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 340 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 341 | |
mbed_official | 573:ad23fe03a082 | 342 | /* Enable the capture compare Interrupts 1 event */ |
mbed_official | 573:ad23fe03a082 | 343 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 573:ad23fe03a082 | 344 | |
mbed_official | 573:ad23fe03a082 | 345 | /* Enable the Input Capture channels 1 |
mbed_official | 573:ad23fe03a082 | 346 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
mbed_official | 573:ad23fe03a082 | 347 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
mbed_official | 573:ad23fe03a082 | 348 | |
mbed_official | 573:ad23fe03a082 | 349 | /* Enable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 350 | __HAL_TIM_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 351 | |
mbed_official | 573:ad23fe03a082 | 352 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 353 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 354 | } |
mbed_official | 573:ad23fe03a082 | 355 | |
mbed_official | 573:ad23fe03a082 | 356 | /** |
mbed_official | 573:ad23fe03a082 | 357 | * @brief Stops the TIM Hall Sensor Interface in interrupt mode. |
mbed_official | 573:ad23fe03a082 | 358 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 359 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 360 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 361 | */ |
mbed_official | 573:ad23fe03a082 | 362 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) |
mbed_official | 573:ad23fe03a082 | 363 | { |
mbed_official | 573:ad23fe03a082 | 364 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 365 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 366 | |
mbed_official | 573:ad23fe03a082 | 367 | /* Disable the Input Capture channels 1 |
mbed_official | 573:ad23fe03a082 | 368 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
mbed_official | 573:ad23fe03a082 | 369 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
mbed_official | 573:ad23fe03a082 | 370 | |
mbed_official | 573:ad23fe03a082 | 371 | /* Disable the capture compare Interrupts event */ |
mbed_official | 573:ad23fe03a082 | 372 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 573:ad23fe03a082 | 373 | |
mbed_official | 573:ad23fe03a082 | 374 | /* Disable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 375 | __HAL_TIM_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 376 | |
mbed_official | 573:ad23fe03a082 | 377 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 378 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 379 | } |
mbed_official | 573:ad23fe03a082 | 380 | |
mbed_official | 573:ad23fe03a082 | 381 | /** |
mbed_official | 573:ad23fe03a082 | 382 | * @brief Starts the TIM Hall Sensor Interface in DMA mode. |
mbed_official | 573:ad23fe03a082 | 383 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 384 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 385 | * @param pData: The destination Buffer address. |
mbed_official | 573:ad23fe03a082 | 386 | * @param Length: The length of data to be transferred from TIM peripheral to memory. |
mbed_official | 573:ad23fe03a082 | 387 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 388 | */ |
mbed_official | 573:ad23fe03a082 | 389 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) |
mbed_official | 573:ad23fe03a082 | 390 | { |
mbed_official | 573:ad23fe03a082 | 391 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 392 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 393 | |
mbed_official | 573:ad23fe03a082 | 394 | if((htim->State == HAL_TIM_STATE_BUSY)) |
mbed_official | 573:ad23fe03a082 | 395 | { |
mbed_official | 573:ad23fe03a082 | 396 | return HAL_BUSY; |
mbed_official | 573:ad23fe03a082 | 397 | } |
mbed_official | 573:ad23fe03a082 | 398 | else if((htim->State == HAL_TIM_STATE_READY)) |
mbed_official | 573:ad23fe03a082 | 399 | { |
mbed_official | 573:ad23fe03a082 | 400 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
mbed_official | 573:ad23fe03a082 | 401 | { |
mbed_official | 573:ad23fe03a082 | 402 | return HAL_ERROR; |
mbed_official | 573:ad23fe03a082 | 403 | } |
mbed_official | 573:ad23fe03a082 | 404 | else |
mbed_official | 573:ad23fe03a082 | 405 | { |
mbed_official | 573:ad23fe03a082 | 406 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 407 | } |
mbed_official | 573:ad23fe03a082 | 408 | } |
mbed_official | 573:ad23fe03a082 | 409 | /* Enable the Input Capture channels 1 |
mbed_official | 573:ad23fe03a082 | 410 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
mbed_official | 573:ad23fe03a082 | 411 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
mbed_official | 573:ad23fe03a082 | 412 | |
mbed_official | 573:ad23fe03a082 | 413 | /* Set the DMA Input Capture 1 Callback */ |
mbed_official | 573:ad23fe03a082 | 414 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt; |
mbed_official | 573:ad23fe03a082 | 415 | /* Set the DMA error callback */ |
mbed_official | 573:ad23fe03a082 | 416 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 573:ad23fe03a082 | 417 | |
mbed_official | 573:ad23fe03a082 | 418 | /* Enable the DMA Stream for Capture 1*/ |
mbed_official | 573:ad23fe03a082 | 419 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length); |
mbed_official | 573:ad23fe03a082 | 420 | |
mbed_official | 573:ad23fe03a082 | 421 | /* Enable the capture compare 1 Interrupt */ |
mbed_official | 573:ad23fe03a082 | 422 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
mbed_official | 573:ad23fe03a082 | 423 | |
mbed_official | 573:ad23fe03a082 | 424 | /* Enable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 425 | __HAL_TIM_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 426 | |
mbed_official | 573:ad23fe03a082 | 427 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 428 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 429 | } |
mbed_official | 573:ad23fe03a082 | 430 | |
mbed_official | 573:ad23fe03a082 | 431 | /** |
mbed_official | 573:ad23fe03a082 | 432 | * @brief Stops the TIM Hall Sensor Interface in DMA mode. |
mbed_official | 573:ad23fe03a082 | 433 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 434 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 435 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 436 | */ |
mbed_official | 573:ad23fe03a082 | 437 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) |
mbed_official | 573:ad23fe03a082 | 438 | { |
mbed_official | 573:ad23fe03a082 | 439 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 440 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 441 | |
mbed_official | 573:ad23fe03a082 | 442 | /* Disable the Input Capture channels 1 |
mbed_official | 573:ad23fe03a082 | 443 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
mbed_official | 573:ad23fe03a082 | 444 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
mbed_official | 573:ad23fe03a082 | 445 | |
mbed_official | 573:ad23fe03a082 | 446 | |
mbed_official | 573:ad23fe03a082 | 447 | /* Disable the capture compare Interrupts 1 event */ |
mbed_official | 573:ad23fe03a082 | 448 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
mbed_official | 573:ad23fe03a082 | 449 | |
mbed_official | 573:ad23fe03a082 | 450 | /* Disable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 451 | __HAL_TIM_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 452 | |
mbed_official | 573:ad23fe03a082 | 453 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 454 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 455 | } |
mbed_official | 573:ad23fe03a082 | 456 | |
mbed_official | 573:ad23fe03a082 | 457 | /** |
mbed_official | 573:ad23fe03a082 | 458 | * @} |
mbed_official | 573:ad23fe03a082 | 459 | */ |
mbed_official | 573:ad23fe03a082 | 460 | |
mbed_official | 573:ad23fe03a082 | 461 | /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions |
mbed_official | 573:ad23fe03a082 | 462 | * @brief Timer Complementary Output Compare functions |
mbed_official | 573:ad23fe03a082 | 463 | * |
mbed_official | 573:ad23fe03a082 | 464 | @verbatim |
mbed_official | 573:ad23fe03a082 | 465 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 466 | ##### Timer Complementary Output Compare functions ##### |
mbed_official | 573:ad23fe03a082 | 467 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 468 | [..] |
mbed_official | 573:ad23fe03a082 | 469 | This section provides functions allowing to: |
mbed_official | 573:ad23fe03a082 | 470 | (+) Start the Complementary Output Compare/PWM. |
mbed_official | 573:ad23fe03a082 | 471 | (+) Stop the Complementary Output Compare/PWM. |
mbed_official | 573:ad23fe03a082 | 472 | (+) Start the Complementary Output Compare/PWM and enable interrupts. |
mbed_official | 573:ad23fe03a082 | 473 | (+) Stop the Complementary Output Compare/PWM and disable interrupts. |
mbed_official | 573:ad23fe03a082 | 474 | (+) Start the Complementary Output Compare/PWM and enable DMA transfers. |
mbed_official | 573:ad23fe03a082 | 475 | (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. |
mbed_official | 573:ad23fe03a082 | 476 | |
mbed_official | 573:ad23fe03a082 | 477 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 478 | * @{ |
mbed_official | 573:ad23fe03a082 | 479 | */ |
mbed_official | 573:ad23fe03a082 | 480 | |
mbed_official | 573:ad23fe03a082 | 481 | /** |
mbed_official | 573:ad23fe03a082 | 482 | * @brief Starts the TIM Output Compare signal generation on the complementary |
mbed_official | 573:ad23fe03a082 | 483 | * output. |
mbed_official | 573:ad23fe03a082 | 484 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 485 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 486 | * @param Channel: TIM Channel to be enabled. |
mbed_official | 573:ad23fe03a082 | 487 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 488 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 489 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 490 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 573:ad23fe03a082 | 491 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 573:ad23fe03a082 | 492 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 493 | */ |
mbed_official | 573:ad23fe03a082 | 494 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 573:ad23fe03a082 | 495 | { |
mbed_official | 573:ad23fe03a082 | 496 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 497 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 573:ad23fe03a082 | 498 | |
mbed_official | 573:ad23fe03a082 | 499 | /* Enable the Capture compare channel N */ |
mbed_official | 573:ad23fe03a082 | 500 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
mbed_official | 573:ad23fe03a082 | 501 | |
mbed_official | 573:ad23fe03a082 | 502 | /* Enable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 503 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 504 | |
mbed_official | 573:ad23fe03a082 | 505 | /* Enable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 506 | __HAL_TIM_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 507 | |
mbed_official | 573:ad23fe03a082 | 508 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 509 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 510 | } |
mbed_official | 573:ad23fe03a082 | 511 | |
mbed_official | 573:ad23fe03a082 | 512 | /** |
mbed_official | 573:ad23fe03a082 | 513 | * @brief Stops the TIM Output Compare signal generation on the complementary |
mbed_official | 573:ad23fe03a082 | 514 | * output. |
mbed_official | 573:ad23fe03a082 | 515 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 516 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 517 | * @param Channel: TIM Channel to be disabled. |
mbed_official | 573:ad23fe03a082 | 518 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 519 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 520 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 521 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 573:ad23fe03a082 | 522 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 573:ad23fe03a082 | 523 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 524 | */ |
mbed_official | 573:ad23fe03a082 | 525 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 573:ad23fe03a082 | 526 | { |
mbed_official | 573:ad23fe03a082 | 527 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 528 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 573:ad23fe03a082 | 529 | |
mbed_official | 573:ad23fe03a082 | 530 | /* Disable the Capture compare channel N */ |
mbed_official | 573:ad23fe03a082 | 531 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
mbed_official | 573:ad23fe03a082 | 532 | |
mbed_official | 573:ad23fe03a082 | 533 | /* Disable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 534 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 535 | |
mbed_official | 573:ad23fe03a082 | 536 | /* Disable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 537 | __HAL_TIM_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 538 | |
mbed_official | 573:ad23fe03a082 | 539 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 540 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 541 | } |
mbed_official | 573:ad23fe03a082 | 542 | |
mbed_official | 573:ad23fe03a082 | 543 | /** |
mbed_official | 573:ad23fe03a082 | 544 | * @brief Starts the TIM Output Compare signal generation in interrupt mode |
mbed_official | 573:ad23fe03a082 | 545 | * on the complementary output. |
mbed_official | 573:ad23fe03a082 | 546 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 547 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 548 | * @param Channel: TIM Channel to be enabled. |
mbed_official | 573:ad23fe03a082 | 549 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 550 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 551 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 552 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 573:ad23fe03a082 | 553 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 573:ad23fe03a082 | 554 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 555 | */ |
mbed_official | 573:ad23fe03a082 | 556 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 573:ad23fe03a082 | 557 | { |
mbed_official | 573:ad23fe03a082 | 558 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 559 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 573:ad23fe03a082 | 560 | |
mbed_official | 573:ad23fe03a082 | 561 | switch (Channel) |
mbed_official | 573:ad23fe03a082 | 562 | { |
mbed_official | 573:ad23fe03a082 | 563 | case TIM_CHANNEL_1: |
mbed_official | 573:ad23fe03a082 | 564 | { |
mbed_official | 573:ad23fe03a082 | 565 | /* Enable the TIM Output Compare interrupt */ |
mbed_official | 573:ad23fe03a082 | 566 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 573:ad23fe03a082 | 567 | } |
mbed_official | 573:ad23fe03a082 | 568 | break; |
mbed_official | 573:ad23fe03a082 | 569 | |
mbed_official | 573:ad23fe03a082 | 570 | case TIM_CHANNEL_2: |
mbed_official | 573:ad23fe03a082 | 571 | { |
mbed_official | 573:ad23fe03a082 | 572 | /* Enable the TIM Output Compare interrupt */ |
mbed_official | 573:ad23fe03a082 | 573 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
mbed_official | 573:ad23fe03a082 | 574 | } |
mbed_official | 573:ad23fe03a082 | 575 | break; |
mbed_official | 573:ad23fe03a082 | 576 | |
mbed_official | 573:ad23fe03a082 | 577 | case TIM_CHANNEL_3: |
mbed_official | 573:ad23fe03a082 | 578 | { |
mbed_official | 573:ad23fe03a082 | 579 | /* Enable the TIM Output Compare interrupt */ |
mbed_official | 573:ad23fe03a082 | 580 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
mbed_official | 573:ad23fe03a082 | 581 | } |
mbed_official | 573:ad23fe03a082 | 582 | break; |
mbed_official | 573:ad23fe03a082 | 583 | |
mbed_official | 573:ad23fe03a082 | 584 | case TIM_CHANNEL_4: |
mbed_official | 573:ad23fe03a082 | 585 | { |
mbed_official | 573:ad23fe03a082 | 586 | /* Enable the TIM Output Compare interrupt */ |
mbed_official | 573:ad23fe03a082 | 587 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); |
mbed_official | 573:ad23fe03a082 | 588 | } |
mbed_official | 573:ad23fe03a082 | 589 | break; |
mbed_official | 573:ad23fe03a082 | 590 | |
mbed_official | 573:ad23fe03a082 | 591 | default: |
mbed_official | 573:ad23fe03a082 | 592 | break; |
mbed_official | 573:ad23fe03a082 | 593 | } |
mbed_official | 573:ad23fe03a082 | 594 | |
mbed_official | 573:ad23fe03a082 | 595 | /* Enable the TIM Break interrupt */ |
mbed_official | 573:ad23fe03a082 | 596 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
mbed_official | 573:ad23fe03a082 | 597 | |
mbed_official | 573:ad23fe03a082 | 598 | /* Enable the Capture compare channel N */ |
mbed_official | 573:ad23fe03a082 | 599 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
mbed_official | 573:ad23fe03a082 | 600 | |
mbed_official | 573:ad23fe03a082 | 601 | /* Enable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 602 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 603 | |
mbed_official | 573:ad23fe03a082 | 604 | /* Enable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 605 | __HAL_TIM_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 606 | |
mbed_official | 573:ad23fe03a082 | 607 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 608 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 609 | } |
mbed_official | 573:ad23fe03a082 | 610 | |
mbed_official | 573:ad23fe03a082 | 611 | /** |
mbed_official | 573:ad23fe03a082 | 612 | * @brief Stops the TIM Output Compare signal generation in interrupt mode |
mbed_official | 573:ad23fe03a082 | 613 | * on the complementary output. |
mbed_official | 573:ad23fe03a082 | 614 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 615 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 616 | * @param Channel: TIM Channel to be disabled. |
mbed_official | 573:ad23fe03a082 | 617 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 618 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 619 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 620 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 573:ad23fe03a082 | 621 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 573:ad23fe03a082 | 622 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 623 | */ |
mbed_official | 573:ad23fe03a082 | 624 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 573:ad23fe03a082 | 625 | { |
mbed_official | 573:ad23fe03a082 | 626 | uint32_t tmpccer = 0; |
mbed_official | 573:ad23fe03a082 | 627 | |
mbed_official | 573:ad23fe03a082 | 628 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 629 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 573:ad23fe03a082 | 630 | |
mbed_official | 573:ad23fe03a082 | 631 | switch (Channel) |
mbed_official | 573:ad23fe03a082 | 632 | { |
mbed_official | 573:ad23fe03a082 | 633 | case TIM_CHANNEL_1: |
mbed_official | 573:ad23fe03a082 | 634 | { |
mbed_official | 573:ad23fe03a082 | 635 | /* Disable the TIM Output Compare interrupt */ |
mbed_official | 573:ad23fe03a082 | 636 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 573:ad23fe03a082 | 637 | } |
mbed_official | 573:ad23fe03a082 | 638 | break; |
mbed_official | 573:ad23fe03a082 | 639 | |
mbed_official | 573:ad23fe03a082 | 640 | case TIM_CHANNEL_2: |
mbed_official | 573:ad23fe03a082 | 641 | { |
mbed_official | 573:ad23fe03a082 | 642 | /* Disable the TIM Output Compare interrupt */ |
mbed_official | 573:ad23fe03a082 | 643 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
mbed_official | 573:ad23fe03a082 | 644 | } |
mbed_official | 573:ad23fe03a082 | 645 | break; |
mbed_official | 573:ad23fe03a082 | 646 | |
mbed_official | 573:ad23fe03a082 | 647 | case TIM_CHANNEL_3: |
mbed_official | 573:ad23fe03a082 | 648 | { |
mbed_official | 573:ad23fe03a082 | 649 | /* Disable the TIM Output Compare interrupt */ |
mbed_official | 573:ad23fe03a082 | 650 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
mbed_official | 573:ad23fe03a082 | 651 | } |
mbed_official | 573:ad23fe03a082 | 652 | break; |
mbed_official | 573:ad23fe03a082 | 653 | |
mbed_official | 573:ad23fe03a082 | 654 | case TIM_CHANNEL_4: |
mbed_official | 573:ad23fe03a082 | 655 | { |
mbed_official | 573:ad23fe03a082 | 656 | /* Disable the TIM Output Compare interrupt */ |
mbed_official | 573:ad23fe03a082 | 657 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); |
mbed_official | 573:ad23fe03a082 | 658 | } |
mbed_official | 573:ad23fe03a082 | 659 | break; |
mbed_official | 573:ad23fe03a082 | 660 | |
mbed_official | 573:ad23fe03a082 | 661 | default: |
mbed_official | 573:ad23fe03a082 | 662 | break; |
mbed_official | 573:ad23fe03a082 | 663 | } |
mbed_official | 573:ad23fe03a082 | 664 | |
mbed_official | 573:ad23fe03a082 | 665 | /* Disable the Capture compare channel N */ |
mbed_official | 573:ad23fe03a082 | 666 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
mbed_official | 573:ad23fe03a082 | 667 | |
mbed_official | 573:ad23fe03a082 | 668 | /* Disable the TIM Break interrupt (only if no more channel is active) */ |
mbed_official | 573:ad23fe03a082 | 669 | tmpccer = htim->Instance->CCER; |
mbed_official | 573:ad23fe03a082 | 670 | if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) |
mbed_official | 573:ad23fe03a082 | 671 | { |
mbed_official | 573:ad23fe03a082 | 672 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
mbed_official | 573:ad23fe03a082 | 673 | } |
mbed_official | 573:ad23fe03a082 | 674 | |
mbed_official | 573:ad23fe03a082 | 675 | /* Disable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 676 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 677 | |
mbed_official | 573:ad23fe03a082 | 678 | /* Disable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 679 | __HAL_TIM_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 680 | |
mbed_official | 573:ad23fe03a082 | 681 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 682 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 683 | } |
mbed_official | 573:ad23fe03a082 | 684 | |
mbed_official | 573:ad23fe03a082 | 685 | /** |
mbed_official | 573:ad23fe03a082 | 686 | * @brief Starts the TIM Output Compare signal generation in DMA mode |
mbed_official | 573:ad23fe03a082 | 687 | * on the complementary output. |
mbed_official | 573:ad23fe03a082 | 688 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 689 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 690 | * @param Channel: TIM Channel to be enabled. |
mbed_official | 573:ad23fe03a082 | 691 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 692 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 693 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 694 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 573:ad23fe03a082 | 695 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 573:ad23fe03a082 | 696 | * @param pData: The source Buffer address. |
mbed_official | 573:ad23fe03a082 | 697 | * @param Length: The length of data to be transferred from memory to TIM peripheral |
mbed_official | 573:ad23fe03a082 | 698 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 699 | */ |
mbed_official | 573:ad23fe03a082 | 700 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
mbed_official | 573:ad23fe03a082 | 701 | { |
mbed_official | 573:ad23fe03a082 | 702 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 703 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 573:ad23fe03a082 | 704 | |
mbed_official | 573:ad23fe03a082 | 705 | if((htim->State == HAL_TIM_STATE_BUSY)) |
mbed_official | 573:ad23fe03a082 | 706 | { |
mbed_official | 573:ad23fe03a082 | 707 | return HAL_BUSY; |
mbed_official | 573:ad23fe03a082 | 708 | } |
mbed_official | 573:ad23fe03a082 | 709 | else if((htim->State == HAL_TIM_STATE_READY)) |
mbed_official | 573:ad23fe03a082 | 710 | { |
mbed_official | 573:ad23fe03a082 | 711 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
mbed_official | 573:ad23fe03a082 | 712 | { |
mbed_official | 573:ad23fe03a082 | 713 | return HAL_ERROR; |
mbed_official | 573:ad23fe03a082 | 714 | } |
mbed_official | 573:ad23fe03a082 | 715 | else |
mbed_official | 573:ad23fe03a082 | 716 | { |
mbed_official | 573:ad23fe03a082 | 717 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 718 | } |
mbed_official | 573:ad23fe03a082 | 719 | } |
mbed_official | 573:ad23fe03a082 | 720 | switch (Channel) |
mbed_official | 573:ad23fe03a082 | 721 | { |
mbed_official | 573:ad23fe03a082 | 722 | case TIM_CHANNEL_1: |
mbed_official | 573:ad23fe03a082 | 723 | { |
mbed_official | 573:ad23fe03a082 | 724 | /* Set the DMA Period elapsed callback */ |
mbed_official | 573:ad23fe03a082 | 725 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 573:ad23fe03a082 | 726 | |
mbed_official | 573:ad23fe03a082 | 727 | /* Set the DMA error callback */ |
mbed_official | 573:ad23fe03a082 | 728 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 573:ad23fe03a082 | 729 | |
mbed_official | 573:ad23fe03a082 | 730 | /* Enable the DMA Stream */ |
mbed_official | 573:ad23fe03a082 | 731 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); |
mbed_official | 573:ad23fe03a082 | 732 | |
mbed_official | 573:ad23fe03a082 | 733 | /* Enable the TIM Output Compare DMA request */ |
mbed_official | 573:ad23fe03a082 | 734 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
mbed_official | 573:ad23fe03a082 | 735 | } |
mbed_official | 573:ad23fe03a082 | 736 | break; |
mbed_official | 573:ad23fe03a082 | 737 | |
mbed_official | 573:ad23fe03a082 | 738 | case TIM_CHANNEL_2: |
mbed_official | 573:ad23fe03a082 | 739 | { |
mbed_official | 573:ad23fe03a082 | 740 | /* Set the DMA Period elapsed callback */ |
mbed_official | 573:ad23fe03a082 | 741 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 573:ad23fe03a082 | 742 | |
mbed_official | 573:ad23fe03a082 | 743 | /* Set the DMA error callback */ |
mbed_official | 573:ad23fe03a082 | 744 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 573:ad23fe03a082 | 745 | |
mbed_official | 573:ad23fe03a082 | 746 | /* Enable the DMA Stream */ |
mbed_official | 573:ad23fe03a082 | 747 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); |
mbed_official | 573:ad23fe03a082 | 748 | |
mbed_official | 573:ad23fe03a082 | 749 | /* Enable the TIM Output Compare DMA request */ |
mbed_official | 573:ad23fe03a082 | 750 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
mbed_official | 573:ad23fe03a082 | 751 | } |
mbed_official | 573:ad23fe03a082 | 752 | break; |
mbed_official | 573:ad23fe03a082 | 753 | |
mbed_official | 573:ad23fe03a082 | 754 | case TIM_CHANNEL_3: |
mbed_official | 573:ad23fe03a082 | 755 | { |
mbed_official | 573:ad23fe03a082 | 756 | /* Set the DMA Period elapsed callback */ |
mbed_official | 573:ad23fe03a082 | 757 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 573:ad23fe03a082 | 758 | |
mbed_official | 573:ad23fe03a082 | 759 | /* Set the DMA error callback */ |
mbed_official | 573:ad23fe03a082 | 760 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 573:ad23fe03a082 | 761 | |
mbed_official | 573:ad23fe03a082 | 762 | /* Enable the DMA Stream */ |
mbed_official | 573:ad23fe03a082 | 763 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); |
mbed_official | 573:ad23fe03a082 | 764 | |
mbed_official | 573:ad23fe03a082 | 765 | /* Enable the TIM Output Compare DMA request */ |
mbed_official | 573:ad23fe03a082 | 766 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
mbed_official | 573:ad23fe03a082 | 767 | } |
mbed_official | 573:ad23fe03a082 | 768 | break; |
mbed_official | 573:ad23fe03a082 | 769 | |
mbed_official | 573:ad23fe03a082 | 770 | case TIM_CHANNEL_4: |
mbed_official | 573:ad23fe03a082 | 771 | { |
mbed_official | 573:ad23fe03a082 | 772 | /* Set the DMA Period elapsed callback */ |
mbed_official | 573:ad23fe03a082 | 773 | htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 573:ad23fe03a082 | 774 | |
mbed_official | 573:ad23fe03a082 | 775 | /* Set the DMA error callback */ |
mbed_official | 573:ad23fe03a082 | 776 | htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 573:ad23fe03a082 | 777 | |
mbed_official | 573:ad23fe03a082 | 778 | /* Enable the DMA Stream */ |
mbed_official | 573:ad23fe03a082 | 779 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); |
mbed_official | 573:ad23fe03a082 | 780 | |
mbed_official | 573:ad23fe03a082 | 781 | /* Enable the TIM Output Compare DMA request */ |
mbed_official | 573:ad23fe03a082 | 782 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); |
mbed_official | 573:ad23fe03a082 | 783 | } |
mbed_official | 573:ad23fe03a082 | 784 | break; |
mbed_official | 573:ad23fe03a082 | 785 | |
mbed_official | 573:ad23fe03a082 | 786 | default: |
mbed_official | 573:ad23fe03a082 | 787 | break; |
mbed_official | 573:ad23fe03a082 | 788 | } |
mbed_official | 573:ad23fe03a082 | 789 | |
mbed_official | 573:ad23fe03a082 | 790 | /* Enable the Capture compare channel N */ |
mbed_official | 573:ad23fe03a082 | 791 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
mbed_official | 573:ad23fe03a082 | 792 | |
mbed_official | 573:ad23fe03a082 | 793 | /* Enable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 794 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 795 | |
mbed_official | 573:ad23fe03a082 | 796 | /* Enable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 797 | __HAL_TIM_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 798 | |
mbed_official | 573:ad23fe03a082 | 799 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 800 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 801 | } |
mbed_official | 573:ad23fe03a082 | 802 | |
mbed_official | 573:ad23fe03a082 | 803 | /** |
mbed_official | 573:ad23fe03a082 | 804 | * @brief Stops the TIM Output Compare signal generation in DMA mode |
mbed_official | 573:ad23fe03a082 | 805 | * on the complementary output. |
mbed_official | 573:ad23fe03a082 | 806 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 807 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 808 | * @param Channel: TIM Channel to be disabled. |
mbed_official | 573:ad23fe03a082 | 809 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 810 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 811 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 812 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 573:ad23fe03a082 | 813 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 573:ad23fe03a082 | 814 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 815 | */ |
mbed_official | 573:ad23fe03a082 | 816 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 573:ad23fe03a082 | 817 | { |
mbed_official | 573:ad23fe03a082 | 818 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 819 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 573:ad23fe03a082 | 820 | |
mbed_official | 573:ad23fe03a082 | 821 | switch (Channel) |
mbed_official | 573:ad23fe03a082 | 822 | { |
mbed_official | 573:ad23fe03a082 | 823 | case TIM_CHANNEL_1: |
mbed_official | 573:ad23fe03a082 | 824 | { |
mbed_official | 573:ad23fe03a082 | 825 | /* Disable the TIM Output Compare DMA request */ |
mbed_official | 573:ad23fe03a082 | 826 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
mbed_official | 573:ad23fe03a082 | 827 | } |
mbed_official | 573:ad23fe03a082 | 828 | break; |
mbed_official | 573:ad23fe03a082 | 829 | |
mbed_official | 573:ad23fe03a082 | 830 | case TIM_CHANNEL_2: |
mbed_official | 573:ad23fe03a082 | 831 | { |
mbed_official | 573:ad23fe03a082 | 832 | /* Disable the TIM Output Compare DMA request */ |
mbed_official | 573:ad23fe03a082 | 833 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
mbed_official | 573:ad23fe03a082 | 834 | } |
mbed_official | 573:ad23fe03a082 | 835 | break; |
mbed_official | 573:ad23fe03a082 | 836 | |
mbed_official | 573:ad23fe03a082 | 837 | case TIM_CHANNEL_3: |
mbed_official | 573:ad23fe03a082 | 838 | { |
mbed_official | 573:ad23fe03a082 | 839 | /* Disable the TIM Output Compare DMA request */ |
mbed_official | 573:ad23fe03a082 | 840 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
mbed_official | 573:ad23fe03a082 | 841 | } |
mbed_official | 573:ad23fe03a082 | 842 | break; |
mbed_official | 573:ad23fe03a082 | 843 | |
mbed_official | 573:ad23fe03a082 | 844 | case TIM_CHANNEL_4: |
mbed_official | 573:ad23fe03a082 | 845 | { |
mbed_official | 573:ad23fe03a082 | 846 | /* Disable the TIM Output Compare interrupt */ |
mbed_official | 573:ad23fe03a082 | 847 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); |
mbed_official | 573:ad23fe03a082 | 848 | } |
mbed_official | 573:ad23fe03a082 | 849 | break; |
mbed_official | 573:ad23fe03a082 | 850 | |
mbed_official | 573:ad23fe03a082 | 851 | default: |
mbed_official | 573:ad23fe03a082 | 852 | break; |
mbed_official | 573:ad23fe03a082 | 853 | } |
mbed_official | 573:ad23fe03a082 | 854 | |
mbed_official | 573:ad23fe03a082 | 855 | /* Disable the Capture compare channel N */ |
mbed_official | 573:ad23fe03a082 | 856 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
mbed_official | 573:ad23fe03a082 | 857 | |
mbed_official | 573:ad23fe03a082 | 858 | /* Disable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 859 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 860 | |
mbed_official | 573:ad23fe03a082 | 861 | /* Disable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 862 | __HAL_TIM_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 863 | |
mbed_official | 573:ad23fe03a082 | 864 | /* Change the htim state */ |
mbed_official | 573:ad23fe03a082 | 865 | htim->State = HAL_TIM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 866 | |
mbed_official | 573:ad23fe03a082 | 867 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 868 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 869 | } |
mbed_official | 573:ad23fe03a082 | 870 | |
mbed_official | 573:ad23fe03a082 | 871 | /** |
mbed_official | 573:ad23fe03a082 | 872 | * @} |
mbed_official | 573:ad23fe03a082 | 873 | */ |
mbed_official | 573:ad23fe03a082 | 874 | |
mbed_official | 573:ad23fe03a082 | 875 | /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions |
mbed_official | 573:ad23fe03a082 | 876 | * @brief Timer Complementary PWM functions |
mbed_official | 573:ad23fe03a082 | 877 | * |
mbed_official | 573:ad23fe03a082 | 878 | @verbatim |
mbed_official | 573:ad23fe03a082 | 879 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 880 | ##### Timer Complementary PWM functions ##### |
mbed_official | 573:ad23fe03a082 | 881 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 882 | [..] |
mbed_official | 573:ad23fe03a082 | 883 | This section provides functions allowing to: |
mbed_official | 573:ad23fe03a082 | 884 | (+) Start the Complementary PWM. |
mbed_official | 573:ad23fe03a082 | 885 | (+) Stop the Complementary PWM. |
mbed_official | 573:ad23fe03a082 | 886 | (+) Start the Complementary PWM and enable interrupts. |
mbed_official | 573:ad23fe03a082 | 887 | (+) Stop the Complementary PWM and disable interrupts. |
mbed_official | 573:ad23fe03a082 | 888 | (+) Start the Complementary PWM and enable DMA transfers. |
mbed_official | 573:ad23fe03a082 | 889 | (+) Stop the Complementary PWM and disable DMA transfers. |
mbed_official | 573:ad23fe03a082 | 890 | (+) Start the Complementary Input Capture measurement. |
mbed_official | 573:ad23fe03a082 | 891 | (+) Stop the Complementary Input Capture. |
mbed_official | 573:ad23fe03a082 | 892 | (+) Start the Complementary Input Capture and enable interrupts. |
mbed_official | 573:ad23fe03a082 | 893 | (+) Stop the Complementary Input Capture and disable interrupts. |
mbed_official | 573:ad23fe03a082 | 894 | (+) Start the Complementary Input Capture and enable DMA transfers. |
mbed_official | 573:ad23fe03a082 | 895 | (+) Stop the Complementary Input Capture and disable DMA transfers. |
mbed_official | 573:ad23fe03a082 | 896 | (+) Start the Complementary One Pulse generation. |
mbed_official | 573:ad23fe03a082 | 897 | (+) Stop the Complementary One Pulse. |
mbed_official | 573:ad23fe03a082 | 898 | (+) Start the Complementary One Pulse and enable interrupts. |
mbed_official | 573:ad23fe03a082 | 899 | (+) Stop the Complementary One Pulse and disable interrupts. |
mbed_official | 573:ad23fe03a082 | 900 | |
mbed_official | 573:ad23fe03a082 | 901 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 902 | * @{ |
mbed_official | 573:ad23fe03a082 | 903 | */ |
mbed_official | 573:ad23fe03a082 | 904 | |
mbed_official | 573:ad23fe03a082 | 905 | /** |
mbed_official | 573:ad23fe03a082 | 906 | * @brief Starts the PWM signal generation on the complementary output. |
mbed_official | 573:ad23fe03a082 | 907 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 908 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 909 | * @param Channel: TIM Channel to be enabled. |
mbed_official | 573:ad23fe03a082 | 910 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 911 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 912 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 913 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 573:ad23fe03a082 | 914 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 573:ad23fe03a082 | 915 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 916 | */ |
mbed_official | 573:ad23fe03a082 | 917 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 573:ad23fe03a082 | 918 | { |
mbed_official | 573:ad23fe03a082 | 919 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 920 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 573:ad23fe03a082 | 921 | |
mbed_official | 573:ad23fe03a082 | 922 | /* Enable the complementary PWM output */ |
mbed_official | 573:ad23fe03a082 | 923 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
mbed_official | 573:ad23fe03a082 | 924 | |
mbed_official | 573:ad23fe03a082 | 925 | /* Enable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 926 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 927 | |
mbed_official | 573:ad23fe03a082 | 928 | /* Enable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 929 | __HAL_TIM_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 930 | |
mbed_official | 573:ad23fe03a082 | 931 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 932 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 933 | } |
mbed_official | 573:ad23fe03a082 | 934 | |
mbed_official | 573:ad23fe03a082 | 935 | /** |
mbed_official | 573:ad23fe03a082 | 936 | * @brief Stops the PWM signal generation on the complementary output. |
mbed_official | 573:ad23fe03a082 | 937 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 938 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 939 | * @param Channel: TIM Channel to be disabled. |
mbed_official | 573:ad23fe03a082 | 940 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 941 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 942 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 943 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 573:ad23fe03a082 | 944 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 573:ad23fe03a082 | 945 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 946 | */ |
mbed_official | 573:ad23fe03a082 | 947 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 573:ad23fe03a082 | 948 | { |
mbed_official | 573:ad23fe03a082 | 949 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 950 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 573:ad23fe03a082 | 951 | |
mbed_official | 573:ad23fe03a082 | 952 | /* Disable the complementary PWM output */ |
mbed_official | 573:ad23fe03a082 | 953 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
mbed_official | 573:ad23fe03a082 | 954 | |
mbed_official | 573:ad23fe03a082 | 955 | /* Disable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 956 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 957 | |
mbed_official | 573:ad23fe03a082 | 958 | /* Disable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 959 | __HAL_TIM_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 960 | |
mbed_official | 573:ad23fe03a082 | 961 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 962 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 963 | } |
mbed_official | 573:ad23fe03a082 | 964 | |
mbed_official | 573:ad23fe03a082 | 965 | /** |
mbed_official | 573:ad23fe03a082 | 966 | * @brief Starts the PWM signal generation in interrupt mode on the |
mbed_official | 573:ad23fe03a082 | 967 | * complementary output. |
mbed_official | 573:ad23fe03a082 | 968 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 969 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 970 | * @param Channel: TIM Channel to be disabled. |
mbed_official | 573:ad23fe03a082 | 971 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 972 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 973 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 974 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 573:ad23fe03a082 | 975 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 573:ad23fe03a082 | 976 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 977 | */ |
mbed_official | 573:ad23fe03a082 | 978 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 573:ad23fe03a082 | 979 | { |
mbed_official | 573:ad23fe03a082 | 980 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 981 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 573:ad23fe03a082 | 982 | |
mbed_official | 573:ad23fe03a082 | 983 | switch (Channel) |
mbed_official | 573:ad23fe03a082 | 984 | { |
mbed_official | 573:ad23fe03a082 | 985 | case TIM_CHANNEL_1: |
mbed_official | 573:ad23fe03a082 | 986 | { |
mbed_official | 573:ad23fe03a082 | 987 | /* Enable the TIM Capture/Compare 1 interrupt */ |
mbed_official | 573:ad23fe03a082 | 988 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 573:ad23fe03a082 | 989 | } |
mbed_official | 573:ad23fe03a082 | 990 | break; |
mbed_official | 573:ad23fe03a082 | 991 | |
mbed_official | 573:ad23fe03a082 | 992 | case TIM_CHANNEL_2: |
mbed_official | 573:ad23fe03a082 | 993 | { |
mbed_official | 573:ad23fe03a082 | 994 | /* Enable the TIM Capture/Compare 2 interrupt */ |
mbed_official | 573:ad23fe03a082 | 995 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
mbed_official | 573:ad23fe03a082 | 996 | } |
mbed_official | 573:ad23fe03a082 | 997 | break; |
mbed_official | 573:ad23fe03a082 | 998 | |
mbed_official | 573:ad23fe03a082 | 999 | case TIM_CHANNEL_3: |
mbed_official | 573:ad23fe03a082 | 1000 | { |
mbed_official | 573:ad23fe03a082 | 1001 | /* Enable the TIM Capture/Compare 3 interrupt */ |
mbed_official | 573:ad23fe03a082 | 1002 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
mbed_official | 573:ad23fe03a082 | 1003 | } |
mbed_official | 573:ad23fe03a082 | 1004 | break; |
mbed_official | 573:ad23fe03a082 | 1005 | |
mbed_official | 573:ad23fe03a082 | 1006 | case TIM_CHANNEL_4: |
mbed_official | 573:ad23fe03a082 | 1007 | { |
mbed_official | 573:ad23fe03a082 | 1008 | /* Enable the TIM Capture/Compare 4 interrupt */ |
mbed_official | 573:ad23fe03a082 | 1009 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); |
mbed_official | 573:ad23fe03a082 | 1010 | } |
mbed_official | 573:ad23fe03a082 | 1011 | break; |
mbed_official | 573:ad23fe03a082 | 1012 | |
mbed_official | 573:ad23fe03a082 | 1013 | default: |
mbed_official | 573:ad23fe03a082 | 1014 | break; |
mbed_official | 573:ad23fe03a082 | 1015 | } |
mbed_official | 573:ad23fe03a082 | 1016 | |
mbed_official | 573:ad23fe03a082 | 1017 | /* Enable the TIM Break interrupt */ |
mbed_official | 573:ad23fe03a082 | 1018 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
mbed_official | 573:ad23fe03a082 | 1019 | |
mbed_official | 573:ad23fe03a082 | 1020 | /* Enable the complementary PWM output */ |
mbed_official | 573:ad23fe03a082 | 1021 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
mbed_official | 573:ad23fe03a082 | 1022 | |
mbed_official | 573:ad23fe03a082 | 1023 | /* Enable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 1024 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 1025 | |
mbed_official | 573:ad23fe03a082 | 1026 | /* Enable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 1027 | __HAL_TIM_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 1028 | |
mbed_official | 573:ad23fe03a082 | 1029 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 1030 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 1031 | } |
mbed_official | 573:ad23fe03a082 | 1032 | |
mbed_official | 573:ad23fe03a082 | 1033 | /** |
mbed_official | 573:ad23fe03a082 | 1034 | * @brief Stops the PWM signal generation in interrupt mode on the |
mbed_official | 573:ad23fe03a082 | 1035 | * complementary output. |
mbed_official | 573:ad23fe03a082 | 1036 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 1037 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 1038 | * @param Channel: TIM Channel to be disabled. |
mbed_official | 573:ad23fe03a082 | 1039 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1040 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 1041 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 1042 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 573:ad23fe03a082 | 1043 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 573:ad23fe03a082 | 1044 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 1045 | */ |
mbed_official | 573:ad23fe03a082 | 1046 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 573:ad23fe03a082 | 1047 | { |
mbed_official | 573:ad23fe03a082 | 1048 | uint32_t tmpccer = 0; |
mbed_official | 573:ad23fe03a082 | 1049 | |
mbed_official | 573:ad23fe03a082 | 1050 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1051 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 573:ad23fe03a082 | 1052 | |
mbed_official | 573:ad23fe03a082 | 1053 | switch (Channel) |
mbed_official | 573:ad23fe03a082 | 1054 | { |
mbed_official | 573:ad23fe03a082 | 1055 | case TIM_CHANNEL_1: |
mbed_official | 573:ad23fe03a082 | 1056 | { |
mbed_official | 573:ad23fe03a082 | 1057 | /* Disable the TIM Capture/Compare 1 interrupt */ |
mbed_official | 573:ad23fe03a082 | 1058 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 573:ad23fe03a082 | 1059 | } |
mbed_official | 573:ad23fe03a082 | 1060 | break; |
mbed_official | 573:ad23fe03a082 | 1061 | |
mbed_official | 573:ad23fe03a082 | 1062 | case TIM_CHANNEL_2: |
mbed_official | 573:ad23fe03a082 | 1063 | { |
mbed_official | 573:ad23fe03a082 | 1064 | /* Disable the TIM Capture/Compare 2 interrupt */ |
mbed_official | 573:ad23fe03a082 | 1065 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
mbed_official | 573:ad23fe03a082 | 1066 | } |
mbed_official | 573:ad23fe03a082 | 1067 | break; |
mbed_official | 573:ad23fe03a082 | 1068 | |
mbed_official | 573:ad23fe03a082 | 1069 | case TIM_CHANNEL_3: |
mbed_official | 573:ad23fe03a082 | 1070 | { |
mbed_official | 573:ad23fe03a082 | 1071 | /* Disable the TIM Capture/Compare 3 interrupt */ |
mbed_official | 573:ad23fe03a082 | 1072 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
mbed_official | 573:ad23fe03a082 | 1073 | } |
mbed_official | 573:ad23fe03a082 | 1074 | break; |
mbed_official | 573:ad23fe03a082 | 1075 | |
mbed_official | 573:ad23fe03a082 | 1076 | case TIM_CHANNEL_4: |
mbed_official | 573:ad23fe03a082 | 1077 | { |
mbed_official | 573:ad23fe03a082 | 1078 | /* Disable the TIM Capture/Compare 3 interrupt */ |
mbed_official | 573:ad23fe03a082 | 1079 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); |
mbed_official | 573:ad23fe03a082 | 1080 | } |
mbed_official | 573:ad23fe03a082 | 1081 | break; |
mbed_official | 573:ad23fe03a082 | 1082 | |
mbed_official | 573:ad23fe03a082 | 1083 | default: |
mbed_official | 573:ad23fe03a082 | 1084 | break; |
mbed_official | 573:ad23fe03a082 | 1085 | } |
mbed_official | 573:ad23fe03a082 | 1086 | |
mbed_official | 573:ad23fe03a082 | 1087 | /* Disable the complementary PWM output */ |
mbed_official | 573:ad23fe03a082 | 1088 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
mbed_official | 573:ad23fe03a082 | 1089 | |
mbed_official | 573:ad23fe03a082 | 1090 | /* Disable the TIM Break interrupt (only if no more channel is active) */ |
mbed_official | 573:ad23fe03a082 | 1091 | tmpccer = htim->Instance->CCER; |
mbed_official | 573:ad23fe03a082 | 1092 | if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) |
mbed_official | 573:ad23fe03a082 | 1093 | { |
mbed_official | 573:ad23fe03a082 | 1094 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
mbed_official | 573:ad23fe03a082 | 1095 | } |
mbed_official | 573:ad23fe03a082 | 1096 | |
mbed_official | 573:ad23fe03a082 | 1097 | /* Disable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 1098 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 1099 | |
mbed_official | 573:ad23fe03a082 | 1100 | /* Disable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 1101 | __HAL_TIM_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 1102 | |
mbed_official | 573:ad23fe03a082 | 1103 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 1104 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 1105 | } |
mbed_official | 573:ad23fe03a082 | 1106 | |
mbed_official | 573:ad23fe03a082 | 1107 | /** |
mbed_official | 573:ad23fe03a082 | 1108 | * @brief Starts the TIM PWM signal generation in DMA mode on the |
mbed_official | 573:ad23fe03a082 | 1109 | * complementary output |
mbed_official | 573:ad23fe03a082 | 1110 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 1111 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 1112 | * @param Channel: TIM Channel to be enabled. |
mbed_official | 573:ad23fe03a082 | 1113 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1114 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 1115 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 1116 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 573:ad23fe03a082 | 1117 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 573:ad23fe03a082 | 1118 | * @param pData: The source Buffer address. |
mbed_official | 573:ad23fe03a082 | 1119 | * @param Length: The length of data to be transferred from memory to TIM peripheral |
mbed_official | 573:ad23fe03a082 | 1120 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 1121 | */ |
mbed_official | 573:ad23fe03a082 | 1122 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
mbed_official | 573:ad23fe03a082 | 1123 | { |
mbed_official | 573:ad23fe03a082 | 1124 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1125 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 573:ad23fe03a082 | 1126 | |
mbed_official | 573:ad23fe03a082 | 1127 | if((htim->State == HAL_TIM_STATE_BUSY)) |
mbed_official | 573:ad23fe03a082 | 1128 | { |
mbed_official | 573:ad23fe03a082 | 1129 | return HAL_BUSY; |
mbed_official | 573:ad23fe03a082 | 1130 | } |
mbed_official | 573:ad23fe03a082 | 1131 | else if((htim->State == HAL_TIM_STATE_READY)) |
mbed_official | 573:ad23fe03a082 | 1132 | { |
mbed_official | 573:ad23fe03a082 | 1133 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
mbed_official | 573:ad23fe03a082 | 1134 | { |
mbed_official | 573:ad23fe03a082 | 1135 | return HAL_ERROR; |
mbed_official | 573:ad23fe03a082 | 1136 | } |
mbed_official | 573:ad23fe03a082 | 1137 | else |
mbed_official | 573:ad23fe03a082 | 1138 | { |
mbed_official | 573:ad23fe03a082 | 1139 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 1140 | } |
mbed_official | 573:ad23fe03a082 | 1141 | } |
mbed_official | 573:ad23fe03a082 | 1142 | switch (Channel) |
mbed_official | 573:ad23fe03a082 | 1143 | { |
mbed_official | 573:ad23fe03a082 | 1144 | case TIM_CHANNEL_1: |
mbed_official | 573:ad23fe03a082 | 1145 | { |
mbed_official | 573:ad23fe03a082 | 1146 | /* Set the DMA Period elapsed callback */ |
mbed_official | 573:ad23fe03a082 | 1147 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 573:ad23fe03a082 | 1148 | |
mbed_official | 573:ad23fe03a082 | 1149 | /* Set the DMA error callback */ |
mbed_official | 573:ad23fe03a082 | 1150 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 573:ad23fe03a082 | 1151 | |
mbed_official | 573:ad23fe03a082 | 1152 | /* Enable the DMA Stream */ |
mbed_official | 573:ad23fe03a082 | 1153 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); |
mbed_official | 573:ad23fe03a082 | 1154 | |
mbed_official | 573:ad23fe03a082 | 1155 | /* Enable the TIM Capture/Compare 1 DMA request */ |
mbed_official | 573:ad23fe03a082 | 1156 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
mbed_official | 573:ad23fe03a082 | 1157 | } |
mbed_official | 573:ad23fe03a082 | 1158 | break; |
mbed_official | 573:ad23fe03a082 | 1159 | |
mbed_official | 573:ad23fe03a082 | 1160 | case TIM_CHANNEL_2: |
mbed_official | 573:ad23fe03a082 | 1161 | { |
mbed_official | 573:ad23fe03a082 | 1162 | /* Set the DMA Period elapsed callback */ |
mbed_official | 573:ad23fe03a082 | 1163 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 573:ad23fe03a082 | 1164 | |
mbed_official | 573:ad23fe03a082 | 1165 | /* Set the DMA error callback */ |
mbed_official | 573:ad23fe03a082 | 1166 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 573:ad23fe03a082 | 1167 | |
mbed_official | 573:ad23fe03a082 | 1168 | /* Enable the DMA Stream */ |
mbed_official | 573:ad23fe03a082 | 1169 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); |
mbed_official | 573:ad23fe03a082 | 1170 | |
mbed_official | 573:ad23fe03a082 | 1171 | /* Enable the TIM Capture/Compare 2 DMA request */ |
mbed_official | 573:ad23fe03a082 | 1172 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
mbed_official | 573:ad23fe03a082 | 1173 | } |
mbed_official | 573:ad23fe03a082 | 1174 | break; |
mbed_official | 573:ad23fe03a082 | 1175 | |
mbed_official | 573:ad23fe03a082 | 1176 | case TIM_CHANNEL_3: |
mbed_official | 573:ad23fe03a082 | 1177 | { |
mbed_official | 573:ad23fe03a082 | 1178 | /* Set the DMA Period elapsed callback */ |
mbed_official | 573:ad23fe03a082 | 1179 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 573:ad23fe03a082 | 1180 | |
mbed_official | 573:ad23fe03a082 | 1181 | /* Set the DMA error callback */ |
mbed_official | 573:ad23fe03a082 | 1182 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 573:ad23fe03a082 | 1183 | |
mbed_official | 573:ad23fe03a082 | 1184 | /* Enable the DMA Stream */ |
mbed_official | 573:ad23fe03a082 | 1185 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); |
mbed_official | 573:ad23fe03a082 | 1186 | |
mbed_official | 573:ad23fe03a082 | 1187 | /* Enable the TIM Capture/Compare 3 DMA request */ |
mbed_official | 573:ad23fe03a082 | 1188 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
mbed_official | 573:ad23fe03a082 | 1189 | } |
mbed_official | 573:ad23fe03a082 | 1190 | break; |
mbed_official | 573:ad23fe03a082 | 1191 | |
mbed_official | 573:ad23fe03a082 | 1192 | case TIM_CHANNEL_4: |
mbed_official | 573:ad23fe03a082 | 1193 | { |
mbed_official | 573:ad23fe03a082 | 1194 | /* Set the DMA Period elapsed callback */ |
mbed_official | 573:ad23fe03a082 | 1195 | htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
mbed_official | 573:ad23fe03a082 | 1196 | |
mbed_official | 573:ad23fe03a082 | 1197 | /* Set the DMA error callback */ |
mbed_official | 573:ad23fe03a082 | 1198 | htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ; |
mbed_official | 573:ad23fe03a082 | 1199 | |
mbed_official | 573:ad23fe03a082 | 1200 | /* Enable the DMA Stream */ |
mbed_official | 573:ad23fe03a082 | 1201 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); |
mbed_official | 573:ad23fe03a082 | 1202 | |
mbed_official | 573:ad23fe03a082 | 1203 | /* Enable the TIM Capture/Compare 4 DMA request */ |
mbed_official | 573:ad23fe03a082 | 1204 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); |
mbed_official | 573:ad23fe03a082 | 1205 | } |
mbed_official | 573:ad23fe03a082 | 1206 | break; |
mbed_official | 573:ad23fe03a082 | 1207 | |
mbed_official | 573:ad23fe03a082 | 1208 | default: |
mbed_official | 573:ad23fe03a082 | 1209 | break; |
mbed_official | 573:ad23fe03a082 | 1210 | } |
mbed_official | 573:ad23fe03a082 | 1211 | |
mbed_official | 573:ad23fe03a082 | 1212 | /* Enable the complementary PWM output */ |
mbed_official | 573:ad23fe03a082 | 1213 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
mbed_official | 573:ad23fe03a082 | 1214 | |
mbed_official | 573:ad23fe03a082 | 1215 | /* Enable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 1216 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 1217 | |
mbed_official | 573:ad23fe03a082 | 1218 | /* Enable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 1219 | __HAL_TIM_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 1220 | |
mbed_official | 573:ad23fe03a082 | 1221 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 1222 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 1223 | } |
mbed_official | 573:ad23fe03a082 | 1224 | |
mbed_official | 573:ad23fe03a082 | 1225 | /** |
mbed_official | 573:ad23fe03a082 | 1226 | * @brief Stops the TIM PWM signal generation in DMA mode on the complementary |
mbed_official | 573:ad23fe03a082 | 1227 | * output |
mbed_official | 573:ad23fe03a082 | 1228 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 1229 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 1230 | * @param Channel: TIM Channel to be disabled. |
mbed_official | 573:ad23fe03a082 | 1231 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1232 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 1233 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 1234 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 573:ad23fe03a082 | 1235 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 573:ad23fe03a082 | 1236 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 1237 | */ |
mbed_official | 573:ad23fe03a082 | 1238 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
mbed_official | 573:ad23fe03a082 | 1239 | { |
mbed_official | 573:ad23fe03a082 | 1240 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1241 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
mbed_official | 573:ad23fe03a082 | 1242 | |
mbed_official | 573:ad23fe03a082 | 1243 | switch (Channel) |
mbed_official | 573:ad23fe03a082 | 1244 | { |
mbed_official | 573:ad23fe03a082 | 1245 | case TIM_CHANNEL_1: |
mbed_official | 573:ad23fe03a082 | 1246 | { |
mbed_official | 573:ad23fe03a082 | 1247 | /* Disable the TIM Capture/Compare 1 DMA request */ |
mbed_official | 573:ad23fe03a082 | 1248 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
mbed_official | 573:ad23fe03a082 | 1249 | } |
mbed_official | 573:ad23fe03a082 | 1250 | break; |
mbed_official | 573:ad23fe03a082 | 1251 | |
mbed_official | 573:ad23fe03a082 | 1252 | case TIM_CHANNEL_2: |
mbed_official | 573:ad23fe03a082 | 1253 | { |
mbed_official | 573:ad23fe03a082 | 1254 | /* Disable the TIM Capture/Compare 2 DMA request */ |
mbed_official | 573:ad23fe03a082 | 1255 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
mbed_official | 573:ad23fe03a082 | 1256 | } |
mbed_official | 573:ad23fe03a082 | 1257 | break; |
mbed_official | 573:ad23fe03a082 | 1258 | |
mbed_official | 573:ad23fe03a082 | 1259 | case TIM_CHANNEL_3: |
mbed_official | 573:ad23fe03a082 | 1260 | { |
mbed_official | 573:ad23fe03a082 | 1261 | /* Disable the TIM Capture/Compare 3 DMA request */ |
mbed_official | 573:ad23fe03a082 | 1262 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
mbed_official | 573:ad23fe03a082 | 1263 | } |
mbed_official | 573:ad23fe03a082 | 1264 | break; |
mbed_official | 573:ad23fe03a082 | 1265 | |
mbed_official | 573:ad23fe03a082 | 1266 | case TIM_CHANNEL_4: |
mbed_official | 573:ad23fe03a082 | 1267 | { |
mbed_official | 573:ad23fe03a082 | 1268 | /* Disable the TIM Capture/Compare 4 DMA request */ |
mbed_official | 573:ad23fe03a082 | 1269 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); |
mbed_official | 573:ad23fe03a082 | 1270 | } |
mbed_official | 573:ad23fe03a082 | 1271 | break; |
mbed_official | 573:ad23fe03a082 | 1272 | |
mbed_official | 573:ad23fe03a082 | 1273 | default: |
mbed_official | 573:ad23fe03a082 | 1274 | break; |
mbed_official | 573:ad23fe03a082 | 1275 | } |
mbed_official | 573:ad23fe03a082 | 1276 | |
mbed_official | 573:ad23fe03a082 | 1277 | /* Disable the complementary PWM output */ |
mbed_official | 573:ad23fe03a082 | 1278 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
mbed_official | 573:ad23fe03a082 | 1279 | |
mbed_official | 573:ad23fe03a082 | 1280 | /* Disable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 1281 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 1282 | |
mbed_official | 573:ad23fe03a082 | 1283 | /* Disable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 1284 | __HAL_TIM_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 1285 | |
mbed_official | 573:ad23fe03a082 | 1286 | /* Change the htim state */ |
mbed_official | 573:ad23fe03a082 | 1287 | htim->State = HAL_TIM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 1288 | |
mbed_official | 573:ad23fe03a082 | 1289 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 1290 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 1291 | } |
mbed_official | 573:ad23fe03a082 | 1292 | |
mbed_official | 573:ad23fe03a082 | 1293 | /** |
mbed_official | 573:ad23fe03a082 | 1294 | * @} |
mbed_official | 573:ad23fe03a082 | 1295 | */ |
mbed_official | 573:ad23fe03a082 | 1296 | |
mbed_official | 573:ad23fe03a082 | 1297 | /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions |
mbed_official | 573:ad23fe03a082 | 1298 | * @brief Timer Complementary One Pulse functions |
mbed_official | 573:ad23fe03a082 | 1299 | * |
mbed_official | 573:ad23fe03a082 | 1300 | @verbatim |
mbed_official | 573:ad23fe03a082 | 1301 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 1302 | ##### Timer Complementary One Pulse functions ##### |
mbed_official | 573:ad23fe03a082 | 1303 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 1304 | [..] |
mbed_official | 573:ad23fe03a082 | 1305 | This section provides functions allowing to: |
mbed_official | 573:ad23fe03a082 | 1306 | (+) Start the Complementary One Pulse generation. |
mbed_official | 573:ad23fe03a082 | 1307 | (+) Stop the Complementary One Pulse. |
mbed_official | 573:ad23fe03a082 | 1308 | (+) Start the Complementary One Pulse and enable interrupts. |
mbed_official | 573:ad23fe03a082 | 1309 | (+) Stop the Complementary One Pulse and disable interrupts. |
mbed_official | 573:ad23fe03a082 | 1310 | |
mbed_official | 573:ad23fe03a082 | 1311 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 1312 | * @{ |
mbed_official | 573:ad23fe03a082 | 1313 | */ |
mbed_official | 573:ad23fe03a082 | 1314 | |
mbed_official | 573:ad23fe03a082 | 1315 | /** |
mbed_official | 573:ad23fe03a082 | 1316 | * @brief Starts the TIM One Pulse signal generation on the complemetary |
mbed_official | 573:ad23fe03a082 | 1317 | * output. |
mbed_official | 573:ad23fe03a082 | 1318 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 1319 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 1320 | * @param OutputChannel: TIM Channel to be enabled. |
mbed_official | 573:ad23fe03a082 | 1321 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1322 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 1323 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 1324 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 1325 | */ |
mbed_official | 573:ad23fe03a082 | 1326 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
mbed_official | 573:ad23fe03a082 | 1327 | { |
mbed_official | 573:ad23fe03a082 | 1328 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1329 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
mbed_official | 573:ad23fe03a082 | 1330 | |
mbed_official | 573:ad23fe03a082 | 1331 | /* Enable the complementary One Pulse output */ |
mbed_official | 573:ad23fe03a082 | 1332 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
mbed_official | 573:ad23fe03a082 | 1333 | |
mbed_official | 573:ad23fe03a082 | 1334 | /* Enable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 1335 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 1336 | |
mbed_official | 573:ad23fe03a082 | 1337 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 1338 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 1339 | } |
mbed_official | 573:ad23fe03a082 | 1340 | |
mbed_official | 573:ad23fe03a082 | 1341 | /** |
mbed_official | 573:ad23fe03a082 | 1342 | * @brief Stops the TIM One Pulse signal generation on the complementary |
mbed_official | 573:ad23fe03a082 | 1343 | * output. |
mbed_official | 573:ad23fe03a082 | 1344 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 1345 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 1346 | * @param OutputChannel: TIM Channel to be disabled. |
mbed_official | 573:ad23fe03a082 | 1347 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1348 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 1349 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 1350 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 1351 | */ |
mbed_official | 573:ad23fe03a082 | 1352 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
mbed_official | 573:ad23fe03a082 | 1353 | { |
mbed_official | 573:ad23fe03a082 | 1354 | |
mbed_official | 573:ad23fe03a082 | 1355 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1356 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
mbed_official | 573:ad23fe03a082 | 1357 | |
mbed_official | 573:ad23fe03a082 | 1358 | /* Disable the complementary One Pulse output */ |
mbed_official | 573:ad23fe03a082 | 1359 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
mbed_official | 573:ad23fe03a082 | 1360 | |
mbed_official | 573:ad23fe03a082 | 1361 | /* Disable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 1362 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 1363 | |
mbed_official | 573:ad23fe03a082 | 1364 | /* Disable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 1365 | __HAL_TIM_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 1366 | |
mbed_official | 573:ad23fe03a082 | 1367 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 1368 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 1369 | } |
mbed_official | 573:ad23fe03a082 | 1370 | |
mbed_official | 573:ad23fe03a082 | 1371 | /** |
mbed_official | 573:ad23fe03a082 | 1372 | * @brief Starts the TIM One Pulse signal generation in interrupt mode on the |
mbed_official | 573:ad23fe03a082 | 1373 | * complementary channel. |
mbed_official | 573:ad23fe03a082 | 1374 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 1375 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 1376 | * @param OutputChannel: TIM Channel to be enabled. |
mbed_official | 573:ad23fe03a082 | 1377 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1378 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 1379 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 1380 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 1381 | */ |
mbed_official | 573:ad23fe03a082 | 1382 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
mbed_official | 573:ad23fe03a082 | 1383 | { |
mbed_official | 573:ad23fe03a082 | 1384 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1385 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
mbed_official | 573:ad23fe03a082 | 1386 | |
mbed_official | 573:ad23fe03a082 | 1387 | /* Enable the TIM Capture/Compare 1 interrupt */ |
mbed_official | 573:ad23fe03a082 | 1388 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 573:ad23fe03a082 | 1389 | |
mbed_official | 573:ad23fe03a082 | 1390 | /* Enable the TIM Capture/Compare 2 interrupt */ |
mbed_official | 573:ad23fe03a082 | 1391 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
mbed_official | 573:ad23fe03a082 | 1392 | |
mbed_official | 573:ad23fe03a082 | 1393 | /* Enable the complementary One Pulse output */ |
mbed_official | 573:ad23fe03a082 | 1394 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
mbed_official | 573:ad23fe03a082 | 1395 | |
mbed_official | 573:ad23fe03a082 | 1396 | /* Enable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 1397 | __HAL_TIM_MOE_ENABLE(htim); |
mbed_official | 573:ad23fe03a082 | 1398 | |
mbed_official | 573:ad23fe03a082 | 1399 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 1400 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 1401 | } |
mbed_official | 573:ad23fe03a082 | 1402 | |
mbed_official | 573:ad23fe03a082 | 1403 | /** |
mbed_official | 573:ad23fe03a082 | 1404 | * @brief Stops the TIM One Pulse signal generation in interrupt mode on the |
mbed_official | 573:ad23fe03a082 | 1405 | * complementary channel. |
mbed_official | 573:ad23fe03a082 | 1406 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 1407 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 1408 | * @param OutputChannel: TIM Channel to be disabled. |
mbed_official | 573:ad23fe03a082 | 1409 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1410 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 1411 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 1412 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 1413 | */ |
mbed_official | 573:ad23fe03a082 | 1414 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
mbed_official | 573:ad23fe03a082 | 1415 | { |
mbed_official | 573:ad23fe03a082 | 1416 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1417 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
mbed_official | 573:ad23fe03a082 | 1418 | |
mbed_official | 573:ad23fe03a082 | 1419 | /* Disable the TIM Capture/Compare 1 interrupt */ |
mbed_official | 573:ad23fe03a082 | 1420 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
mbed_official | 573:ad23fe03a082 | 1421 | |
mbed_official | 573:ad23fe03a082 | 1422 | /* Disable the TIM Capture/Compare 2 interrupt */ |
mbed_official | 573:ad23fe03a082 | 1423 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
mbed_official | 573:ad23fe03a082 | 1424 | |
mbed_official | 573:ad23fe03a082 | 1425 | /* Disable the complementary One Pulse output */ |
mbed_official | 573:ad23fe03a082 | 1426 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
mbed_official | 573:ad23fe03a082 | 1427 | |
mbed_official | 573:ad23fe03a082 | 1428 | /* Disable the Main Output */ |
mbed_official | 573:ad23fe03a082 | 1429 | __HAL_TIM_MOE_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 1430 | |
mbed_official | 573:ad23fe03a082 | 1431 | /* Disable the Peripheral */ |
mbed_official | 573:ad23fe03a082 | 1432 | __HAL_TIM_DISABLE(htim); |
mbed_official | 573:ad23fe03a082 | 1433 | |
mbed_official | 573:ad23fe03a082 | 1434 | /* Return function status */ |
mbed_official | 573:ad23fe03a082 | 1435 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 1436 | } |
mbed_official | 573:ad23fe03a082 | 1437 | |
mbed_official | 573:ad23fe03a082 | 1438 | /** |
mbed_official | 573:ad23fe03a082 | 1439 | * @} |
mbed_official | 573:ad23fe03a082 | 1440 | */ |
mbed_official | 573:ad23fe03a082 | 1441 | |
mbed_official | 573:ad23fe03a082 | 1442 | /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions |
mbed_official | 573:ad23fe03a082 | 1443 | * @brief Peripheral Control functions |
mbed_official | 573:ad23fe03a082 | 1444 | * |
mbed_official | 573:ad23fe03a082 | 1445 | @verbatim |
mbed_official | 573:ad23fe03a082 | 1446 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 1447 | ##### Peripheral Control functions ##### |
mbed_official | 573:ad23fe03a082 | 1448 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 1449 | [..] |
mbed_official | 573:ad23fe03a082 | 1450 | This section provides functions allowing to: |
mbed_official | 573:ad23fe03a082 | 1451 | (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode. |
mbed_official | 573:ad23fe03a082 | 1452 | (+) Configure External Clock source. |
mbed_official | 573:ad23fe03a082 | 1453 | (+) Configure Complementary channels, break features and dead time. |
mbed_official | 573:ad23fe03a082 | 1454 | (+) Configure Master and the Slave synchronization. |
mbed_official | 573:ad23fe03a082 | 1455 | (+) Configure the commutation event in case of use of the Hall sensor interface. |
mbed_official | 573:ad23fe03a082 | 1456 | (+) Configure the DMA Burst Mode. |
mbed_official | 573:ad23fe03a082 | 1457 | |
mbed_official | 573:ad23fe03a082 | 1458 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 1459 | * @{ |
mbed_official | 573:ad23fe03a082 | 1460 | */ |
mbed_official | 573:ad23fe03a082 | 1461 | /** |
mbed_official | 573:ad23fe03a082 | 1462 | * @brief Configure the TIM commutation event sequence. |
mbed_official | 573:ad23fe03a082 | 1463 | * @note This function is mandatory to use the commutation event in order to |
mbed_official | 573:ad23fe03a082 | 1464 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
mbed_official | 573:ad23fe03a082 | 1465 | * the typical use of this feature is with the use of another Timer(interface Timer) |
mbed_official | 573:ad23fe03a082 | 1466 | * configured in Hall sensor interface, this interface Timer will generate the |
mbed_official | 573:ad23fe03a082 | 1467 | * commutation at its TRGO output (connected to Timer used in this function) each time |
mbed_official | 573:ad23fe03a082 | 1468 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
mbed_official | 573:ad23fe03a082 | 1469 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 1470 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 1471 | * @param InputTrigger: the Internal trigger corresponding to the Timer Interfacing with the Hall sensor. |
mbed_official | 573:ad23fe03a082 | 1472 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1473 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
mbed_official | 573:ad23fe03a082 | 1474 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
mbed_official | 573:ad23fe03a082 | 1475 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
mbed_official | 573:ad23fe03a082 | 1476 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
mbed_official | 573:ad23fe03a082 | 1477 | * @arg TIM_TS_NONE: No trigger is needed |
mbed_official | 573:ad23fe03a082 | 1478 | * @param CommutationSource: the Commutation Event source. |
mbed_official | 573:ad23fe03a082 | 1479 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1480 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
mbed_official | 573:ad23fe03a082 | 1481 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
mbed_official | 573:ad23fe03a082 | 1482 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 1483 | */ |
mbed_official | 573:ad23fe03a082 | 1484 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
mbed_official | 573:ad23fe03a082 | 1485 | { |
mbed_official | 573:ad23fe03a082 | 1486 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1487 | assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1488 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
mbed_official | 573:ad23fe03a082 | 1489 | |
mbed_official | 573:ad23fe03a082 | 1490 | __HAL_LOCK(htim); |
mbed_official | 573:ad23fe03a082 | 1491 | |
mbed_official | 573:ad23fe03a082 | 1492 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
mbed_official | 573:ad23fe03a082 | 1493 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
mbed_official | 573:ad23fe03a082 | 1494 | { |
mbed_official | 573:ad23fe03a082 | 1495 | /* Select the Input trigger */ |
mbed_official | 573:ad23fe03a082 | 1496 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
mbed_official | 573:ad23fe03a082 | 1497 | htim->Instance->SMCR |= InputTrigger; |
mbed_official | 573:ad23fe03a082 | 1498 | } |
mbed_official | 573:ad23fe03a082 | 1499 | |
mbed_official | 573:ad23fe03a082 | 1500 | /* Select the Capture Compare preload feature */ |
mbed_official | 573:ad23fe03a082 | 1501 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
mbed_official | 573:ad23fe03a082 | 1502 | /* Select the Commutation event source */ |
mbed_official | 573:ad23fe03a082 | 1503 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
mbed_official | 573:ad23fe03a082 | 1504 | htim->Instance->CR2 |= CommutationSource; |
mbed_official | 573:ad23fe03a082 | 1505 | |
mbed_official | 573:ad23fe03a082 | 1506 | __HAL_UNLOCK(htim); |
mbed_official | 573:ad23fe03a082 | 1507 | |
mbed_official | 573:ad23fe03a082 | 1508 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 1509 | } |
mbed_official | 573:ad23fe03a082 | 1510 | |
mbed_official | 573:ad23fe03a082 | 1511 | /** |
mbed_official | 573:ad23fe03a082 | 1512 | * @brief Configure the TIM commutation event sequence with interrupt. |
mbed_official | 573:ad23fe03a082 | 1513 | * @note This function is mandatory to use the commutation event in order to |
mbed_official | 573:ad23fe03a082 | 1514 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
mbed_official | 573:ad23fe03a082 | 1515 | * the typical use of this feature is with the use of another Timer(interface Timer) |
mbed_official | 573:ad23fe03a082 | 1516 | * configured in Hall sensor interface, this interface Timer will generate the |
mbed_official | 573:ad23fe03a082 | 1517 | * commutation at its TRGO output (connected to Timer used in this function) each time |
mbed_official | 573:ad23fe03a082 | 1518 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
mbed_official | 573:ad23fe03a082 | 1519 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 1520 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 1521 | * @param InputTrigger: the Internal trigger corresponding to the Timer Interfacing with the Hall sensor. |
mbed_official | 573:ad23fe03a082 | 1522 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1523 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
mbed_official | 573:ad23fe03a082 | 1524 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
mbed_official | 573:ad23fe03a082 | 1525 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
mbed_official | 573:ad23fe03a082 | 1526 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
mbed_official | 573:ad23fe03a082 | 1527 | * @arg TIM_TS_NONE: No trigger is needed |
mbed_official | 573:ad23fe03a082 | 1528 | * @param CommutationSource: the Commutation Event source. |
mbed_official | 573:ad23fe03a082 | 1529 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1530 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
mbed_official | 573:ad23fe03a082 | 1531 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
mbed_official | 573:ad23fe03a082 | 1532 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 1533 | */ |
mbed_official | 573:ad23fe03a082 | 1534 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
mbed_official | 573:ad23fe03a082 | 1535 | { |
mbed_official | 573:ad23fe03a082 | 1536 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1537 | assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1538 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
mbed_official | 573:ad23fe03a082 | 1539 | |
mbed_official | 573:ad23fe03a082 | 1540 | __HAL_LOCK(htim); |
mbed_official | 573:ad23fe03a082 | 1541 | |
mbed_official | 573:ad23fe03a082 | 1542 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
mbed_official | 573:ad23fe03a082 | 1543 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
mbed_official | 573:ad23fe03a082 | 1544 | { |
mbed_official | 573:ad23fe03a082 | 1545 | /* Select the Input trigger */ |
mbed_official | 573:ad23fe03a082 | 1546 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
mbed_official | 573:ad23fe03a082 | 1547 | htim->Instance->SMCR |= InputTrigger; |
mbed_official | 573:ad23fe03a082 | 1548 | } |
mbed_official | 573:ad23fe03a082 | 1549 | |
mbed_official | 573:ad23fe03a082 | 1550 | /* Select the Capture Compare preload feature */ |
mbed_official | 573:ad23fe03a082 | 1551 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
mbed_official | 573:ad23fe03a082 | 1552 | /* Select the Commutation event source */ |
mbed_official | 573:ad23fe03a082 | 1553 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
mbed_official | 573:ad23fe03a082 | 1554 | htim->Instance->CR2 |= CommutationSource; |
mbed_official | 573:ad23fe03a082 | 1555 | |
mbed_official | 573:ad23fe03a082 | 1556 | /* Enable the Commutation Interrupt Request */ |
mbed_official | 573:ad23fe03a082 | 1557 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); |
mbed_official | 573:ad23fe03a082 | 1558 | |
mbed_official | 573:ad23fe03a082 | 1559 | __HAL_UNLOCK(htim); |
mbed_official | 573:ad23fe03a082 | 1560 | |
mbed_official | 573:ad23fe03a082 | 1561 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 1562 | } |
mbed_official | 573:ad23fe03a082 | 1563 | |
mbed_official | 573:ad23fe03a082 | 1564 | /** |
mbed_official | 573:ad23fe03a082 | 1565 | * @brief Configure the TIM commutation event sequence with DMA. |
mbed_official | 573:ad23fe03a082 | 1566 | * @note This function is mandatory to use the commutation event in order to |
mbed_official | 573:ad23fe03a082 | 1567 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
mbed_official | 573:ad23fe03a082 | 1568 | * the typical use of this feature is with the use of another Timer(interface Timer) |
mbed_official | 573:ad23fe03a082 | 1569 | * configured in Hall sensor interface, this interface Timer will generate the |
mbed_official | 573:ad23fe03a082 | 1570 | * commutation at its TRGO output (connected to Timer used in this function) each time |
mbed_official | 573:ad23fe03a082 | 1571 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
mbed_official | 573:ad23fe03a082 | 1572 | * @note: The user should configure the DMA in his own software, in This function only the COMDE bit is set |
mbed_official | 573:ad23fe03a082 | 1573 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 1574 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 1575 | * @param InputTrigger: the Internal trigger corresponding to the Timer Interfacing with the Hall sensor. |
mbed_official | 573:ad23fe03a082 | 1576 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1577 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
mbed_official | 573:ad23fe03a082 | 1578 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
mbed_official | 573:ad23fe03a082 | 1579 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
mbed_official | 573:ad23fe03a082 | 1580 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
mbed_official | 573:ad23fe03a082 | 1581 | * @arg TIM_TS_NONE: No trigger is needed |
mbed_official | 573:ad23fe03a082 | 1582 | * @param CommutationSource: the Commutation Event source. |
mbed_official | 573:ad23fe03a082 | 1583 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1584 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
mbed_official | 573:ad23fe03a082 | 1585 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
mbed_official | 573:ad23fe03a082 | 1586 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 1587 | */ |
mbed_official | 573:ad23fe03a082 | 1588 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
mbed_official | 573:ad23fe03a082 | 1589 | { |
mbed_official | 573:ad23fe03a082 | 1590 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1591 | assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1592 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
mbed_official | 573:ad23fe03a082 | 1593 | |
mbed_official | 573:ad23fe03a082 | 1594 | __HAL_LOCK(htim); |
mbed_official | 573:ad23fe03a082 | 1595 | |
mbed_official | 573:ad23fe03a082 | 1596 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
mbed_official | 573:ad23fe03a082 | 1597 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
mbed_official | 573:ad23fe03a082 | 1598 | { |
mbed_official | 573:ad23fe03a082 | 1599 | /* Select the Input trigger */ |
mbed_official | 573:ad23fe03a082 | 1600 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
mbed_official | 573:ad23fe03a082 | 1601 | htim->Instance->SMCR |= InputTrigger; |
mbed_official | 573:ad23fe03a082 | 1602 | } |
mbed_official | 573:ad23fe03a082 | 1603 | |
mbed_official | 573:ad23fe03a082 | 1604 | /* Select the Capture Compare preload feature */ |
mbed_official | 573:ad23fe03a082 | 1605 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
mbed_official | 573:ad23fe03a082 | 1606 | /* Select the Commutation event source */ |
mbed_official | 573:ad23fe03a082 | 1607 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
mbed_official | 573:ad23fe03a082 | 1608 | htim->Instance->CR2 |= CommutationSource; |
mbed_official | 573:ad23fe03a082 | 1609 | |
mbed_official | 573:ad23fe03a082 | 1610 | /* Enable the Commutation DMA Request */ |
mbed_official | 573:ad23fe03a082 | 1611 | /* Set the DMA Commutation Callback */ |
mbed_official | 573:ad23fe03a082 | 1612 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = HAL_TIMEx_DMACommutationCplt; |
mbed_official | 573:ad23fe03a082 | 1613 | /* Set the DMA error callback */ |
mbed_official | 573:ad23fe03a082 | 1614 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = HAL_TIM_DMAError; |
mbed_official | 573:ad23fe03a082 | 1615 | |
mbed_official | 573:ad23fe03a082 | 1616 | /* Enable the Commutation DMA Request */ |
mbed_official | 573:ad23fe03a082 | 1617 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); |
mbed_official | 573:ad23fe03a082 | 1618 | |
mbed_official | 573:ad23fe03a082 | 1619 | __HAL_UNLOCK(htim); |
mbed_official | 573:ad23fe03a082 | 1620 | |
mbed_official | 573:ad23fe03a082 | 1621 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 1622 | } |
mbed_official | 573:ad23fe03a082 | 1623 | |
mbed_official | 573:ad23fe03a082 | 1624 | /** |
mbed_official | 573:ad23fe03a082 | 1625 | * @brief Initializes the TIM Output Compare Channels according to the specified |
mbed_official | 573:ad23fe03a082 | 1626 | * parameters in the TIM_OC_InitTypeDef. |
mbed_official | 573:ad23fe03a082 | 1627 | * @param htim: TIM Output Compare handle |
mbed_official | 573:ad23fe03a082 | 1628 | * @param sConfig: TIM Output Compare configuration structure |
mbed_official | 573:ad23fe03a082 | 1629 | * @param Channel : TIM Channels to configure |
mbed_official | 573:ad23fe03a082 | 1630 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1631 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 1632 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 1633 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 573:ad23fe03a082 | 1634 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 573:ad23fe03a082 | 1635 | * @arg TIM_CHANNEL_5: TIM Channel 5 selected |
mbed_official | 573:ad23fe03a082 | 1636 | * @arg TIM_CHANNEL_6: TIM Channel 6 selected |
mbed_official | 573:ad23fe03a082 | 1637 | * @arg TIM_CHANNEL_ALL: all output channels supported by the timer instance selected |
mbed_official | 573:ad23fe03a082 | 1638 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 1639 | */ |
mbed_official | 573:ad23fe03a082 | 1640 | HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel) |
mbed_official | 573:ad23fe03a082 | 1641 | { |
mbed_official | 573:ad23fe03a082 | 1642 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1643 | assert_param(IS_TIM_CHANNELS(Channel)); |
mbed_official | 573:ad23fe03a082 | 1644 | assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); |
mbed_official | 573:ad23fe03a082 | 1645 | assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); |
mbed_official | 573:ad23fe03a082 | 1646 | assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity)); |
mbed_official | 573:ad23fe03a082 | 1647 | assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState)); |
mbed_official | 573:ad23fe03a082 | 1648 | assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState)); |
mbed_official | 573:ad23fe03a082 | 1649 | |
mbed_official | 573:ad23fe03a082 | 1650 | /* Check input state */ |
mbed_official | 573:ad23fe03a082 | 1651 | __HAL_LOCK(htim); |
mbed_official | 573:ad23fe03a082 | 1652 | |
mbed_official | 573:ad23fe03a082 | 1653 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 1654 | |
mbed_official | 573:ad23fe03a082 | 1655 | switch (Channel) |
mbed_official | 573:ad23fe03a082 | 1656 | { |
mbed_official | 573:ad23fe03a082 | 1657 | case TIM_CHANNEL_1: |
mbed_official | 573:ad23fe03a082 | 1658 | { |
mbed_official | 573:ad23fe03a082 | 1659 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1660 | assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1661 | |
mbed_official | 573:ad23fe03a082 | 1662 | /* Configure the TIM Channel 1 in Output Compare */ |
mbed_official | 573:ad23fe03a082 | 1663 | TIM_OC1_SetConfig(htim->Instance, sConfig); |
mbed_official | 573:ad23fe03a082 | 1664 | } |
mbed_official | 573:ad23fe03a082 | 1665 | break; |
mbed_official | 573:ad23fe03a082 | 1666 | |
mbed_official | 573:ad23fe03a082 | 1667 | case TIM_CHANNEL_2: |
mbed_official | 573:ad23fe03a082 | 1668 | { |
mbed_official | 573:ad23fe03a082 | 1669 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1670 | assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1671 | |
mbed_official | 573:ad23fe03a082 | 1672 | /* Configure the TIM Channel 2 in Output Compare */ |
mbed_official | 573:ad23fe03a082 | 1673 | TIM_OC2_SetConfig(htim->Instance, sConfig); |
mbed_official | 573:ad23fe03a082 | 1674 | } |
mbed_official | 573:ad23fe03a082 | 1675 | break; |
mbed_official | 573:ad23fe03a082 | 1676 | |
mbed_official | 573:ad23fe03a082 | 1677 | case TIM_CHANNEL_3: |
mbed_official | 573:ad23fe03a082 | 1678 | { |
mbed_official | 573:ad23fe03a082 | 1679 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1680 | assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1681 | |
mbed_official | 573:ad23fe03a082 | 1682 | /* Configure the TIM Channel 3 in Output Compare */ |
mbed_official | 573:ad23fe03a082 | 1683 | TIM_OC3_SetConfig(htim->Instance, sConfig); |
mbed_official | 573:ad23fe03a082 | 1684 | } |
mbed_official | 573:ad23fe03a082 | 1685 | break; |
mbed_official | 573:ad23fe03a082 | 1686 | |
mbed_official | 573:ad23fe03a082 | 1687 | case TIM_CHANNEL_4: |
mbed_official | 573:ad23fe03a082 | 1688 | { |
mbed_official | 573:ad23fe03a082 | 1689 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1690 | assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1691 | |
mbed_official | 573:ad23fe03a082 | 1692 | /* Configure the TIM Channel 4 in Output Compare */ |
mbed_official | 573:ad23fe03a082 | 1693 | TIM_OC4_SetConfig(htim->Instance, sConfig); |
mbed_official | 573:ad23fe03a082 | 1694 | } |
mbed_official | 573:ad23fe03a082 | 1695 | break; |
mbed_official | 573:ad23fe03a082 | 1696 | |
mbed_official | 573:ad23fe03a082 | 1697 | case TIM_CHANNEL_5: |
mbed_official | 573:ad23fe03a082 | 1698 | { |
mbed_official | 573:ad23fe03a082 | 1699 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1700 | assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1701 | |
mbed_official | 573:ad23fe03a082 | 1702 | /* Configure the TIM Channel 5 in Output Compare */ |
mbed_official | 573:ad23fe03a082 | 1703 | TIM_OC5_SetConfig(htim->Instance, sConfig); |
mbed_official | 573:ad23fe03a082 | 1704 | } |
mbed_official | 573:ad23fe03a082 | 1705 | break; |
mbed_official | 573:ad23fe03a082 | 1706 | |
mbed_official | 573:ad23fe03a082 | 1707 | case TIM_CHANNEL_6: |
mbed_official | 573:ad23fe03a082 | 1708 | { |
mbed_official | 573:ad23fe03a082 | 1709 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1710 | assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1711 | |
mbed_official | 573:ad23fe03a082 | 1712 | /* Configure the TIM Channel 6 in Output Compare */ |
mbed_official | 573:ad23fe03a082 | 1713 | TIM_OC6_SetConfig(htim->Instance, sConfig); |
mbed_official | 573:ad23fe03a082 | 1714 | } |
mbed_official | 573:ad23fe03a082 | 1715 | break; |
mbed_official | 573:ad23fe03a082 | 1716 | |
mbed_official | 573:ad23fe03a082 | 1717 | default: |
mbed_official | 573:ad23fe03a082 | 1718 | break; |
mbed_official | 573:ad23fe03a082 | 1719 | } |
mbed_official | 573:ad23fe03a082 | 1720 | |
mbed_official | 573:ad23fe03a082 | 1721 | htim->State = HAL_TIM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 1722 | |
mbed_official | 573:ad23fe03a082 | 1723 | __HAL_UNLOCK(htim); |
mbed_official | 573:ad23fe03a082 | 1724 | |
mbed_official | 573:ad23fe03a082 | 1725 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 1726 | } |
mbed_official | 573:ad23fe03a082 | 1727 | |
mbed_official | 573:ad23fe03a082 | 1728 | /** |
mbed_official | 573:ad23fe03a082 | 1729 | * @brief Initializes the TIM PWM channels according to the specified |
mbed_official | 573:ad23fe03a082 | 1730 | * parameters in the TIM_OC_InitTypeDef. |
mbed_official | 573:ad23fe03a082 | 1731 | * @param htim: TIM PWM handle |
mbed_official | 573:ad23fe03a082 | 1732 | * @param sConfig: TIM PWM configuration structure |
mbed_official | 573:ad23fe03a082 | 1733 | * @param Channel : TIM Channels to be configured |
mbed_official | 573:ad23fe03a082 | 1734 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1735 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
mbed_official | 573:ad23fe03a082 | 1736 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
mbed_official | 573:ad23fe03a082 | 1737 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
mbed_official | 573:ad23fe03a082 | 1738 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
mbed_official | 573:ad23fe03a082 | 1739 | * @arg TIM_CHANNEL_5: TIM Channel 5 selected |
mbed_official | 573:ad23fe03a082 | 1740 | * @arg TIM_CHANNEL_6: TIM Channel 6 selected |
mbed_official | 573:ad23fe03a082 | 1741 | * @arg TIM_CHANNEL_ALL: all PWM channels supported by the timer instance selected |
mbed_official | 573:ad23fe03a082 | 1742 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 1743 | */ |
mbed_official | 573:ad23fe03a082 | 1744 | HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, |
mbed_official | 573:ad23fe03a082 | 1745 | TIM_OC_InitTypeDef* sConfig, |
mbed_official | 573:ad23fe03a082 | 1746 | uint32_t Channel) |
mbed_official | 573:ad23fe03a082 | 1747 | { |
mbed_official | 573:ad23fe03a082 | 1748 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1749 | assert_param(IS_TIM_CHANNELS(Channel)); |
mbed_official | 573:ad23fe03a082 | 1750 | assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); |
mbed_official | 573:ad23fe03a082 | 1751 | assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); |
mbed_official | 573:ad23fe03a082 | 1752 | assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity)); |
mbed_official | 573:ad23fe03a082 | 1753 | assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); |
mbed_official | 573:ad23fe03a082 | 1754 | assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState)); |
mbed_official | 573:ad23fe03a082 | 1755 | assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState)); |
mbed_official | 573:ad23fe03a082 | 1756 | |
mbed_official | 573:ad23fe03a082 | 1757 | /* Check input state */ |
mbed_official | 573:ad23fe03a082 | 1758 | __HAL_LOCK(htim); |
mbed_official | 573:ad23fe03a082 | 1759 | |
mbed_official | 573:ad23fe03a082 | 1760 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 1761 | |
mbed_official | 573:ad23fe03a082 | 1762 | switch (Channel) |
mbed_official | 573:ad23fe03a082 | 1763 | { |
mbed_official | 573:ad23fe03a082 | 1764 | case TIM_CHANNEL_1: |
mbed_official | 573:ad23fe03a082 | 1765 | { |
mbed_official | 573:ad23fe03a082 | 1766 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1767 | assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1768 | |
mbed_official | 573:ad23fe03a082 | 1769 | /* Configure the Channel 1 in PWM mode */ |
mbed_official | 573:ad23fe03a082 | 1770 | TIM_OC1_SetConfig(htim->Instance, sConfig); |
mbed_official | 573:ad23fe03a082 | 1771 | |
mbed_official | 573:ad23fe03a082 | 1772 | /* Set the Preload enable bit for channel1 */ |
mbed_official | 573:ad23fe03a082 | 1773 | htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; |
mbed_official | 573:ad23fe03a082 | 1774 | |
mbed_official | 573:ad23fe03a082 | 1775 | /* Configure the Output Fast mode */ |
mbed_official | 573:ad23fe03a082 | 1776 | htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; |
mbed_official | 573:ad23fe03a082 | 1777 | htim->Instance->CCMR1 |= sConfig->OCFastMode; |
mbed_official | 573:ad23fe03a082 | 1778 | } |
mbed_official | 573:ad23fe03a082 | 1779 | break; |
mbed_official | 573:ad23fe03a082 | 1780 | |
mbed_official | 573:ad23fe03a082 | 1781 | case TIM_CHANNEL_2: |
mbed_official | 573:ad23fe03a082 | 1782 | { |
mbed_official | 573:ad23fe03a082 | 1783 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1784 | assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1785 | |
mbed_official | 573:ad23fe03a082 | 1786 | /* Configure the Channel 2 in PWM mode */ |
mbed_official | 573:ad23fe03a082 | 1787 | TIM_OC2_SetConfig(htim->Instance, sConfig); |
mbed_official | 573:ad23fe03a082 | 1788 | |
mbed_official | 573:ad23fe03a082 | 1789 | /* Set the Preload enable bit for channel2 */ |
mbed_official | 573:ad23fe03a082 | 1790 | htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; |
mbed_official | 573:ad23fe03a082 | 1791 | |
mbed_official | 573:ad23fe03a082 | 1792 | /* Configure the Output Fast mode */ |
mbed_official | 573:ad23fe03a082 | 1793 | htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; |
mbed_official | 573:ad23fe03a082 | 1794 | htim->Instance->CCMR1 |= sConfig->OCFastMode << 8; |
mbed_official | 573:ad23fe03a082 | 1795 | } |
mbed_official | 573:ad23fe03a082 | 1796 | break; |
mbed_official | 573:ad23fe03a082 | 1797 | |
mbed_official | 573:ad23fe03a082 | 1798 | case TIM_CHANNEL_3: |
mbed_official | 573:ad23fe03a082 | 1799 | { |
mbed_official | 573:ad23fe03a082 | 1800 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1801 | assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1802 | |
mbed_official | 573:ad23fe03a082 | 1803 | /* Configure the Channel 3 in PWM mode */ |
mbed_official | 573:ad23fe03a082 | 1804 | TIM_OC3_SetConfig(htim->Instance, sConfig); |
mbed_official | 573:ad23fe03a082 | 1805 | |
mbed_official | 573:ad23fe03a082 | 1806 | /* Set the Preload enable bit for channel3 */ |
mbed_official | 573:ad23fe03a082 | 1807 | htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; |
mbed_official | 573:ad23fe03a082 | 1808 | |
mbed_official | 573:ad23fe03a082 | 1809 | /* Configure the Output Fast mode */ |
mbed_official | 573:ad23fe03a082 | 1810 | htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; |
mbed_official | 573:ad23fe03a082 | 1811 | htim->Instance->CCMR2 |= sConfig->OCFastMode; |
mbed_official | 573:ad23fe03a082 | 1812 | } |
mbed_official | 573:ad23fe03a082 | 1813 | break; |
mbed_official | 573:ad23fe03a082 | 1814 | |
mbed_official | 573:ad23fe03a082 | 1815 | case TIM_CHANNEL_4: |
mbed_official | 573:ad23fe03a082 | 1816 | { |
mbed_official | 573:ad23fe03a082 | 1817 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1818 | assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1819 | |
mbed_official | 573:ad23fe03a082 | 1820 | /* Configure the Channel 4 in PWM mode */ |
mbed_official | 573:ad23fe03a082 | 1821 | TIM_OC4_SetConfig(htim->Instance, sConfig); |
mbed_official | 573:ad23fe03a082 | 1822 | |
mbed_official | 573:ad23fe03a082 | 1823 | /* Set the Preload enable bit for channel4 */ |
mbed_official | 573:ad23fe03a082 | 1824 | htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; |
mbed_official | 573:ad23fe03a082 | 1825 | |
mbed_official | 573:ad23fe03a082 | 1826 | /* Configure the Output Fast mode */ |
mbed_official | 573:ad23fe03a082 | 1827 | htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; |
mbed_official | 573:ad23fe03a082 | 1828 | htim->Instance->CCMR2 |= sConfig->OCFastMode << 8; |
mbed_official | 573:ad23fe03a082 | 1829 | } |
mbed_official | 573:ad23fe03a082 | 1830 | break; |
mbed_official | 573:ad23fe03a082 | 1831 | |
mbed_official | 573:ad23fe03a082 | 1832 | case TIM_CHANNEL_5: |
mbed_official | 573:ad23fe03a082 | 1833 | { |
mbed_official | 573:ad23fe03a082 | 1834 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1835 | assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1836 | |
mbed_official | 573:ad23fe03a082 | 1837 | /* Configure the Channel 5 in PWM mode */ |
mbed_official | 573:ad23fe03a082 | 1838 | TIM_OC5_SetConfig(htim->Instance, sConfig); |
mbed_official | 573:ad23fe03a082 | 1839 | |
mbed_official | 573:ad23fe03a082 | 1840 | /* Set the Preload enable bit for channel5*/ |
mbed_official | 573:ad23fe03a082 | 1841 | htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; |
mbed_official | 573:ad23fe03a082 | 1842 | |
mbed_official | 573:ad23fe03a082 | 1843 | /* Configure the Output Fast mode */ |
mbed_official | 573:ad23fe03a082 | 1844 | htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; |
mbed_official | 573:ad23fe03a082 | 1845 | htim->Instance->CCMR3 |= sConfig->OCFastMode; |
mbed_official | 573:ad23fe03a082 | 1846 | } |
mbed_official | 573:ad23fe03a082 | 1847 | break; |
mbed_official | 573:ad23fe03a082 | 1848 | |
mbed_official | 573:ad23fe03a082 | 1849 | case TIM_CHANNEL_6: |
mbed_official | 573:ad23fe03a082 | 1850 | { |
mbed_official | 573:ad23fe03a082 | 1851 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1852 | assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1853 | |
mbed_official | 573:ad23fe03a082 | 1854 | /* Configure the Channel 5 in PWM mode */ |
mbed_official | 573:ad23fe03a082 | 1855 | TIM_OC6_SetConfig(htim->Instance, sConfig); |
mbed_official | 573:ad23fe03a082 | 1856 | |
mbed_official | 573:ad23fe03a082 | 1857 | /* Set the Preload enable bit for channel6 */ |
mbed_official | 573:ad23fe03a082 | 1858 | htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE; |
mbed_official | 573:ad23fe03a082 | 1859 | |
mbed_official | 573:ad23fe03a082 | 1860 | /* Configure the Output Fast mode */ |
mbed_official | 573:ad23fe03a082 | 1861 | htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE; |
mbed_official | 573:ad23fe03a082 | 1862 | htim->Instance->CCMR3 |= sConfig->OCFastMode << 8; |
mbed_official | 573:ad23fe03a082 | 1863 | } |
mbed_official | 573:ad23fe03a082 | 1864 | break; |
mbed_official | 573:ad23fe03a082 | 1865 | |
mbed_official | 573:ad23fe03a082 | 1866 | default: |
mbed_official | 573:ad23fe03a082 | 1867 | break; |
mbed_official | 573:ad23fe03a082 | 1868 | } |
mbed_official | 573:ad23fe03a082 | 1869 | |
mbed_official | 573:ad23fe03a082 | 1870 | htim->State = HAL_TIM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 1871 | |
mbed_official | 573:ad23fe03a082 | 1872 | __HAL_UNLOCK(htim); |
mbed_official | 573:ad23fe03a082 | 1873 | |
mbed_official | 573:ad23fe03a082 | 1874 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 1875 | } |
mbed_official | 573:ad23fe03a082 | 1876 | |
mbed_official | 573:ad23fe03a082 | 1877 | /** |
mbed_official | 573:ad23fe03a082 | 1878 | * @brief Configures the OCRef clear feature |
mbed_official | 573:ad23fe03a082 | 1879 | * @param htim: TIM handle |
mbed_official | 573:ad23fe03a082 | 1880 | * @param sClearInputConfig: pointer to a TIM_ClearInputConfigTypeDef structure that |
mbed_official | 573:ad23fe03a082 | 1881 | * contains the OCREF clear feature and parameters for the TIM peripheral. |
mbed_official | 573:ad23fe03a082 | 1882 | * @param Channel: specifies the TIM Channel |
mbed_official | 573:ad23fe03a082 | 1883 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 1884 | * @arg TIM_Channel_1: TIM Channel 1 |
mbed_official | 573:ad23fe03a082 | 1885 | * @arg TIM_Channel_2: TIM Channel 2 |
mbed_official | 573:ad23fe03a082 | 1886 | * @arg TIM_Channel_3: TIM Channel 3 |
mbed_official | 573:ad23fe03a082 | 1887 | * @arg TIM_Channel_4: TIM Channel 4 |
mbed_official | 573:ad23fe03a082 | 1888 | * @arg TIM_Channel_5: TIM Channel 5 |
mbed_official | 573:ad23fe03a082 | 1889 | * @arg TIM_Channel_6: TIM Channel 6 |
mbed_official | 573:ad23fe03a082 | 1890 | * @retval None |
mbed_official | 573:ad23fe03a082 | 1891 | */ |
mbed_official | 573:ad23fe03a082 | 1892 | HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, |
mbed_official | 573:ad23fe03a082 | 1893 | TIM_ClearInputConfigTypeDef *sClearInputConfig, |
mbed_official | 573:ad23fe03a082 | 1894 | uint32_t Channel) |
mbed_official | 573:ad23fe03a082 | 1895 | { |
mbed_official | 573:ad23fe03a082 | 1896 | uint32_t tmpsmcr = 0; |
mbed_official | 573:ad23fe03a082 | 1897 | |
mbed_official | 573:ad23fe03a082 | 1898 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1899 | assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 1900 | assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource)); |
mbed_official | 573:ad23fe03a082 | 1901 | |
mbed_official | 573:ad23fe03a082 | 1902 | /* Check input state */ |
mbed_official | 573:ad23fe03a082 | 1903 | __HAL_LOCK(htim); |
mbed_official | 573:ad23fe03a082 | 1904 | |
mbed_official | 573:ad23fe03a082 | 1905 | switch (sClearInputConfig->ClearInputSource) |
mbed_official | 573:ad23fe03a082 | 1906 | { |
mbed_official | 573:ad23fe03a082 | 1907 | case TIM_CLEARINPUTSOURCE_NONE: |
mbed_official | 573:ad23fe03a082 | 1908 | { |
mbed_official | 573:ad23fe03a082 | 1909 | /* Clear the OCREF clear selection bit */ |
mbed_official | 573:ad23fe03a082 | 1910 | tmpsmcr &= ~TIM_SMCR_OCCS; |
mbed_official | 573:ad23fe03a082 | 1911 | |
mbed_official | 573:ad23fe03a082 | 1912 | /* Clear the ETR Bits */ |
mbed_official | 573:ad23fe03a082 | 1913 | tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); |
mbed_official | 573:ad23fe03a082 | 1914 | |
mbed_official | 573:ad23fe03a082 | 1915 | /* Set TIMx_SMCR */ |
mbed_official | 573:ad23fe03a082 | 1916 | htim->Instance->SMCR = tmpsmcr; |
mbed_official | 573:ad23fe03a082 | 1917 | } |
mbed_official | 573:ad23fe03a082 | 1918 | break; |
mbed_official | 573:ad23fe03a082 | 1919 | |
mbed_official | 573:ad23fe03a082 | 1920 | case TIM_CLEARINPUTSOURCE_OCREFCLR: |
mbed_official | 573:ad23fe03a082 | 1921 | { |
mbed_official | 573:ad23fe03a082 | 1922 | /* Clear the OCREF clear selection bit */ |
mbed_official | 573:ad23fe03a082 | 1923 | htim->Instance->SMCR &= ~TIM_SMCR_OCCS; |
mbed_official | 573:ad23fe03a082 | 1924 | } |
mbed_official | 573:ad23fe03a082 | 1925 | break; |
mbed_official | 573:ad23fe03a082 | 1926 | |
mbed_official | 573:ad23fe03a082 | 1927 | case TIM_CLEARINPUTSOURCE_ETR: |
mbed_official | 573:ad23fe03a082 | 1928 | { |
mbed_official | 573:ad23fe03a082 | 1929 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 1930 | assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity)); |
mbed_official | 573:ad23fe03a082 | 1931 | assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler)); |
mbed_official | 573:ad23fe03a082 | 1932 | assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter)); |
mbed_official | 573:ad23fe03a082 | 1933 | |
mbed_official | 573:ad23fe03a082 | 1934 | TIM_ETR_SetConfig(htim->Instance, |
mbed_official | 573:ad23fe03a082 | 1935 | sClearInputConfig->ClearInputPrescaler, |
mbed_official | 573:ad23fe03a082 | 1936 | sClearInputConfig->ClearInputPolarity, |
mbed_official | 573:ad23fe03a082 | 1937 | sClearInputConfig->ClearInputFilter); |
mbed_official | 573:ad23fe03a082 | 1938 | |
mbed_official | 573:ad23fe03a082 | 1939 | /* Set the OCREF clear selection bit */ |
mbed_official | 573:ad23fe03a082 | 1940 | htim->Instance->SMCR |= TIM_SMCR_OCCS; |
mbed_official | 573:ad23fe03a082 | 1941 | } |
mbed_official | 573:ad23fe03a082 | 1942 | break; |
mbed_official | 573:ad23fe03a082 | 1943 | default: |
mbed_official | 573:ad23fe03a082 | 1944 | break; |
mbed_official | 573:ad23fe03a082 | 1945 | } |
mbed_official | 573:ad23fe03a082 | 1946 | |
mbed_official | 573:ad23fe03a082 | 1947 | switch (Channel) |
mbed_official | 573:ad23fe03a082 | 1948 | { |
mbed_official | 573:ad23fe03a082 | 1949 | case TIM_CHANNEL_1: |
mbed_official | 573:ad23fe03a082 | 1950 | { |
mbed_official | 573:ad23fe03a082 | 1951 | if(sClearInputConfig->ClearInputState != RESET) |
mbed_official | 573:ad23fe03a082 | 1952 | { |
mbed_official | 573:ad23fe03a082 | 1953 | /* Enable the Ocref clear feature for Channel 1 */ |
mbed_official | 573:ad23fe03a082 | 1954 | htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE; |
mbed_official | 573:ad23fe03a082 | 1955 | } |
mbed_official | 573:ad23fe03a082 | 1956 | else |
mbed_official | 573:ad23fe03a082 | 1957 | { |
mbed_official | 573:ad23fe03a082 | 1958 | /* Disable the Ocref clear feature for Channel 1 */ |
mbed_official | 573:ad23fe03a082 | 1959 | htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE; |
mbed_official | 573:ad23fe03a082 | 1960 | } |
mbed_official | 573:ad23fe03a082 | 1961 | } |
mbed_official | 573:ad23fe03a082 | 1962 | break; |
mbed_official | 573:ad23fe03a082 | 1963 | case TIM_CHANNEL_2: |
mbed_official | 573:ad23fe03a082 | 1964 | { |
mbed_official | 573:ad23fe03a082 | 1965 | if(sClearInputConfig->ClearInputState != RESET) |
mbed_official | 573:ad23fe03a082 | 1966 | { |
mbed_official | 573:ad23fe03a082 | 1967 | /* Enable the Ocref clear feature for Channel 2 */ |
mbed_official | 573:ad23fe03a082 | 1968 | htim->Instance->CCMR1 |= TIM_CCMR1_OC2CE; |
mbed_official | 573:ad23fe03a082 | 1969 | } |
mbed_official | 573:ad23fe03a082 | 1970 | else |
mbed_official | 573:ad23fe03a082 | 1971 | { |
mbed_official | 573:ad23fe03a082 | 1972 | /* Disable the Ocref clear feature for Channel 2 */ |
mbed_official | 573:ad23fe03a082 | 1973 | htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE; |
mbed_official | 573:ad23fe03a082 | 1974 | } |
mbed_official | 573:ad23fe03a082 | 1975 | } |
mbed_official | 573:ad23fe03a082 | 1976 | break; |
mbed_official | 573:ad23fe03a082 | 1977 | case TIM_CHANNEL_3: |
mbed_official | 573:ad23fe03a082 | 1978 | { |
mbed_official | 573:ad23fe03a082 | 1979 | if(sClearInputConfig->ClearInputState != RESET) |
mbed_official | 573:ad23fe03a082 | 1980 | { |
mbed_official | 573:ad23fe03a082 | 1981 | /* Enable the Ocref clear feature for Channel 3 */ |
mbed_official | 573:ad23fe03a082 | 1982 | htim->Instance->CCMR2 |= TIM_CCMR2_OC3CE; |
mbed_official | 573:ad23fe03a082 | 1983 | } |
mbed_official | 573:ad23fe03a082 | 1984 | else |
mbed_official | 573:ad23fe03a082 | 1985 | { |
mbed_official | 573:ad23fe03a082 | 1986 | /* Disable the Ocref clear feature for Channel 3 */ |
mbed_official | 573:ad23fe03a082 | 1987 | htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE; |
mbed_official | 573:ad23fe03a082 | 1988 | } |
mbed_official | 573:ad23fe03a082 | 1989 | } |
mbed_official | 573:ad23fe03a082 | 1990 | break; |
mbed_official | 573:ad23fe03a082 | 1991 | case TIM_CHANNEL_4: |
mbed_official | 573:ad23fe03a082 | 1992 | { |
mbed_official | 573:ad23fe03a082 | 1993 | if(sClearInputConfig->ClearInputState != RESET) |
mbed_official | 573:ad23fe03a082 | 1994 | { |
mbed_official | 573:ad23fe03a082 | 1995 | /* Enable the Ocref clear feature for Channel 4 */ |
mbed_official | 573:ad23fe03a082 | 1996 | htim->Instance->CCMR2 |= TIM_CCMR2_OC4CE; |
mbed_official | 573:ad23fe03a082 | 1997 | } |
mbed_official | 573:ad23fe03a082 | 1998 | else |
mbed_official | 573:ad23fe03a082 | 1999 | { |
mbed_official | 573:ad23fe03a082 | 2000 | /* Disable the Ocref clear feature for Channel 4 */ |
mbed_official | 573:ad23fe03a082 | 2001 | htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE; |
mbed_official | 573:ad23fe03a082 | 2002 | } |
mbed_official | 573:ad23fe03a082 | 2003 | } |
mbed_official | 573:ad23fe03a082 | 2004 | break; |
mbed_official | 573:ad23fe03a082 | 2005 | case TIM_CHANNEL_5: |
mbed_official | 573:ad23fe03a082 | 2006 | { |
mbed_official | 573:ad23fe03a082 | 2007 | if(sClearInputConfig->ClearInputState != RESET) |
mbed_official | 573:ad23fe03a082 | 2008 | { |
mbed_official | 573:ad23fe03a082 | 2009 | /* Enable the Ocref clear feature for Channel 1 */ |
mbed_official | 573:ad23fe03a082 | 2010 | htim->Instance->CCMR3 |= TIM_CCMR3_OC5CE; |
mbed_official | 573:ad23fe03a082 | 2011 | } |
mbed_official | 573:ad23fe03a082 | 2012 | else |
mbed_official | 573:ad23fe03a082 | 2013 | { |
mbed_official | 573:ad23fe03a082 | 2014 | /* Disable the Ocref clear feature for Channel 1 */ |
mbed_official | 573:ad23fe03a082 | 2015 | htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5CE; |
mbed_official | 573:ad23fe03a082 | 2016 | } |
mbed_official | 573:ad23fe03a082 | 2017 | } |
mbed_official | 573:ad23fe03a082 | 2018 | break; |
mbed_official | 573:ad23fe03a082 | 2019 | case TIM_CHANNEL_6: |
mbed_official | 573:ad23fe03a082 | 2020 | { |
mbed_official | 573:ad23fe03a082 | 2021 | if(sClearInputConfig->ClearInputState != RESET) |
mbed_official | 573:ad23fe03a082 | 2022 | { |
mbed_official | 573:ad23fe03a082 | 2023 | /* Enable the Ocref clear feature for Channel 1 */ |
mbed_official | 573:ad23fe03a082 | 2024 | htim->Instance->CCMR3 |= TIM_CCMR3_OC6CE; |
mbed_official | 573:ad23fe03a082 | 2025 | } |
mbed_official | 573:ad23fe03a082 | 2026 | else |
mbed_official | 573:ad23fe03a082 | 2027 | { |
mbed_official | 573:ad23fe03a082 | 2028 | /* Disable the Ocref clear feature for Channel 1 */ |
mbed_official | 573:ad23fe03a082 | 2029 | htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6CE; |
mbed_official | 573:ad23fe03a082 | 2030 | } |
mbed_official | 573:ad23fe03a082 | 2031 | } |
mbed_official | 573:ad23fe03a082 | 2032 | break; |
mbed_official | 573:ad23fe03a082 | 2033 | default: |
mbed_official | 573:ad23fe03a082 | 2034 | break; |
mbed_official | 573:ad23fe03a082 | 2035 | } |
mbed_official | 573:ad23fe03a082 | 2036 | |
mbed_official | 573:ad23fe03a082 | 2037 | __HAL_UNLOCK(htim); |
mbed_official | 573:ad23fe03a082 | 2038 | |
mbed_official | 573:ad23fe03a082 | 2039 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 2040 | } |
mbed_official | 573:ad23fe03a082 | 2041 | |
mbed_official | 573:ad23fe03a082 | 2042 | /** |
mbed_official | 573:ad23fe03a082 | 2043 | * @brief Configures the TIM in master mode. |
mbed_official | 573:ad23fe03a082 | 2044 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 2045 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 2046 | * @param sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that |
mbed_official | 573:ad23fe03a082 | 2047 | * contains the selected trigger output (TRGO) and the Master/Slave |
mbed_official | 573:ad23fe03a082 | 2048 | * mode. |
mbed_official | 573:ad23fe03a082 | 2049 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 2050 | */ |
mbed_official | 573:ad23fe03a082 | 2051 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig) |
mbed_official | 573:ad23fe03a082 | 2052 | { |
mbed_official | 573:ad23fe03a082 | 2053 | uint32_t tmpcr2; |
mbed_official | 573:ad23fe03a082 | 2054 | uint32_t tmpsmcr; |
mbed_official | 573:ad23fe03a082 | 2055 | |
mbed_official | 573:ad23fe03a082 | 2056 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 2057 | assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 2058 | assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); |
mbed_official | 573:ad23fe03a082 | 2059 | assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); |
mbed_official | 573:ad23fe03a082 | 2060 | |
mbed_official | 573:ad23fe03a082 | 2061 | /* Check input state */ |
mbed_official | 573:ad23fe03a082 | 2062 | __HAL_LOCK(htim); |
mbed_official | 573:ad23fe03a082 | 2063 | |
mbed_official | 573:ad23fe03a082 | 2064 | /* Get the TIMx CR2 register value */ |
mbed_official | 573:ad23fe03a082 | 2065 | tmpcr2 = htim->Instance->CR2; |
mbed_official | 573:ad23fe03a082 | 2066 | |
mbed_official | 573:ad23fe03a082 | 2067 | /* Get the TIMx SMCR register value */ |
mbed_official | 573:ad23fe03a082 | 2068 | tmpsmcr = htim->Instance->SMCR; |
mbed_official | 573:ad23fe03a082 | 2069 | |
mbed_official | 573:ad23fe03a082 | 2070 | /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */ |
mbed_official | 573:ad23fe03a082 | 2071 | if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) |
mbed_official | 573:ad23fe03a082 | 2072 | { |
mbed_official | 573:ad23fe03a082 | 2073 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 2074 | assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2)); |
mbed_official | 573:ad23fe03a082 | 2075 | |
mbed_official | 573:ad23fe03a082 | 2076 | /* Clear the MMS2 bits */ |
mbed_official | 573:ad23fe03a082 | 2077 | tmpcr2 &= ~TIM_CR2_MMS2; |
mbed_official | 573:ad23fe03a082 | 2078 | /* Select the TRGO2 source*/ |
mbed_official | 573:ad23fe03a082 | 2079 | tmpcr2 |= sMasterConfig->MasterOutputTrigger2; |
mbed_official | 573:ad23fe03a082 | 2080 | } |
mbed_official | 573:ad23fe03a082 | 2081 | |
mbed_official | 573:ad23fe03a082 | 2082 | /* Reset the MMS Bits */ |
mbed_official | 573:ad23fe03a082 | 2083 | tmpcr2 &= ~TIM_CR2_MMS; |
mbed_official | 573:ad23fe03a082 | 2084 | /* Select the TRGO source */ |
mbed_official | 573:ad23fe03a082 | 2085 | tmpcr2 |= sMasterConfig->MasterOutputTrigger; |
mbed_official | 573:ad23fe03a082 | 2086 | |
mbed_official | 573:ad23fe03a082 | 2087 | /* Reset the MSM Bit */ |
mbed_official | 573:ad23fe03a082 | 2088 | tmpsmcr &= ~TIM_SMCR_MSM; |
mbed_official | 573:ad23fe03a082 | 2089 | /* Set master mode */ |
mbed_official | 573:ad23fe03a082 | 2090 | tmpsmcr |= sMasterConfig->MasterSlaveMode; |
mbed_official | 573:ad23fe03a082 | 2091 | |
mbed_official | 573:ad23fe03a082 | 2092 | /* Update TIMx CR2 */ |
mbed_official | 573:ad23fe03a082 | 2093 | htim->Instance->CR2 = tmpcr2; |
mbed_official | 573:ad23fe03a082 | 2094 | |
mbed_official | 573:ad23fe03a082 | 2095 | /* Update TIMx SMCR */ |
mbed_official | 573:ad23fe03a082 | 2096 | htim->Instance->SMCR = tmpsmcr; |
mbed_official | 573:ad23fe03a082 | 2097 | |
mbed_official | 573:ad23fe03a082 | 2098 | __HAL_UNLOCK(htim); |
mbed_official | 573:ad23fe03a082 | 2099 | |
mbed_official | 573:ad23fe03a082 | 2100 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 2101 | } |
mbed_official | 573:ad23fe03a082 | 2102 | |
mbed_official | 573:ad23fe03a082 | 2103 | /** |
mbed_official | 573:ad23fe03a082 | 2104 | * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State |
mbed_official | 573:ad23fe03a082 | 2105 | * and the AOE(automatic output enable). |
mbed_official | 573:ad23fe03a082 | 2106 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 2107 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 2108 | * @param sBreakDeadTimeConfig: pointer to a TIM_ConfigBreakDeadConfig_TypeDef structure that |
mbed_official | 573:ad23fe03a082 | 2109 | * contains the BDTR Register configuration information for the TIM peripheral. |
mbed_official | 573:ad23fe03a082 | 2110 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 2111 | */ |
mbed_official | 573:ad23fe03a082 | 2112 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, |
mbed_official | 573:ad23fe03a082 | 2113 | TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig) |
mbed_official | 573:ad23fe03a082 | 2114 | { |
mbed_official | 573:ad23fe03a082 | 2115 | uint32_t tmpbdtr = 0; |
mbed_official | 573:ad23fe03a082 | 2116 | |
mbed_official | 573:ad23fe03a082 | 2117 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 2118 | assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 2119 | assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); |
mbed_official | 573:ad23fe03a082 | 2120 | assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); |
mbed_official | 573:ad23fe03a082 | 2121 | assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); |
mbed_official | 573:ad23fe03a082 | 2122 | assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); |
mbed_official | 573:ad23fe03a082 | 2123 | assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); |
mbed_official | 573:ad23fe03a082 | 2124 | assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); |
mbed_official | 573:ad23fe03a082 | 2125 | assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter)); |
mbed_official | 573:ad23fe03a082 | 2126 | assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); |
mbed_official | 573:ad23fe03a082 | 2127 | assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State)); |
mbed_official | 573:ad23fe03a082 | 2128 | assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity)); |
mbed_official | 573:ad23fe03a082 | 2129 | assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter)); |
mbed_official | 573:ad23fe03a082 | 2130 | |
mbed_official | 573:ad23fe03a082 | 2131 | /* Check input state */ |
mbed_official | 573:ad23fe03a082 | 2132 | __HAL_LOCK(htim); |
mbed_official | 573:ad23fe03a082 | 2133 | |
mbed_official | 573:ad23fe03a082 | 2134 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 2135 | |
mbed_official | 573:ad23fe03a082 | 2136 | /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, |
mbed_official | 573:ad23fe03a082 | 2137 | the OSSI State, the dead time value and the Automatic Output Enable Bit */ |
mbed_official | 573:ad23fe03a082 | 2138 | |
mbed_official | 573:ad23fe03a082 | 2139 | /* Clear the BDTR bits */ |
mbed_official | 573:ad23fe03a082 | 2140 | tmpbdtr &= ~(TIM_BDTR_DTG | TIM_BDTR_LOCK | TIM_BDTR_OSSI | |
mbed_official | 573:ad23fe03a082 | 2141 | TIM_BDTR_OSSR | TIM_BDTR_BKE | TIM_BDTR_BKP | |
mbed_official | 573:ad23fe03a082 | 2142 | TIM_BDTR_AOE | TIM_BDTR_MOE | TIM_BDTR_BKF | |
mbed_official | 573:ad23fe03a082 | 2143 | TIM_BDTR_BK2F | TIM_BDTR_BK2E | TIM_BDTR_BK2P); |
mbed_official | 573:ad23fe03a082 | 2144 | |
mbed_official | 573:ad23fe03a082 | 2145 | /* Set the BDTR bits */ |
mbed_official | 573:ad23fe03a082 | 2146 | tmpbdtr |= sBreakDeadTimeConfig->DeadTime; |
mbed_official | 573:ad23fe03a082 | 2147 | tmpbdtr |= sBreakDeadTimeConfig->LockLevel; |
mbed_official | 573:ad23fe03a082 | 2148 | tmpbdtr |= sBreakDeadTimeConfig->OffStateIDLEMode; |
mbed_official | 573:ad23fe03a082 | 2149 | tmpbdtr |= sBreakDeadTimeConfig->OffStateRunMode; |
mbed_official | 573:ad23fe03a082 | 2150 | tmpbdtr |= sBreakDeadTimeConfig->BreakState; |
mbed_official | 573:ad23fe03a082 | 2151 | tmpbdtr |= sBreakDeadTimeConfig->BreakPolarity; |
mbed_official | 573:ad23fe03a082 | 2152 | tmpbdtr |= sBreakDeadTimeConfig->AutomaticOutput; |
mbed_official | 573:ad23fe03a082 | 2153 | tmpbdtr |= (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT); |
mbed_official | 573:ad23fe03a082 | 2154 | tmpbdtr |= (sBreakDeadTimeConfig->Break2Filter << BDTR_BK2F_SHIFT); |
mbed_official | 573:ad23fe03a082 | 2155 | tmpbdtr |= sBreakDeadTimeConfig->Break2State; |
mbed_official | 573:ad23fe03a082 | 2156 | tmpbdtr |= sBreakDeadTimeConfig->Break2Polarity; |
mbed_official | 573:ad23fe03a082 | 2157 | |
mbed_official | 573:ad23fe03a082 | 2158 | /* Set TIMx_BDTR */ |
mbed_official | 573:ad23fe03a082 | 2159 | htim->Instance->BDTR = tmpbdtr; |
mbed_official | 573:ad23fe03a082 | 2160 | |
mbed_official | 573:ad23fe03a082 | 2161 | __HAL_UNLOCK(htim); |
mbed_official | 573:ad23fe03a082 | 2162 | |
mbed_official | 573:ad23fe03a082 | 2163 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 2164 | } |
mbed_official | 573:ad23fe03a082 | 2165 | |
mbed_official | 573:ad23fe03a082 | 2166 | /** |
mbed_official | 573:ad23fe03a082 | 2167 | * @brief Configures the TIM2, TIM5 and TIM11 Remapping input capabilities. |
mbed_official | 573:ad23fe03a082 | 2168 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 2169 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 2170 | * @param Remap: specifies the TIM input remapping source. |
mbed_official | 573:ad23fe03a082 | 2171 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 2172 | * @arg TIM_TIM2_TIM8_TRGO: TIM2 ITR1 input is connected to TIM8 Trigger output(default) |
mbed_official | 573:ad23fe03a082 | 2173 | * @arg TIM_TIM2_ETH_PTP: TIM2 ITR1 input is connected to ETH PTP trigger output. |
mbed_official | 573:ad23fe03a082 | 2174 | * @arg TIM_TIM2_USBFS_SOF: TIM2 ITR1 input is connected to USB FS SOF. |
mbed_official | 573:ad23fe03a082 | 2175 | * @arg TIM_TIM2_USBHS_SOF: TIM2 ITR1 input is connected to USB HS SOF. |
mbed_official | 573:ad23fe03a082 | 2176 | * @arg TIM_TIM5_GPIO: TIM5 CH4 input is connected to dedicated Timer pin(default) |
mbed_official | 573:ad23fe03a082 | 2177 | * @arg TIM_TIM5_LSI: TIM5 CH4 input is connected to LSI clock. |
mbed_official | 573:ad23fe03a082 | 2178 | * @arg TIM_TIM5_LSE: TIM5 CH4 input is connected to LSE clock. |
mbed_official | 573:ad23fe03a082 | 2179 | * @arg TIM_TIM5_RTC: TIM5 CH4 input is connected to RTC Output event. |
mbed_official | 573:ad23fe03a082 | 2180 | * @arg TIM_TIM11_GPIO: TIM11 CH4 input is connected to dedicated Timer pin(default) |
mbed_official | 573:ad23fe03a082 | 2181 | * @arg TIM_TIM11_SPDIF: SPDIF Frame synchronous |
mbed_official | 573:ad23fe03a082 | 2182 | * @arg TIM_TIM11_HSE: TIM11 CH4 input is connected to HSE_RTC clock |
mbed_official | 573:ad23fe03a082 | 2183 | * (HSE divided by a programmable prescaler) |
mbed_official | 573:ad23fe03a082 | 2184 | * @arg TIM_TIM11_MCO1: TIM11 CH1 input is connected to MCO1 |
mbed_official | 573:ad23fe03a082 | 2185 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 2186 | */ |
mbed_official | 573:ad23fe03a082 | 2187 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) |
mbed_official | 573:ad23fe03a082 | 2188 | { |
mbed_official | 573:ad23fe03a082 | 2189 | __HAL_LOCK(htim); |
mbed_official | 573:ad23fe03a082 | 2190 | |
mbed_official | 573:ad23fe03a082 | 2191 | /* Check parameters */ |
mbed_official | 573:ad23fe03a082 | 2192 | assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 2193 | assert_param(IS_TIM_REMAP(Remap)); |
mbed_official | 573:ad23fe03a082 | 2194 | |
mbed_official | 573:ad23fe03a082 | 2195 | /* Set the Timer remapping configuration */ |
mbed_official | 573:ad23fe03a082 | 2196 | htim->Instance->OR = Remap; |
mbed_official | 573:ad23fe03a082 | 2197 | |
mbed_official | 573:ad23fe03a082 | 2198 | htim->State = HAL_TIM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 2199 | |
mbed_official | 573:ad23fe03a082 | 2200 | __HAL_UNLOCK(htim); |
mbed_official | 573:ad23fe03a082 | 2201 | |
mbed_official | 573:ad23fe03a082 | 2202 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 2203 | } |
mbed_official | 573:ad23fe03a082 | 2204 | |
mbed_official | 573:ad23fe03a082 | 2205 | /** |
mbed_official | 573:ad23fe03a082 | 2206 | * @brief Group channel 5 and channel 1, 2 or 3 |
mbed_official | 573:ad23fe03a082 | 2207 | * @param htim: TIM handle. |
mbed_official | 573:ad23fe03a082 | 2208 | * @param OCRef: specifies the reference signal(s) the OC5REF is combined with. |
mbed_official | 573:ad23fe03a082 | 2209 | * This parameter can be any combination of the following values: |
mbed_official | 573:ad23fe03a082 | 2210 | * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC |
mbed_official | 573:ad23fe03a082 | 2211 | * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF |
mbed_official | 573:ad23fe03a082 | 2212 | * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF |
mbed_official | 573:ad23fe03a082 | 2213 | * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF |
mbed_official | 573:ad23fe03a082 | 2214 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 2215 | */ |
mbed_official | 573:ad23fe03a082 | 2216 | HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t OCRef) |
mbed_official | 573:ad23fe03a082 | 2217 | { |
mbed_official | 573:ad23fe03a082 | 2218 | /* Check parameters */ |
mbed_official | 573:ad23fe03a082 | 2219 | assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance)); |
mbed_official | 573:ad23fe03a082 | 2220 | assert_param(IS_TIM_GROUPCH5(OCRef)); |
mbed_official | 573:ad23fe03a082 | 2221 | |
mbed_official | 573:ad23fe03a082 | 2222 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 2223 | __HAL_LOCK(htim); |
mbed_official | 573:ad23fe03a082 | 2224 | |
mbed_official | 573:ad23fe03a082 | 2225 | htim->State = HAL_TIM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 2226 | |
mbed_official | 573:ad23fe03a082 | 2227 | /* Clear GC5Cx bit fields */ |
mbed_official | 573:ad23fe03a082 | 2228 | htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3|TIM_CCR5_GC5C2|TIM_CCR5_GC5C1); |
mbed_official | 573:ad23fe03a082 | 2229 | |
mbed_official | 573:ad23fe03a082 | 2230 | /* Set GC5Cx bit fields */ |
mbed_official | 573:ad23fe03a082 | 2231 | htim->Instance->CCR5 |= OCRef; |
mbed_official | 573:ad23fe03a082 | 2232 | |
mbed_official | 573:ad23fe03a082 | 2233 | htim->State = HAL_TIM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 2234 | |
mbed_official | 573:ad23fe03a082 | 2235 | __HAL_UNLOCK(htim); |
mbed_official | 573:ad23fe03a082 | 2236 | |
mbed_official | 573:ad23fe03a082 | 2237 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 2238 | } |
mbed_official | 573:ad23fe03a082 | 2239 | |
mbed_official | 573:ad23fe03a082 | 2240 | /** |
mbed_official | 573:ad23fe03a082 | 2241 | * @} |
mbed_official | 573:ad23fe03a082 | 2242 | */ |
mbed_official | 573:ad23fe03a082 | 2243 | |
mbed_official | 573:ad23fe03a082 | 2244 | /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions |
mbed_official | 573:ad23fe03a082 | 2245 | * @brief Extended Callbacks functions |
mbed_official | 573:ad23fe03a082 | 2246 | * |
mbed_official | 573:ad23fe03a082 | 2247 | @verbatim |
mbed_official | 573:ad23fe03a082 | 2248 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 2249 | ##### Extension Callbacks functions ##### |
mbed_official | 573:ad23fe03a082 | 2250 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 2251 | [..] |
mbed_official | 573:ad23fe03a082 | 2252 | This section provides Extension TIM callback functions: |
mbed_official | 573:ad23fe03a082 | 2253 | (+) Timer Commutation callback |
mbed_official | 573:ad23fe03a082 | 2254 | (+) Timer Break callback |
mbed_official | 573:ad23fe03a082 | 2255 | |
mbed_official | 573:ad23fe03a082 | 2256 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 2257 | * @{ |
mbed_official | 573:ad23fe03a082 | 2258 | */ |
mbed_official | 573:ad23fe03a082 | 2259 | |
mbed_official | 573:ad23fe03a082 | 2260 | /** |
mbed_official | 573:ad23fe03a082 | 2261 | * @brief Hall commutation changed callback in non blocking mode |
mbed_official | 573:ad23fe03a082 | 2262 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 2263 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 2264 | * @retval None |
mbed_official | 573:ad23fe03a082 | 2265 | */ |
mbed_official | 573:ad23fe03a082 | 2266 | __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim) |
mbed_official | 573:ad23fe03a082 | 2267 | { |
mbed_official | 573:ad23fe03a082 | 2268 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 573:ad23fe03a082 | 2269 | the HAL_TIMEx_CommutationCallback could be implemented in the user file |
mbed_official | 573:ad23fe03a082 | 2270 | */ |
mbed_official | 573:ad23fe03a082 | 2271 | } |
mbed_official | 573:ad23fe03a082 | 2272 | |
mbed_official | 573:ad23fe03a082 | 2273 | /** |
mbed_official | 573:ad23fe03a082 | 2274 | * @brief Hall Break detection callback in non blocking mode |
mbed_official | 573:ad23fe03a082 | 2275 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 2276 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 2277 | * @retval None |
mbed_official | 573:ad23fe03a082 | 2278 | */ |
mbed_official | 573:ad23fe03a082 | 2279 | __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) |
mbed_official | 573:ad23fe03a082 | 2280 | { |
mbed_official | 573:ad23fe03a082 | 2281 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 573:ad23fe03a082 | 2282 | the HAL_TIMEx_BreakCallback could be implemented in the user file |
mbed_official | 573:ad23fe03a082 | 2283 | */ |
mbed_official | 573:ad23fe03a082 | 2284 | } |
mbed_official | 573:ad23fe03a082 | 2285 | |
mbed_official | 573:ad23fe03a082 | 2286 | /** |
mbed_official | 573:ad23fe03a082 | 2287 | * @} |
mbed_official | 573:ad23fe03a082 | 2288 | */ |
mbed_official | 573:ad23fe03a082 | 2289 | |
mbed_official | 573:ad23fe03a082 | 2290 | /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions |
mbed_official | 573:ad23fe03a082 | 2291 | * @brief Extended Peripheral State functions |
mbed_official | 573:ad23fe03a082 | 2292 | * |
mbed_official | 573:ad23fe03a082 | 2293 | @verbatim |
mbed_official | 573:ad23fe03a082 | 2294 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 2295 | ##### Extension Peripheral State functions ##### |
mbed_official | 573:ad23fe03a082 | 2296 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 2297 | [..] |
mbed_official | 573:ad23fe03a082 | 2298 | This subsection permits to get in run-time the status of the peripheral |
mbed_official | 573:ad23fe03a082 | 2299 | and the data flow. |
mbed_official | 573:ad23fe03a082 | 2300 | |
mbed_official | 573:ad23fe03a082 | 2301 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 2302 | * @{ |
mbed_official | 573:ad23fe03a082 | 2303 | */ |
mbed_official | 573:ad23fe03a082 | 2304 | |
mbed_official | 573:ad23fe03a082 | 2305 | /** |
mbed_official | 573:ad23fe03a082 | 2306 | * @brief Return the TIM Hall Sensor interface state |
mbed_official | 573:ad23fe03a082 | 2307 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 2308 | * the configuration information for TIM module. |
mbed_official | 573:ad23fe03a082 | 2309 | * @retval HAL state |
mbed_official | 573:ad23fe03a082 | 2310 | */ |
mbed_official | 573:ad23fe03a082 | 2311 | HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) |
mbed_official | 573:ad23fe03a082 | 2312 | { |
mbed_official | 573:ad23fe03a082 | 2313 | return htim->State; |
mbed_official | 573:ad23fe03a082 | 2314 | } |
mbed_official | 573:ad23fe03a082 | 2315 | |
mbed_official | 573:ad23fe03a082 | 2316 | /** |
mbed_official | 573:ad23fe03a082 | 2317 | * @} |
mbed_official | 573:ad23fe03a082 | 2318 | */ |
mbed_official | 573:ad23fe03a082 | 2319 | |
mbed_official | 573:ad23fe03a082 | 2320 | /** |
mbed_official | 573:ad23fe03a082 | 2321 | * @brief TIM DMA Commutation callback. |
mbed_official | 573:ad23fe03a082 | 2322 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 2323 | * the configuration information for the specified DMA module. |
mbed_official | 573:ad23fe03a082 | 2324 | * @retval None |
mbed_official | 573:ad23fe03a082 | 2325 | */ |
mbed_official | 573:ad23fe03a082 | 2326 | void HAL_TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 573:ad23fe03a082 | 2327 | { |
mbed_official | 573:ad23fe03a082 | 2328 | TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 573:ad23fe03a082 | 2329 | |
mbed_official | 573:ad23fe03a082 | 2330 | htim->State= HAL_TIM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 2331 | |
mbed_official | 573:ad23fe03a082 | 2332 | HAL_TIMEx_CommutationCallback(htim); |
mbed_official | 573:ad23fe03a082 | 2333 | } |
mbed_official | 573:ad23fe03a082 | 2334 | |
mbed_official | 573:ad23fe03a082 | 2335 | /** |
mbed_official | 573:ad23fe03a082 | 2336 | * @brief Enables or disables the TIM Capture Compare Channel xN. |
mbed_official | 573:ad23fe03a082 | 2337 | * @param TIMx to select the TIM peripheral |
mbed_official | 573:ad23fe03a082 | 2338 | * @param Channel: specifies the TIM Channel |
mbed_official | 573:ad23fe03a082 | 2339 | * This parameter can be one of the following values: |
mbed_official | 573:ad23fe03a082 | 2340 | * @arg TIM_Channel_1: TIM Channel 1 |
mbed_official | 573:ad23fe03a082 | 2341 | * @arg TIM_Channel_2: TIM Channel 2 |
mbed_official | 573:ad23fe03a082 | 2342 | * @arg TIM_Channel_3: TIM Channel 3 |
mbed_official | 573:ad23fe03a082 | 2343 | * @param ChannelNState: specifies the TIM Channel CCxNE bit new state. |
mbed_official | 573:ad23fe03a082 | 2344 | * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. |
mbed_official | 573:ad23fe03a082 | 2345 | * @retval None |
mbed_official | 573:ad23fe03a082 | 2346 | */ |
mbed_official | 573:ad23fe03a082 | 2347 | static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState) |
mbed_official | 573:ad23fe03a082 | 2348 | { |
mbed_official | 573:ad23fe03a082 | 2349 | uint32_t tmp = 0; |
mbed_official | 573:ad23fe03a082 | 2350 | |
mbed_official | 573:ad23fe03a082 | 2351 | /* Check the parameters */ |
mbed_official | 573:ad23fe03a082 | 2352 | assert_param(IS_TIM_ADVANCED_INSTANCE(TIMx)); |
mbed_official | 573:ad23fe03a082 | 2353 | assert_param(IS_TIM_COMPLEMENTARY_CHANNELS(Channel)); |
mbed_official | 573:ad23fe03a082 | 2354 | |
mbed_official | 573:ad23fe03a082 | 2355 | tmp = TIM_CCER_CC1NE << Channel; |
mbed_official | 573:ad23fe03a082 | 2356 | |
mbed_official | 573:ad23fe03a082 | 2357 | /* Reset the CCxNE Bit */ |
mbed_official | 573:ad23fe03a082 | 2358 | TIMx->CCER &= ~tmp; |
mbed_official | 573:ad23fe03a082 | 2359 | |
mbed_official | 573:ad23fe03a082 | 2360 | /* Set or reset the CCxNE Bit */ |
mbed_official | 573:ad23fe03a082 | 2361 | TIMx->CCER |= (uint32_t)(ChannelNState << Channel); |
mbed_official | 573:ad23fe03a082 | 2362 | } |
mbed_official | 573:ad23fe03a082 | 2363 | |
mbed_official | 573:ad23fe03a082 | 2364 | /** |
mbed_official | 573:ad23fe03a082 | 2365 | * @brief Timer Output Compare 5 configuration |
mbed_official | 573:ad23fe03a082 | 2366 | * @param TIMx to select the TIM peripheral |
mbed_official | 573:ad23fe03a082 | 2367 | * @param OC_Config: The output configuration structure |
mbed_official | 573:ad23fe03a082 | 2368 | * @retval None |
mbed_official | 573:ad23fe03a082 | 2369 | */ |
mbed_official | 573:ad23fe03a082 | 2370 | static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) |
mbed_official | 573:ad23fe03a082 | 2371 | { |
mbed_official | 573:ad23fe03a082 | 2372 | uint32_t tmpccmrx = 0; |
mbed_official | 573:ad23fe03a082 | 2373 | uint32_t tmpccer = 0; |
mbed_official | 573:ad23fe03a082 | 2374 | uint32_t tmpcr2 = 0; |
mbed_official | 573:ad23fe03a082 | 2375 | |
mbed_official | 573:ad23fe03a082 | 2376 | /* Disable the output: Reset the CCxE Bit */ |
mbed_official | 573:ad23fe03a082 | 2377 | TIMx->CCER &= ~TIM_CCER_CC5E; |
mbed_official | 573:ad23fe03a082 | 2378 | |
mbed_official | 573:ad23fe03a082 | 2379 | /* Get the TIMx CCER register value */ |
mbed_official | 573:ad23fe03a082 | 2380 | tmpccer = TIMx->CCER; |
mbed_official | 573:ad23fe03a082 | 2381 | /* Get the TIMx CR2 register value */ |
mbed_official | 573:ad23fe03a082 | 2382 | tmpcr2 = TIMx->CR2; |
mbed_official | 573:ad23fe03a082 | 2383 | /* Get the TIMx CCMR1 register value */ |
mbed_official | 573:ad23fe03a082 | 2384 | tmpccmrx = TIMx->CCMR3; |
mbed_official | 573:ad23fe03a082 | 2385 | |
mbed_official | 573:ad23fe03a082 | 2386 | /* Reset the Output Compare Mode Bits */ |
mbed_official | 573:ad23fe03a082 | 2387 | tmpccmrx &= ~(TIM_CCMR3_OC5M); |
mbed_official | 573:ad23fe03a082 | 2388 | /* Select the Output Compare Mode */ |
mbed_official | 573:ad23fe03a082 | 2389 | tmpccmrx |= OC_Config->OCMode; |
mbed_official | 573:ad23fe03a082 | 2390 | |
mbed_official | 573:ad23fe03a082 | 2391 | /* Reset the Output Polarity level */ |
mbed_official | 573:ad23fe03a082 | 2392 | tmpccer &= ~TIM_CCER_CC5P; |
mbed_official | 573:ad23fe03a082 | 2393 | /* Set the Output Compare Polarity */ |
mbed_official | 573:ad23fe03a082 | 2394 | tmpccer |= (OC_Config->OCPolarity << 16); |
mbed_official | 573:ad23fe03a082 | 2395 | |
mbed_official | 573:ad23fe03a082 | 2396 | if(IS_TIM_BREAK_INSTANCE(TIMx)) |
mbed_official | 573:ad23fe03a082 | 2397 | { |
mbed_official | 573:ad23fe03a082 | 2398 | /* Reset the Output Compare IDLE State */ |
mbed_official | 573:ad23fe03a082 | 2399 | tmpcr2 &= ~TIM_CR2_OIS5; |
mbed_official | 573:ad23fe03a082 | 2400 | /* Set the Output Idle state */ |
mbed_official | 573:ad23fe03a082 | 2401 | tmpcr2 |= (OC_Config->OCIdleState << 8); |
mbed_official | 573:ad23fe03a082 | 2402 | } |
mbed_official | 573:ad23fe03a082 | 2403 | /* Write to TIMx CR2 */ |
mbed_official | 573:ad23fe03a082 | 2404 | TIMx->CR2 = tmpcr2; |
mbed_official | 573:ad23fe03a082 | 2405 | |
mbed_official | 573:ad23fe03a082 | 2406 | /* Write to TIMx CCMR3 */ |
mbed_official | 573:ad23fe03a082 | 2407 | TIMx->CCMR3 = tmpccmrx; |
mbed_official | 573:ad23fe03a082 | 2408 | |
mbed_official | 573:ad23fe03a082 | 2409 | /* Set the Capture Compare Register value */ |
mbed_official | 573:ad23fe03a082 | 2410 | TIMx->CCR5 = OC_Config->Pulse; |
mbed_official | 573:ad23fe03a082 | 2411 | |
mbed_official | 573:ad23fe03a082 | 2412 | /* Write to TIMx CCER */ |
mbed_official | 573:ad23fe03a082 | 2413 | TIMx->CCER = tmpccer; |
mbed_official | 573:ad23fe03a082 | 2414 | } |
mbed_official | 573:ad23fe03a082 | 2415 | |
mbed_official | 573:ad23fe03a082 | 2416 | /** |
mbed_official | 573:ad23fe03a082 | 2417 | * @brief Timer Output Compare 6 configuration |
mbed_official | 573:ad23fe03a082 | 2418 | * @param TIMx to select the TIM peripheral |
mbed_official | 573:ad23fe03a082 | 2419 | * @param OC_Config: The output configuration structure |
mbed_official | 573:ad23fe03a082 | 2420 | * @retval None |
mbed_official | 573:ad23fe03a082 | 2421 | */ |
mbed_official | 573:ad23fe03a082 | 2422 | static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) |
mbed_official | 573:ad23fe03a082 | 2423 | { |
mbed_official | 573:ad23fe03a082 | 2424 | uint32_t tmpccmrx = 0; |
mbed_official | 573:ad23fe03a082 | 2425 | uint32_t tmpccer = 0; |
mbed_official | 573:ad23fe03a082 | 2426 | uint32_t tmpcr2 = 0; |
mbed_official | 573:ad23fe03a082 | 2427 | |
mbed_official | 573:ad23fe03a082 | 2428 | /* Disable the output: Reset the CCxE Bit */ |
mbed_official | 573:ad23fe03a082 | 2429 | TIMx->CCER &= ~TIM_CCER_CC6E; |
mbed_official | 573:ad23fe03a082 | 2430 | |
mbed_official | 573:ad23fe03a082 | 2431 | /* Get the TIMx CCER register value */ |
mbed_official | 573:ad23fe03a082 | 2432 | tmpccer = TIMx->CCER; |
mbed_official | 573:ad23fe03a082 | 2433 | /* Get the TIMx CR2 register value */ |
mbed_official | 573:ad23fe03a082 | 2434 | tmpcr2 = TIMx->CR2; |
mbed_official | 573:ad23fe03a082 | 2435 | /* Get the TIMx CCMR1 register value */ |
mbed_official | 573:ad23fe03a082 | 2436 | tmpccmrx = TIMx->CCMR3; |
mbed_official | 573:ad23fe03a082 | 2437 | |
mbed_official | 573:ad23fe03a082 | 2438 | /* Reset the Output Compare Mode Bits */ |
mbed_official | 573:ad23fe03a082 | 2439 | tmpccmrx &= ~(TIM_CCMR3_OC6M); |
mbed_official | 573:ad23fe03a082 | 2440 | /* Select the Output Compare Mode */ |
mbed_official | 573:ad23fe03a082 | 2441 | tmpccmrx |= (OC_Config->OCMode << 8); |
mbed_official | 573:ad23fe03a082 | 2442 | |
mbed_official | 573:ad23fe03a082 | 2443 | /* Reset the Output Polarity level */ |
mbed_official | 573:ad23fe03a082 | 2444 | tmpccer &= (uint32_t)~TIM_CCER_CC6P; |
mbed_official | 573:ad23fe03a082 | 2445 | /* Set the Output Compare Polarity */ |
mbed_official | 573:ad23fe03a082 | 2446 | tmpccer |= (OC_Config->OCPolarity << 20); |
mbed_official | 573:ad23fe03a082 | 2447 | |
mbed_official | 573:ad23fe03a082 | 2448 | if(IS_TIM_BREAK_INSTANCE(TIMx)) |
mbed_official | 573:ad23fe03a082 | 2449 | { |
mbed_official | 573:ad23fe03a082 | 2450 | /* Reset the Output Compare IDLE State */ |
mbed_official | 573:ad23fe03a082 | 2451 | tmpcr2 &= ~TIM_CR2_OIS6; |
mbed_official | 573:ad23fe03a082 | 2452 | /* Set the Output Idle state */ |
mbed_official | 573:ad23fe03a082 | 2453 | tmpcr2 |= (OC_Config->OCIdleState << 10); |
mbed_official | 573:ad23fe03a082 | 2454 | } |
mbed_official | 573:ad23fe03a082 | 2455 | |
mbed_official | 573:ad23fe03a082 | 2456 | /* Write to TIMx CR2 */ |
mbed_official | 573:ad23fe03a082 | 2457 | TIMx->CR2 = tmpcr2; |
mbed_official | 573:ad23fe03a082 | 2458 | |
mbed_official | 573:ad23fe03a082 | 2459 | /* Write to TIMx CCMR3 */ |
mbed_official | 573:ad23fe03a082 | 2460 | TIMx->CCMR3 = tmpccmrx; |
mbed_official | 573:ad23fe03a082 | 2461 | |
mbed_official | 573:ad23fe03a082 | 2462 | /* Set the Capture Compare Register value */ |
mbed_official | 573:ad23fe03a082 | 2463 | TIMx->CCR6 = OC_Config->Pulse; |
mbed_official | 573:ad23fe03a082 | 2464 | |
mbed_official | 573:ad23fe03a082 | 2465 | /* Write to TIMx CCER */ |
mbed_official | 573:ad23fe03a082 | 2466 | TIMx->CCER = tmpccer; |
mbed_official | 573:ad23fe03a082 | 2467 | } |
mbed_official | 573:ad23fe03a082 | 2468 | |
mbed_official | 573:ad23fe03a082 | 2469 | /** |
mbed_official | 573:ad23fe03a082 | 2470 | * @} |
mbed_official | 573:ad23fe03a082 | 2471 | */ |
mbed_official | 573:ad23fe03a082 | 2472 | |
mbed_official | 573:ad23fe03a082 | 2473 | #endif /* HAL_TIM_MODULE_ENABLED */ |
mbed_official | 573:ad23fe03a082 | 2474 | /** |
mbed_official | 573:ad23fe03a082 | 2475 | * @} |
mbed_official | 573:ad23fe03a082 | 2476 | */ |
mbed_official | 573:ad23fe03a082 | 2477 | |
mbed_official | 573:ad23fe03a082 | 2478 | /** |
mbed_official | 573:ad23fe03a082 | 2479 | * @} |
mbed_official | 573:ad23fe03a082 | 2480 | */ |
mbed_official | 573:ad23fe03a082 | 2481 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |