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targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_sram.c@637:ed69428d4850, 2015-12-22 (annotated)
- Committer:
- jaerts
- Date:
- Tue Dec 22 13:22:16 2015 +0000
- Revision:
- 637:ed69428d4850
- Parent:
- 610:813dcc80987e
Add very shady LPC1768 CAN Filter implementation
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 573:ad23fe03a082 | 1 | /** |
mbed_official | 573:ad23fe03a082 | 2 | ****************************************************************************** |
mbed_official | 573:ad23fe03a082 | 3 | * @file stm32f7xx_hal_sram.c |
mbed_official | 573:ad23fe03a082 | 4 | * @author MCD Application Team |
mbed_official | 610:813dcc80987e | 5 | * @version V1.0.1 |
mbed_official | 610:813dcc80987e | 6 | * @date 25-June-2015 |
mbed_official | 573:ad23fe03a082 | 7 | * @brief SRAM HAL module driver. |
mbed_official | 573:ad23fe03a082 | 8 | * This file provides a generic firmware to drive SRAM memories |
mbed_official | 573:ad23fe03a082 | 9 | * mounted as external device. |
mbed_official | 573:ad23fe03a082 | 10 | * |
mbed_official | 573:ad23fe03a082 | 11 | @verbatim |
mbed_official | 573:ad23fe03a082 | 12 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 13 | ##### How to use this driver ##### |
mbed_official | 573:ad23fe03a082 | 14 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 15 | [..] |
mbed_official | 573:ad23fe03a082 | 16 | This driver is a generic layered driver which contains a set of APIs used to |
mbed_official | 573:ad23fe03a082 | 17 | control SRAM memories. It uses the FMC layer functions to interface |
mbed_official | 573:ad23fe03a082 | 18 | with SRAM devices. |
mbed_official | 573:ad23fe03a082 | 19 | The following sequence should be followed to configure the FMC to interface |
mbed_official | 573:ad23fe03a082 | 20 | with SRAM/PSRAM memories: |
mbed_official | 573:ad23fe03a082 | 21 | |
mbed_official | 573:ad23fe03a082 | 22 | (#) Declare a SRAM_HandleTypeDef handle structure, for example: |
mbed_official | 573:ad23fe03a082 | 23 | SRAM_HandleTypeDef hsram; and: |
mbed_official | 573:ad23fe03a082 | 24 | |
mbed_official | 573:ad23fe03a082 | 25 | (++) Fill the SRAM_HandleTypeDef handle "Init" field with the allowed |
mbed_official | 573:ad23fe03a082 | 26 | values of the structure member. |
mbed_official | 573:ad23fe03a082 | 27 | |
mbed_official | 573:ad23fe03a082 | 28 | (++) Fill the SRAM_HandleTypeDef handle "Instance" field with a predefined |
mbed_official | 573:ad23fe03a082 | 29 | base register instance for NOR or SRAM device |
mbed_official | 573:ad23fe03a082 | 30 | |
mbed_official | 573:ad23fe03a082 | 31 | (++) Fill the SRAM_HandleTypeDef handle "Extended" field with a predefined |
mbed_official | 573:ad23fe03a082 | 32 | base register instance for NOR or SRAM extended mode |
mbed_official | 573:ad23fe03a082 | 33 | |
mbed_official | 573:ad23fe03a082 | 34 | (#) Declare two FMC_NORSRAM_TimingTypeDef structures, for both normal and extended |
mbed_official | 573:ad23fe03a082 | 35 | mode timings; for example: |
mbed_official | 573:ad23fe03a082 | 36 | FMC_NORSRAM_TimingTypeDef Timing and FMC_NORSRAM_TimingTypeDef ExTiming; |
mbed_official | 573:ad23fe03a082 | 37 | and fill its fields with the allowed values of the structure member. |
mbed_official | 573:ad23fe03a082 | 38 | |
mbed_official | 573:ad23fe03a082 | 39 | (#) Initialize the SRAM Controller by calling the function HAL_SRAM_Init(). This function |
mbed_official | 573:ad23fe03a082 | 40 | performs the following sequence: |
mbed_official | 573:ad23fe03a082 | 41 | |
mbed_official | 573:ad23fe03a082 | 42 | (##) MSP hardware layer configuration using the function HAL_SRAM_MspInit() |
mbed_official | 573:ad23fe03a082 | 43 | (##) Control register configuration using the FMC NORSRAM interface function |
mbed_official | 573:ad23fe03a082 | 44 | FMC_NORSRAM_Init() |
mbed_official | 573:ad23fe03a082 | 45 | (##) Timing register configuration using the FMC NORSRAM interface function |
mbed_official | 573:ad23fe03a082 | 46 | FMC_NORSRAM_Timing_Init() |
mbed_official | 573:ad23fe03a082 | 47 | (##) Extended mode Timing register configuration using the FMC NORSRAM interface function |
mbed_official | 573:ad23fe03a082 | 48 | FMC_NORSRAM_Extended_Timing_Init() |
mbed_official | 573:ad23fe03a082 | 49 | (##) Enable the SRAM device using the macro __FMC_NORSRAM_ENABLE() |
mbed_official | 573:ad23fe03a082 | 50 | |
mbed_official | 573:ad23fe03a082 | 51 | (#) At this stage you can perform read/write accesses from/to the memory connected |
mbed_official | 573:ad23fe03a082 | 52 | to the NOR/SRAM Bank. You can perform either polling or DMA transfer using the |
mbed_official | 573:ad23fe03a082 | 53 | following APIs: |
mbed_official | 573:ad23fe03a082 | 54 | (++) HAL_SRAM_Read()/HAL_SRAM_Write() for polling read/write access |
mbed_official | 573:ad23fe03a082 | 55 | (++) HAL_SRAM_Read_DMA()/HAL_SRAM_Write_DMA() for DMA read/write transfer |
mbed_official | 573:ad23fe03a082 | 56 | |
mbed_official | 573:ad23fe03a082 | 57 | (#) You can also control the SRAM device by calling the control APIs HAL_SRAM_WriteOperation_Enable()/ |
mbed_official | 573:ad23fe03a082 | 58 | HAL_SRAM_WriteOperation_Disable() to respectively enable/disable the SRAM write operation |
mbed_official | 573:ad23fe03a082 | 59 | |
mbed_official | 573:ad23fe03a082 | 60 | (#) You can continuously monitor the SRAM device HAL state by calling the function |
mbed_official | 573:ad23fe03a082 | 61 | HAL_SRAM_GetState() |
mbed_official | 573:ad23fe03a082 | 62 | |
mbed_official | 573:ad23fe03a082 | 63 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 64 | ****************************************************************************** |
mbed_official | 573:ad23fe03a082 | 65 | * @attention |
mbed_official | 573:ad23fe03a082 | 66 | * |
mbed_official | 573:ad23fe03a082 | 67 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
mbed_official | 573:ad23fe03a082 | 68 | * |
mbed_official | 573:ad23fe03a082 | 69 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 573:ad23fe03a082 | 70 | * are permitted provided that the following conditions are met: |
mbed_official | 573:ad23fe03a082 | 71 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 573:ad23fe03a082 | 72 | * this list of conditions and the following disclaimer. |
mbed_official | 573:ad23fe03a082 | 73 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 573:ad23fe03a082 | 74 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 573:ad23fe03a082 | 75 | * and/or other materials provided with the distribution. |
mbed_official | 573:ad23fe03a082 | 76 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 573:ad23fe03a082 | 77 | * may be used to endorse or promote products derived from this software |
mbed_official | 573:ad23fe03a082 | 78 | * without specific prior written permission. |
mbed_official | 573:ad23fe03a082 | 79 | * |
mbed_official | 573:ad23fe03a082 | 80 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 573:ad23fe03a082 | 81 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 573:ad23fe03a082 | 82 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 573:ad23fe03a082 | 83 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 573:ad23fe03a082 | 84 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 573:ad23fe03a082 | 85 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 573:ad23fe03a082 | 86 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 573:ad23fe03a082 | 87 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 573:ad23fe03a082 | 88 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 573:ad23fe03a082 | 89 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 573:ad23fe03a082 | 90 | * |
mbed_official | 573:ad23fe03a082 | 91 | ****************************************************************************** |
mbed_official | 573:ad23fe03a082 | 92 | */ |
mbed_official | 573:ad23fe03a082 | 93 | |
mbed_official | 573:ad23fe03a082 | 94 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 95 | #include "stm32f7xx_hal.h" |
mbed_official | 573:ad23fe03a082 | 96 | |
mbed_official | 573:ad23fe03a082 | 97 | /** @addtogroup STM32F7xx_HAL_Driver |
mbed_official | 573:ad23fe03a082 | 98 | * @{ |
mbed_official | 573:ad23fe03a082 | 99 | */ |
mbed_official | 573:ad23fe03a082 | 100 | |
mbed_official | 573:ad23fe03a082 | 101 | /** @defgroup SRAM SRAM |
mbed_official | 573:ad23fe03a082 | 102 | * @brief SRAM driver modules |
mbed_official | 573:ad23fe03a082 | 103 | * @{ |
mbed_official | 573:ad23fe03a082 | 104 | */ |
mbed_official | 573:ad23fe03a082 | 105 | #ifdef HAL_SRAM_MODULE_ENABLED |
mbed_official | 573:ad23fe03a082 | 106 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 107 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 108 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 109 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 110 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 111 | /* Exported functions --------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 112 | |
mbed_official | 573:ad23fe03a082 | 113 | /** @defgroup SRAM_Exported_Functions SRAM Exported Functions |
mbed_official | 573:ad23fe03a082 | 114 | * @{ |
mbed_official | 573:ad23fe03a082 | 115 | */ |
mbed_official | 573:ad23fe03a082 | 116 | |
mbed_official | 573:ad23fe03a082 | 117 | /** @defgroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions |
mbed_official | 573:ad23fe03a082 | 118 | * @brief Initialization and Configuration functions. |
mbed_official | 573:ad23fe03a082 | 119 | * |
mbed_official | 573:ad23fe03a082 | 120 | @verbatim |
mbed_official | 573:ad23fe03a082 | 121 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 122 | ##### SRAM Initialization and de_initialization functions ##### |
mbed_official | 573:ad23fe03a082 | 123 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 124 | [..] This section provides functions allowing to initialize/de-initialize |
mbed_official | 573:ad23fe03a082 | 125 | the SRAM memory |
mbed_official | 573:ad23fe03a082 | 126 | |
mbed_official | 573:ad23fe03a082 | 127 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 128 | * @{ |
mbed_official | 573:ad23fe03a082 | 129 | */ |
mbed_official | 573:ad23fe03a082 | 130 | |
mbed_official | 573:ad23fe03a082 | 131 | /** |
mbed_official | 573:ad23fe03a082 | 132 | * @brief Performs the SRAM device initialization sequence |
mbed_official | 573:ad23fe03a082 | 133 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 134 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 135 | * @param Timing: Pointer to SRAM control timing structure |
mbed_official | 573:ad23fe03a082 | 136 | * @param ExtTiming: Pointer to SRAM extended mode timing structure |
mbed_official | 573:ad23fe03a082 | 137 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 138 | */ |
mbed_official | 573:ad23fe03a082 | 139 | HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming) |
mbed_official | 573:ad23fe03a082 | 140 | { |
mbed_official | 573:ad23fe03a082 | 141 | /* Check the SRAM handle parameter */ |
mbed_official | 573:ad23fe03a082 | 142 | if(hsram == NULL) |
mbed_official | 573:ad23fe03a082 | 143 | { |
mbed_official | 573:ad23fe03a082 | 144 | return HAL_ERROR; |
mbed_official | 573:ad23fe03a082 | 145 | } |
mbed_official | 573:ad23fe03a082 | 146 | |
mbed_official | 573:ad23fe03a082 | 147 | if(hsram->State == HAL_SRAM_STATE_RESET) |
mbed_official | 573:ad23fe03a082 | 148 | { |
mbed_official | 573:ad23fe03a082 | 149 | /* Allocate lock resource and initialize it */ |
mbed_official | 573:ad23fe03a082 | 150 | hsram->Lock = HAL_UNLOCKED; |
mbed_official | 573:ad23fe03a082 | 151 | /* Initialize the low level hardware (MSP) */ |
mbed_official | 573:ad23fe03a082 | 152 | HAL_SRAM_MspInit(hsram); |
mbed_official | 573:ad23fe03a082 | 153 | } |
mbed_official | 573:ad23fe03a082 | 154 | |
mbed_official | 573:ad23fe03a082 | 155 | /* Initialize SRAM control Interface */ |
mbed_official | 573:ad23fe03a082 | 156 | FMC_NORSRAM_Init(hsram->Instance, &(hsram->Init)); |
mbed_official | 573:ad23fe03a082 | 157 | |
mbed_official | 573:ad23fe03a082 | 158 | /* Initialize SRAM timing Interface */ |
mbed_official | 573:ad23fe03a082 | 159 | FMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank); |
mbed_official | 573:ad23fe03a082 | 160 | |
mbed_official | 573:ad23fe03a082 | 161 | /* Initialize SRAM extended mode timing Interface */ |
mbed_official | 573:ad23fe03a082 | 162 | FMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank, hsram->Init.ExtendedMode); |
mbed_official | 573:ad23fe03a082 | 163 | |
mbed_official | 573:ad23fe03a082 | 164 | /* Enable the NORSRAM device */ |
mbed_official | 573:ad23fe03a082 | 165 | __FMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank); |
mbed_official | 573:ad23fe03a082 | 166 | |
mbed_official | 573:ad23fe03a082 | 167 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 168 | } |
mbed_official | 573:ad23fe03a082 | 169 | |
mbed_official | 573:ad23fe03a082 | 170 | /** |
mbed_official | 573:ad23fe03a082 | 171 | * @brief Performs the SRAM device De-initialization sequence. |
mbed_official | 573:ad23fe03a082 | 172 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 173 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 174 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 175 | */ |
mbed_official | 573:ad23fe03a082 | 176 | HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram) |
mbed_official | 573:ad23fe03a082 | 177 | { |
mbed_official | 573:ad23fe03a082 | 178 | /* De-Initialize the low level hardware (MSP) */ |
mbed_official | 573:ad23fe03a082 | 179 | HAL_SRAM_MspDeInit(hsram); |
mbed_official | 573:ad23fe03a082 | 180 | |
mbed_official | 573:ad23fe03a082 | 181 | /* Configure the SRAM registers with their reset values */ |
mbed_official | 573:ad23fe03a082 | 182 | FMC_NORSRAM_DeInit(hsram->Instance, hsram->Extended, hsram->Init.NSBank); |
mbed_official | 573:ad23fe03a082 | 183 | |
mbed_official | 573:ad23fe03a082 | 184 | hsram->State = HAL_SRAM_STATE_RESET; |
mbed_official | 573:ad23fe03a082 | 185 | |
mbed_official | 573:ad23fe03a082 | 186 | /* Release Lock */ |
mbed_official | 573:ad23fe03a082 | 187 | __HAL_UNLOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 188 | |
mbed_official | 573:ad23fe03a082 | 189 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 190 | } |
mbed_official | 573:ad23fe03a082 | 191 | |
mbed_official | 573:ad23fe03a082 | 192 | /** |
mbed_official | 573:ad23fe03a082 | 193 | * @brief SRAM MSP Init. |
mbed_official | 573:ad23fe03a082 | 194 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 195 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 196 | * @retval None |
mbed_official | 573:ad23fe03a082 | 197 | */ |
mbed_official | 573:ad23fe03a082 | 198 | __weak void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram) |
mbed_official | 573:ad23fe03a082 | 199 | { |
mbed_official | 573:ad23fe03a082 | 200 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 573:ad23fe03a082 | 201 | the HAL_SRAM_MspInit could be implemented in the user file |
mbed_official | 573:ad23fe03a082 | 202 | */ |
mbed_official | 573:ad23fe03a082 | 203 | } |
mbed_official | 573:ad23fe03a082 | 204 | |
mbed_official | 573:ad23fe03a082 | 205 | /** |
mbed_official | 573:ad23fe03a082 | 206 | * @brief SRAM MSP DeInit. |
mbed_official | 573:ad23fe03a082 | 207 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 208 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 209 | * @retval None |
mbed_official | 573:ad23fe03a082 | 210 | */ |
mbed_official | 573:ad23fe03a082 | 211 | __weak void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram) |
mbed_official | 573:ad23fe03a082 | 212 | { |
mbed_official | 573:ad23fe03a082 | 213 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 573:ad23fe03a082 | 214 | the HAL_SRAM_MspDeInit could be implemented in the user file |
mbed_official | 573:ad23fe03a082 | 215 | */ |
mbed_official | 573:ad23fe03a082 | 216 | } |
mbed_official | 573:ad23fe03a082 | 217 | |
mbed_official | 573:ad23fe03a082 | 218 | /** |
mbed_official | 573:ad23fe03a082 | 219 | * @brief DMA transfer complete callback. |
mbed_official | 573:ad23fe03a082 | 220 | * @param hdma: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 221 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 222 | * @retval None |
mbed_official | 573:ad23fe03a082 | 223 | */ |
mbed_official | 573:ad23fe03a082 | 224 | __weak void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma) |
mbed_official | 573:ad23fe03a082 | 225 | { |
mbed_official | 573:ad23fe03a082 | 226 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 573:ad23fe03a082 | 227 | the HAL_SRAM_DMA_XferCpltCallback could be implemented in the user file |
mbed_official | 573:ad23fe03a082 | 228 | */ |
mbed_official | 573:ad23fe03a082 | 229 | } |
mbed_official | 573:ad23fe03a082 | 230 | |
mbed_official | 573:ad23fe03a082 | 231 | /** |
mbed_official | 573:ad23fe03a082 | 232 | * @brief DMA transfer complete error callback. |
mbed_official | 573:ad23fe03a082 | 233 | * @param hdma: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 234 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 235 | * @retval None |
mbed_official | 573:ad23fe03a082 | 236 | */ |
mbed_official | 573:ad23fe03a082 | 237 | __weak void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma) |
mbed_official | 573:ad23fe03a082 | 238 | { |
mbed_official | 573:ad23fe03a082 | 239 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 573:ad23fe03a082 | 240 | the HAL_SRAM_DMA_XferErrorCallback could be implemented in the user file |
mbed_official | 573:ad23fe03a082 | 241 | */ |
mbed_official | 573:ad23fe03a082 | 242 | } |
mbed_official | 573:ad23fe03a082 | 243 | |
mbed_official | 573:ad23fe03a082 | 244 | /** |
mbed_official | 573:ad23fe03a082 | 245 | * @} |
mbed_official | 573:ad23fe03a082 | 246 | */ |
mbed_official | 573:ad23fe03a082 | 247 | |
mbed_official | 573:ad23fe03a082 | 248 | /** @defgroup SRAM_Exported_Functions_Group2 Input Output and memory control functions |
mbed_official | 573:ad23fe03a082 | 249 | * @brief Input Output and memory control functions |
mbed_official | 573:ad23fe03a082 | 250 | * |
mbed_official | 573:ad23fe03a082 | 251 | @verbatim |
mbed_official | 573:ad23fe03a082 | 252 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 253 | ##### SRAM Input and Output functions ##### |
mbed_official | 573:ad23fe03a082 | 254 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 255 | [..] |
mbed_official | 573:ad23fe03a082 | 256 | This section provides functions allowing to use and control the SRAM memory |
mbed_official | 573:ad23fe03a082 | 257 | |
mbed_official | 573:ad23fe03a082 | 258 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 259 | * @{ |
mbed_official | 573:ad23fe03a082 | 260 | */ |
mbed_official | 573:ad23fe03a082 | 261 | |
mbed_official | 573:ad23fe03a082 | 262 | /** |
mbed_official | 573:ad23fe03a082 | 263 | * @brief Reads 8-bit buffer from SRAM memory. |
mbed_official | 573:ad23fe03a082 | 264 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 265 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 266 | * @param pAddress: Pointer to read start address |
mbed_official | 573:ad23fe03a082 | 267 | * @param pDstBuffer: Pointer to destination buffer |
mbed_official | 573:ad23fe03a082 | 268 | * @param BufferSize: Size of the buffer to read from memory |
mbed_official | 573:ad23fe03a082 | 269 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 270 | */ |
mbed_official | 573:ad23fe03a082 | 271 | HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize) |
mbed_official | 573:ad23fe03a082 | 272 | { |
mbed_official | 573:ad23fe03a082 | 273 | __IO uint8_t * psramaddress = (uint8_t *)pAddress; |
mbed_official | 573:ad23fe03a082 | 274 | |
mbed_official | 573:ad23fe03a082 | 275 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 276 | __HAL_LOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 277 | |
mbed_official | 573:ad23fe03a082 | 278 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 279 | hsram->State = HAL_SRAM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 280 | |
mbed_official | 573:ad23fe03a082 | 281 | /* Read data from memory */ |
mbed_official | 573:ad23fe03a082 | 282 | for(; BufferSize != 0; BufferSize--) |
mbed_official | 573:ad23fe03a082 | 283 | { |
mbed_official | 573:ad23fe03a082 | 284 | *pDstBuffer = *(__IO uint8_t *)psramaddress; |
mbed_official | 573:ad23fe03a082 | 285 | pDstBuffer++; |
mbed_official | 573:ad23fe03a082 | 286 | psramaddress++; |
mbed_official | 573:ad23fe03a082 | 287 | } |
mbed_official | 573:ad23fe03a082 | 288 | |
mbed_official | 573:ad23fe03a082 | 289 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 290 | hsram->State = HAL_SRAM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 291 | |
mbed_official | 573:ad23fe03a082 | 292 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 293 | __HAL_UNLOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 294 | |
mbed_official | 573:ad23fe03a082 | 295 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 296 | } |
mbed_official | 573:ad23fe03a082 | 297 | |
mbed_official | 573:ad23fe03a082 | 298 | /** |
mbed_official | 573:ad23fe03a082 | 299 | * @brief Writes 8-bit buffer to SRAM memory. |
mbed_official | 573:ad23fe03a082 | 300 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 301 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 302 | * @param pAddress: Pointer to write start address |
mbed_official | 573:ad23fe03a082 | 303 | * @param pSrcBuffer: Pointer to source buffer to write |
mbed_official | 573:ad23fe03a082 | 304 | * @param BufferSize: Size of the buffer to write to memory |
mbed_official | 573:ad23fe03a082 | 305 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 306 | */ |
mbed_official | 573:ad23fe03a082 | 307 | HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize) |
mbed_official | 573:ad23fe03a082 | 308 | { |
mbed_official | 573:ad23fe03a082 | 309 | __IO uint8_t * psramaddress = (uint8_t *)pAddress; |
mbed_official | 573:ad23fe03a082 | 310 | |
mbed_official | 573:ad23fe03a082 | 311 | /* Check the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 312 | if(hsram->State == HAL_SRAM_STATE_PROTECTED) |
mbed_official | 573:ad23fe03a082 | 313 | { |
mbed_official | 573:ad23fe03a082 | 314 | return HAL_ERROR; |
mbed_official | 573:ad23fe03a082 | 315 | } |
mbed_official | 573:ad23fe03a082 | 316 | |
mbed_official | 573:ad23fe03a082 | 317 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 318 | __HAL_LOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 319 | |
mbed_official | 573:ad23fe03a082 | 320 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 321 | hsram->State = HAL_SRAM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 322 | |
mbed_official | 573:ad23fe03a082 | 323 | /* Write data to memory */ |
mbed_official | 573:ad23fe03a082 | 324 | for(; BufferSize != 0; BufferSize--) |
mbed_official | 573:ad23fe03a082 | 325 | { |
mbed_official | 573:ad23fe03a082 | 326 | *(__IO uint8_t *)psramaddress = *pSrcBuffer; |
mbed_official | 573:ad23fe03a082 | 327 | pSrcBuffer++; |
mbed_official | 573:ad23fe03a082 | 328 | psramaddress++; |
mbed_official | 573:ad23fe03a082 | 329 | } |
mbed_official | 573:ad23fe03a082 | 330 | |
mbed_official | 573:ad23fe03a082 | 331 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 332 | hsram->State = HAL_SRAM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 333 | |
mbed_official | 573:ad23fe03a082 | 334 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 335 | __HAL_UNLOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 336 | |
mbed_official | 573:ad23fe03a082 | 337 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 338 | } |
mbed_official | 573:ad23fe03a082 | 339 | |
mbed_official | 573:ad23fe03a082 | 340 | /** |
mbed_official | 573:ad23fe03a082 | 341 | * @brief Reads 16-bit buffer from SRAM memory. |
mbed_official | 573:ad23fe03a082 | 342 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 343 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 344 | * @param pAddress: Pointer to read start address |
mbed_official | 573:ad23fe03a082 | 345 | * @param pDstBuffer: Pointer to destination buffer |
mbed_official | 573:ad23fe03a082 | 346 | * @param BufferSize: Size of the buffer to read from memory |
mbed_official | 573:ad23fe03a082 | 347 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 348 | */ |
mbed_official | 573:ad23fe03a082 | 349 | HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize) |
mbed_official | 573:ad23fe03a082 | 350 | { |
mbed_official | 573:ad23fe03a082 | 351 | __IO uint16_t * psramaddress = (uint16_t *)pAddress; |
mbed_official | 573:ad23fe03a082 | 352 | |
mbed_official | 573:ad23fe03a082 | 353 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 354 | __HAL_LOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 355 | |
mbed_official | 573:ad23fe03a082 | 356 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 357 | hsram->State = HAL_SRAM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 358 | |
mbed_official | 573:ad23fe03a082 | 359 | /* Read data from memory */ |
mbed_official | 573:ad23fe03a082 | 360 | for(; BufferSize != 0; BufferSize--) |
mbed_official | 573:ad23fe03a082 | 361 | { |
mbed_official | 573:ad23fe03a082 | 362 | *pDstBuffer = *(__IO uint16_t *)psramaddress; |
mbed_official | 573:ad23fe03a082 | 363 | pDstBuffer++; |
mbed_official | 573:ad23fe03a082 | 364 | psramaddress++; |
mbed_official | 573:ad23fe03a082 | 365 | } |
mbed_official | 573:ad23fe03a082 | 366 | |
mbed_official | 573:ad23fe03a082 | 367 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 368 | hsram->State = HAL_SRAM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 369 | |
mbed_official | 573:ad23fe03a082 | 370 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 371 | __HAL_UNLOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 372 | |
mbed_official | 573:ad23fe03a082 | 373 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 374 | } |
mbed_official | 573:ad23fe03a082 | 375 | |
mbed_official | 573:ad23fe03a082 | 376 | /** |
mbed_official | 573:ad23fe03a082 | 377 | * @brief Writes 16-bit buffer to SRAM memory. |
mbed_official | 573:ad23fe03a082 | 378 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 379 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 380 | * @param pAddress: Pointer to write start address |
mbed_official | 573:ad23fe03a082 | 381 | * @param pSrcBuffer: Pointer to source buffer to write |
mbed_official | 573:ad23fe03a082 | 382 | * @param BufferSize: Size of the buffer to write to memory |
mbed_official | 573:ad23fe03a082 | 383 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 384 | */ |
mbed_official | 573:ad23fe03a082 | 385 | HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize) |
mbed_official | 573:ad23fe03a082 | 386 | { |
mbed_official | 573:ad23fe03a082 | 387 | __IO uint16_t * psramaddress = (uint16_t *)pAddress; |
mbed_official | 573:ad23fe03a082 | 388 | |
mbed_official | 573:ad23fe03a082 | 389 | /* Check the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 390 | if(hsram->State == HAL_SRAM_STATE_PROTECTED) |
mbed_official | 573:ad23fe03a082 | 391 | { |
mbed_official | 573:ad23fe03a082 | 392 | return HAL_ERROR; |
mbed_official | 573:ad23fe03a082 | 393 | } |
mbed_official | 573:ad23fe03a082 | 394 | |
mbed_official | 573:ad23fe03a082 | 395 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 396 | __HAL_LOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 397 | |
mbed_official | 573:ad23fe03a082 | 398 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 399 | hsram->State = HAL_SRAM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 400 | |
mbed_official | 573:ad23fe03a082 | 401 | /* Write data to memory */ |
mbed_official | 573:ad23fe03a082 | 402 | for(; BufferSize != 0; BufferSize--) |
mbed_official | 573:ad23fe03a082 | 403 | { |
mbed_official | 573:ad23fe03a082 | 404 | *(__IO uint16_t *)psramaddress = *pSrcBuffer; |
mbed_official | 573:ad23fe03a082 | 405 | pSrcBuffer++; |
mbed_official | 573:ad23fe03a082 | 406 | psramaddress++; |
mbed_official | 573:ad23fe03a082 | 407 | } |
mbed_official | 573:ad23fe03a082 | 408 | |
mbed_official | 573:ad23fe03a082 | 409 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 410 | hsram->State = HAL_SRAM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 411 | |
mbed_official | 573:ad23fe03a082 | 412 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 413 | __HAL_UNLOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 414 | |
mbed_official | 573:ad23fe03a082 | 415 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 416 | } |
mbed_official | 573:ad23fe03a082 | 417 | |
mbed_official | 573:ad23fe03a082 | 418 | /** |
mbed_official | 573:ad23fe03a082 | 419 | * @brief Reads 32-bit buffer from SRAM memory. |
mbed_official | 573:ad23fe03a082 | 420 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 421 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 422 | * @param pAddress: Pointer to read start address |
mbed_official | 573:ad23fe03a082 | 423 | * @param pDstBuffer: Pointer to destination buffer |
mbed_official | 573:ad23fe03a082 | 424 | * @param BufferSize: Size of the buffer to read from memory |
mbed_official | 573:ad23fe03a082 | 425 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 426 | */ |
mbed_official | 573:ad23fe03a082 | 427 | HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize) |
mbed_official | 573:ad23fe03a082 | 428 | { |
mbed_official | 573:ad23fe03a082 | 429 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 430 | __HAL_LOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 431 | |
mbed_official | 573:ad23fe03a082 | 432 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 433 | hsram->State = HAL_SRAM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 434 | |
mbed_official | 573:ad23fe03a082 | 435 | /* Read data from memory */ |
mbed_official | 573:ad23fe03a082 | 436 | for(; BufferSize != 0; BufferSize--) |
mbed_official | 573:ad23fe03a082 | 437 | { |
mbed_official | 573:ad23fe03a082 | 438 | *pDstBuffer = *(__IO uint32_t *)pAddress; |
mbed_official | 573:ad23fe03a082 | 439 | pDstBuffer++; |
mbed_official | 573:ad23fe03a082 | 440 | pAddress++; |
mbed_official | 573:ad23fe03a082 | 441 | } |
mbed_official | 573:ad23fe03a082 | 442 | |
mbed_official | 573:ad23fe03a082 | 443 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 444 | hsram->State = HAL_SRAM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 445 | |
mbed_official | 573:ad23fe03a082 | 446 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 447 | __HAL_UNLOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 448 | |
mbed_official | 573:ad23fe03a082 | 449 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 450 | } |
mbed_official | 573:ad23fe03a082 | 451 | |
mbed_official | 573:ad23fe03a082 | 452 | /** |
mbed_official | 573:ad23fe03a082 | 453 | * @brief Writes 32-bit buffer to SRAM memory. |
mbed_official | 573:ad23fe03a082 | 454 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 455 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 456 | * @param pAddress: Pointer to write start address |
mbed_official | 573:ad23fe03a082 | 457 | * @param pSrcBuffer: Pointer to source buffer to write |
mbed_official | 573:ad23fe03a082 | 458 | * @param BufferSize: Size of the buffer to write to memory |
mbed_official | 573:ad23fe03a082 | 459 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 460 | */ |
mbed_official | 573:ad23fe03a082 | 461 | HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize) |
mbed_official | 573:ad23fe03a082 | 462 | { |
mbed_official | 573:ad23fe03a082 | 463 | /* Check the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 464 | if(hsram->State == HAL_SRAM_STATE_PROTECTED) |
mbed_official | 573:ad23fe03a082 | 465 | { |
mbed_official | 573:ad23fe03a082 | 466 | return HAL_ERROR; |
mbed_official | 573:ad23fe03a082 | 467 | } |
mbed_official | 573:ad23fe03a082 | 468 | |
mbed_official | 573:ad23fe03a082 | 469 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 470 | __HAL_LOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 471 | |
mbed_official | 573:ad23fe03a082 | 472 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 473 | hsram->State = HAL_SRAM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 474 | |
mbed_official | 573:ad23fe03a082 | 475 | /* Write data to memory */ |
mbed_official | 573:ad23fe03a082 | 476 | for(; BufferSize != 0; BufferSize--) |
mbed_official | 573:ad23fe03a082 | 477 | { |
mbed_official | 573:ad23fe03a082 | 478 | *(__IO uint32_t *)pAddress = *pSrcBuffer; |
mbed_official | 573:ad23fe03a082 | 479 | pSrcBuffer++; |
mbed_official | 573:ad23fe03a082 | 480 | pAddress++; |
mbed_official | 573:ad23fe03a082 | 481 | } |
mbed_official | 573:ad23fe03a082 | 482 | |
mbed_official | 573:ad23fe03a082 | 483 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 484 | hsram->State = HAL_SRAM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 485 | |
mbed_official | 573:ad23fe03a082 | 486 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 487 | __HAL_UNLOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 488 | |
mbed_official | 573:ad23fe03a082 | 489 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 490 | } |
mbed_official | 573:ad23fe03a082 | 491 | |
mbed_official | 573:ad23fe03a082 | 492 | /** |
mbed_official | 573:ad23fe03a082 | 493 | * @brief Reads a Words data from the SRAM memory using DMA transfer. |
mbed_official | 573:ad23fe03a082 | 494 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 495 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 496 | * @param pAddress: Pointer to read start address |
mbed_official | 573:ad23fe03a082 | 497 | * @param pDstBuffer: Pointer to destination buffer |
mbed_official | 573:ad23fe03a082 | 498 | * @param BufferSize: Size of the buffer to read from memory |
mbed_official | 573:ad23fe03a082 | 499 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 500 | */ |
mbed_official | 573:ad23fe03a082 | 501 | HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize) |
mbed_official | 573:ad23fe03a082 | 502 | { |
mbed_official | 573:ad23fe03a082 | 503 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 504 | __HAL_LOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 505 | |
mbed_official | 573:ad23fe03a082 | 506 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 507 | hsram->State = HAL_SRAM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 508 | |
mbed_official | 573:ad23fe03a082 | 509 | /* Configure DMA user callbacks */ |
mbed_official | 573:ad23fe03a082 | 510 | hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback; |
mbed_official | 573:ad23fe03a082 | 511 | hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback; |
mbed_official | 573:ad23fe03a082 | 512 | |
mbed_official | 573:ad23fe03a082 | 513 | /* Enable the DMA Stream */ |
mbed_official | 573:ad23fe03a082 | 514 | HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize); |
mbed_official | 573:ad23fe03a082 | 515 | |
mbed_official | 573:ad23fe03a082 | 516 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 517 | hsram->State = HAL_SRAM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 518 | |
mbed_official | 573:ad23fe03a082 | 519 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 520 | __HAL_UNLOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 521 | |
mbed_official | 573:ad23fe03a082 | 522 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 523 | } |
mbed_official | 573:ad23fe03a082 | 524 | |
mbed_official | 573:ad23fe03a082 | 525 | /** |
mbed_official | 573:ad23fe03a082 | 526 | * @brief Writes a Words data buffer to SRAM memory using DMA transfer. |
mbed_official | 573:ad23fe03a082 | 527 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 528 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 529 | * @param pAddress: Pointer to write start address |
mbed_official | 573:ad23fe03a082 | 530 | * @param pSrcBuffer: Pointer to source buffer to write |
mbed_official | 573:ad23fe03a082 | 531 | * @param BufferSize: Size of the buffer to write to memory |
mbed_official | 573:ad23fe03a082 | 532 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 533 | */ |
mbed_official | 573:ad23fe03a082 | 534 | HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize) |
mbed_official | 573:ad23fe03a082 | 535 | { |
mbed_official | 573:ad23fe03a082 | 536 | /* Check the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 537 | if(hsram->State == HAL_SRAM_STATE_PROTECTED) |
mbed_official | 573:ad23fe03a082 | 538 | { |
mbed_official | 573:ad23fe03a082 | 539 | return HAL_ERROR; |
mbed_official | 573:ad23fe03a082 | 540 | } |
mbed_official | 573:ad23fe03a082 | 541 | |
mbed_official | 573:ad23fe03a082 | 542 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 543 | __HAL_LOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 544 | |
mbed_official | 573:ad23fe03a082 | 545 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 546 | hsram->State = HAL_SRAM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 547 | |
mbed_official | 573:ad23fe03a082 | 548 | /* Configure DMA user callbacks */ |
mbed_official | 573:ad23fe03a082 | 549 | hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback; |
mbed_official | 573:ad23fe03a082 | 550 | hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback; |
mbed_official | 573:ad23fe03a082 | 551 | |
mbed_official | 573:ad23fe03a082 | 552 | /* Enable the DMA Stream */ |
mbed_official | 573:ad23fe03a082 | 553 | HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize); |
mbed_official | 573:ad23fe03a082 | 554 | |
mbed_official | 573:ad23fe03a082 | 555 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 556 | hsram->State = HAL_SRAM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 557 | |
mbed_official | 573:ad23fe03a082 | 558 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 559 | __HAL_UNLOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 560 | |
mbed_official | 573:ad23fe03a082 | 561 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 562 | } |
mbed_official | 573:ad23fe03a082 | 563 | |
mbed_official | 573:ad23fe03a082 | 564 | /** |
mbed_official | 573:ad23fe03a082 | 565 | * @} |
mbed_official | 573:ad23fe03a082 | 566 | */ |
mbed_official | 573:ad23fe03a082 | 567 | |
mbed_official | 573:ad23fe03a082 | 568 | /** @defgroup SRAM_Exported_Functions_Group3 Control functions |
mbed_official | 573:ad23fe03a082 | 569 | * @brief Control functions |
mbed_official | 573:ad23fe03a082 | 570 | * |
mbed_official | 573:ad23fe03a082 | 571 | @verbatim |
mbed_official | 573:ad23fe03a082 | 572 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 573 | ##### SRAM Control functions ##### |
mbed_official | 573:ad23fe03a082 | 574 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 575 | [..] |
mbed_official | 573:ad23fe03a082 | 576 | This subsection provides a set of functions allowing to control dynamically |
mbed_official | 573:ad23fe03a082 | 577 | the SRAM interface. |
mbed_official | 573:ad23fe03a082 | 578 | |
mbed_official | 573:ad23fe03a082 | 579 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 580 | * @{ |
mbed_official | 573:ad23fe03a082 | 581 | */ |
mbed_official | 573:ad23fe03a082 | 582 | |
mbed_official | 573:ad23fe03a082 | 583 | /** |
mbed_official | 573:ad23fe03a082 | 584 | * @brief Enables dynamically SRAM write operation. |
mbed_official | 573:ad23fe03a082 | 585 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 586 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 587 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 588 | */ |
mbed_official | 573:ad23fe03a082 | 589 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram) |
mbed_official | 573:ad23fe03a082 | 590 | { |
mbed_official | 573:ad23fe03a082 | 591 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 592 | __HAL_LOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 593 | |
mbed_official | 573:ad23fe03a082 | 594 | /* Enable write operation */ |
mbed_official | 573:ad23fe03a082 | 595 | FMC_NORSRAM_WriteOperation_Enable(hsram->Instance, hsram->Init.NSBank); |
mbed_official | 573:ad23fe03a082 | 596 | |
mbed_official | 573:ad23fe03a082 | 597 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 598 | hsram->State = HAL_SRAM_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 599 | |
mbed_official | 573:ad23fe03a082 | 600 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 601 | __HAL_UNLOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 602 | |
mbed_official | 573:ad23fe03a082 | 603 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 604 | } |
mbed_official | 573:ad23fe03a082 | 605 | |
mbed_official | 573:ad23fe03a082 | 606 | /** |
mbed_official | 573:ad23fe03a082 | 607 | * @brief Disables dynamically SRAM write operation. |
mbed_official | 573:ad23fe03a082 | 608 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 609 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 610 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 611 | */ |
mbed_official | 573:ad23fe03a082 | 612 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram) |
mbed_official | 573:ad23fe03a082 | 613 | { |
mbed_official | 573:ad23fe03a082 | 614 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 615 | __HAL_LOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 616 | |
mbed_official | 573:ad23fe03a082 | 617 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 618 | hsram->State = HAL_SRAM_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 619 | |
mbed_official | 573:ad23fe03a082 | 620 | /* Disable write operation */ |
mbed_official | 573:ad23fe03a082 | 621 | FMC_NORSRAM_WriteOperation_Disable(hsram->Instance, hsram->Init.NSBank); |
mbed_official | 573:ad23fe03a082 | 622 | |
mbed_official | 573:ad23fe03a082 | 623 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 624 | hsram->State = HAL_SRAM_STATE_PROTECTED; |
mbed_official | 573:ad23fe03a082 | 625 | |
mbed_official | 573:ad23fe03a082 | 626 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 627 | __HAL_UNLOCK(hsram); |
mbed_official | 573:ad23fe03a082 | 628 | |
mbed_official | 573:ad23fe03a082 | 629 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 630 | } |
mbed_official | 573:ad23fe03a082 | 631 | |
mbed_official | 573:ad23fe03a082 | 632 | /** |
mbed_official | 573:ad23fe03a082 | 633 | * @} |
mbed_official | 573:ad23fe03a082 | 634 | */ |
mbed_official | 573:ad23fe03a082 | 635 | |
mbed_official | 573:ad23fe03a082 | 636 | /** @defgroup SRAM_Exported_Functions_Group4 Peripheral State functions |
mbed_official | 573:ad23fe03a082 | 637 | * @brief Peripheral State functions |
mbed_official | 573:ad23fe03a082 | 638 | * |
mbed_official | 573:ad23fe03a082 | 639 | @verbatim |
mbed_official | 573:ad23fe03a082 | 640 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 641 | ##### SRAM State functions ##### |
mbed_official | 573:ad23fe03a082 | 642 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 643 | [..] |
mbed_official | 573:ad23fe03a082 | 644 | This subsection permits to get in run-time the status of the SRAM controller |
mbed_official | 573:ad23fe03a082 | 645 | and the data flow. |
mbed_official | 573:ad23fe03a082 | 646 | |
mbed_official | 573:ad23fe03a082 | 647 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 648 | * @{ |
mbed_official | 573:ad23fe03a082 | 649 | */ |
mbed_official | 573:ad23fe03a082 | 650 | |
mbed_official | 573:ad23fe03a082 | 651 | /** |
mbed_official | 573:ad23fe03a082 | 652 | * @brief Returns the SRAM controller state |
mbed_official | 573:ad23fe03a082 | 653 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 654 | * the configuration information for SRAM module. |
mbed_official | 573:ad23fe03a082 | 655 | * @retval HAL state |
mbed_official | 573:ad23fe03a082 | 656 | */ |
mbed_official | 573:ad23fe03a082 | 657 | HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram) |
mbed_official | 573:ad23fe03a082 | 658 | { |
mbed_official | 573:ad23fe03a082 | 659 | return hsram->State; |
mbed_official | 573:ad23fe03a082 | 660 | } |
mbed_official | 573:ad23fe03a082 | 661 | |
mbed_official | 573:ad23fe03a082 | 662 | /** |
mbed_official | 573:ad23fe03a082 | 663 | * @} |
mbed_official | 573:ad23fe03a082 | 664 | */ |
mbed_official | 573:ad23fe03a082 | 665 | |
mbed_official | 573:ad23fe03a082 | 666 | /** |
mbed_official | 573:ad23fe03a082 | 667 | * @} |
mbed_official | 573:ad23fe03a082 | 668 | */ |
mbed_official | 573:ad23fe03a082 | 669 | #endif /* HAL_SRAM_MODULE_ENABLED */ |
mbed_official | 573:ad23fe03a082 | 670 | /** |
mbed_official | 573:ad23fe03a082 | 671 | * @} |
mbed_official | 573:ad23fe03a082 | 672 | */ |
mbed_official | 573:ad23fe03a082 | 673 | |
mbed_official | 573:ad23fe03a082 | 674 | /** |
mbed_official | 573:ad23fe03a082 | 675 | * @} |
mbed_official | 573:ad23fe03a082 | 676 | */ |
mbed_official | 573:ad23fe03a082 | 677 | |
mbed_official | 573:ad23fe03a082 | 678 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |