mbed library sources
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_nor.c@637:ed69428d4850, 2015-12-22 (annotated)
- Committer:
- jaerts
- Date:
- Tue Dec 22 13:22:16 2015 +0000
- Revision:
- 637:ed69428d4850
- Parent:
- 610:813dcc80987e
Add very shady LPC1768 CAN Filter implementation
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 573:ad23fe03a082 | 1 | /** |
mbed_official | 573:ad23fe03a082 | 2 | ****************************************************************************** |
mbed_official | 573:ad23fe03a082 | 3 | * @file stm32f7xx_hal_nor.c |
mbed_official | 573:ad23fe03a082 | 4 | * @author MCD Application Team |
mbed_official | 610:813dcc80987e | 5 | * @version V1.0.1 |
mbed_official | 610:813dcc80987e | 6 | * @date 25-June-2015 |
mbed_official | 573:ad23fe03a082 | 7 | * @brief NOR HAL module driver. |
mbed_official | 573:ad23fe03a082 | 8 | * This file provides a generic firmware to drive NOR memories mounted |
mbed_official | 573:ad23fe03a082 | 9 | * as external device. |
mbed_official | 573:ad23fe03a082 | 10 | * |
mbed_official | 573:ad23fe03a082 | 11 | @verbatim |
mbed_official | 573:ad23fe03a082 | 12 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 13 | ##### How to use this driver ##### |
mbed_official | 573:ad23fe03a082 | 14 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 15 | [..] |
mbed_official | 573:ad23fe03a082 | 16 | This driver is a generic layered driver which contains a set of APIs used to |
mbed_official | 573:ad23fe03a082 | 17 | control NOR flash memories. It uses the FMC layer functions to interface |
mbed_official | 573:ad23fe03a082 | 18 | with NOR devices. This driver is used as follows: |
mbed_official | 573:ad23fe03a082 | 19 | |
mbed_official | 573:ad23fe03a082 | 20 | (+) NOR flash memory configuration sequence using the function HAL_NOR_Init() |
mbed_official | 573:ad23fe03a082 | 21 | with control and timing parameters for both normal and extended mode. |
mbed_official | 573:ad23fe03a082 | 22 | |
mbed_official | 573:ad23fe03a082 | 23 | (+) Read NOR flash memory manufacturer code and device IDs using the function |
mbed_official | 573:ad23fe03a082 | 24 | HAL_NOR_Read_ID(). The read information is stored in the NOR_ID_TypeDef |
mbed_official | 573:ad23fe03a082 | 25 | structure declared by the function caller. |
mbed_official | 573:ad23fe03a082 | 26 | |
mbed_official | 573:ad23fe03a082 | 27 | (+) Access NOR flash memory by read/write data unit operations using the functions |
mbed_official | 573:ad23fe03a082 | 28 | HAL_NOR_Read(), HAL_NOR_Program(). |
mbed_official | 573:ad23fe03a082 | 29 | |
mbed_official | 573:ad23fe03a082 | 30 | (+) Perform NOR flash erase block/chip operations using the functions |
mbed_official | 573:ad23fe03a082 | 31 | HAL_NOR_Erase_Block() and HAL_NOR_Erase_Chip(). |
mbed_official | 573:ad23fe03a082 | 32 | |
mbed_official | 573:ad23fe03a082 | 33 | (+) Read the NOR flash CFI (common flash interface) IDs using the function |
mbed_official | 573:ad23fe03a082 | 34 | HAL_NOR_Read_CFI(). The read information is stored in the NOR_CFI_TypeDef |
mbed_official | 573:ad23fe03a082 | 35 | structure declared by the function caller. |
mbed_official | 573:ad23fe03a082 | 36 | |
mbed_official | 573:ad23fe03a082 | 37 | (+) You can also control the NOR device by calling the control APIs HAL_NOR_WriteOperation_Enable()/ |
mbed_official | 573:ad23fe03a082 | 38 | HAL_NOR_WriteOperation_Disable() to respectively enable/disable the NOR write operation |
mbed_official | 573:ad23fe03a082 | 39 | |
mbed_official | 573:ad23fe03a082 | 40 | (+) You can monitor the NOR device HAL state by calling the function |
mbed_official | 573:ad23fe03a082 | 41 | HAL_NOR_GetState() |
mbed_official | 573:ad23fe03a082 | 42 | [..] |
mbed_official | 573:ad23fe03a082 | 43 | (@) This driver is a set of generic APIs which handle standard NOR flash operations. |
mbed_official | 573:ad23fe03a082 | 44 | If a NOR flash device contains different operations and/or implementations, |
mbed_official | 573:ad23fe03a082 | 45 | it should be implemented separately. |
mbed_official | 573:ad23fe03a082 | 46 | |
mbed_official | 573:ad23fe03a082 | 47 | *** NOR HAL driver macros list *** |
mbed_official | 573:ad23fe03a082 | 48 | ============================================= |
mbed_official | 573:ad23fe03a082 | 49 | [..] |
mbed_official | 573:ad23fe03a082 | 50 | Below the list of most used macros in NOR HAL driver. |
mbed_official | 573:ad23fe03a082 | 51 | |
mbed_official | 573:ad23fe03a082 | 52 | (+) NOR_WRITE : NOR memory write data to specified address |
mbed_official | 573:ad23fe03a082 | 53 | |
mbed_official | 573:ad23fe03a082 | 54 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 55 | ****************************************************************************** |
mbed_official | 573:ad23fe03a082 | 56 | * @attention |
mbed_official | 573:ad23fe03a082 | 57 | * |
mbed_official | 573:ad23fe03a082 | 58 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
mbed_official | 573:ad23fe03a082 | 59 | * |
mbed_official | 573:ad23fe03a082 | 60 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 573:ad23fe03a082 | 61 | * are permitted provided that the following conditions are met: |
mbed_official | 573:ad23fe03a082 | 62 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 573:ad23fe03a082 | 63 | * this list of conditions and the following disclaimer. |
mbed_official | 573:ad23fe03a082 | 64 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 573:ad23fe03a082 | 65 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 573:ad23fe03a082 | 66 | * and/or other materials provided with the distribution. |
mbed_official | 573:ad23fe03a082 | 67 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 573:ad23fe03a082 | 68 | * may be used to endorse or promote products derived from this software |
mbed_official | 573:ad23fe03a082 | 69 | * without specific prior written permission. |
mbed_official | 573:ad23fe03a082 | 70 | * |
mbed_official | 573:ad23fe03a082 | 71 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 573:ad23fe03a082 | 72 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 573:ad23fe03a082 | 73 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 573:ad23fe03a082 | 74 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 573:ad23fe03a082 | 75 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 573:ad23fe03a082 | 76 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 573:ad23fe03a082 | 77 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 573:ad23fe03a082 | 78 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 573:ad23fe03a082 | 79 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 573:ad23fe03a082 | 80 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 573:ad23fe03a082 | 81 | * |
mbed_official | 573:ad23fe03a082 | 82 | ****************************************************************************** |
mbed_official | 573:ad23fe03a082 | 83 | */ |
mbed_official | 573:ad23fe03a082 | 84 | |
mbed_official | 573:ad23fe03a082 | 85 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 86 | #include "stm32f7xx_hal.h" |
mbed_official | 573:ad23fe03a082 | 87 | |
mbed_official | 573:ad23fe03a082 | 88 | /** @addtogroup STM32F7xx_HAL_Driver |
mbed_official | 573:ad23fe03a082 | 89 | * @{ |
mbed_official | 573:ad23fe03a082 | 90 | */ |
mbed_official | 573:ad23fe03a082 | 91 | |
mbed_official | 573:ad23fe03a082 | 92 | /** @defgroup NOR NOR |
mbed_official | 573:ad23fe03a082 | 93 | * @brief NOR driver modules |
mbed_official | 573:ad23fe03a082 | 94 | * @{ |
mbed_official | 573:ad23fe03a082 | 95 | */ |
mbed_official | 573:ad23fe03a082 | 96 | #ifdef HAL_NOR_MODULE_ENABLED |
mbed_official | 573:ad23fe03a082 | 97 | |
mbed_official | 573:ad23fe03a082 | 98 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 99 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 100 | |
mbed_official | 573:ad23fe03a082 | 101 | /** @defgroup NOR_Private_Defines NOR Private Defines |
mbed_official | 573:ad23fe03a082 | 102 | * @{ |
mbed_official | 573:ad23fe03a082 | 103 | */ |
mbed_official | 573:ad23fe03a082 | 104 | |
mbed_official | 573:ad23fe03a082 | 105 | /* Constants to define address to set to write a command */ |
mbed_official | 573:ad23fe03a082 | 106 | #define NOR_CMD_ADDRESS_FIRST (uint16_t)0x0555 |
mbed_official | 573:ad23fe03a082 | 107 | #define NOR_CMD_ADDRESS_FIRST_CFI (uint16_t)0x0055 |
mbed_official | 573:ad23fe03a082 | 108 | #define NOR_CMD_ADDRESS_SECOND (uint16_t)0x02AA |
mbed_official | 573:ad23fe03a082 | 109 | #define NOR_CMD_ADDRESS_THIRD (uint16_t)0x0555 |
mbed_official | 573:ad23fe03a082 | 110 | #define NOR_CMD_ADDRESS_FOURTH (uint16_t)0x0555 |
mbed_official | 573:ad23fe03a082 | 111 | #define NOR_CMD_ADDRESS_FIFTH (uint16_t)0x02AA |
mbed_official | 573:ad23fe03a082 | 112 | #define NOR_CMD_ADDRESS_SIXTH (uint16_t)0x0555 |
mbed_official | 573:ad23fe03a082 | 113 | |
mbed_official | 573:ad23fe03a082 | 114 | /* Constants to define data to program a command */ |
mbed_official | 573:ad23fe03a082 | 115 | #define NOR_CMD_DATA_READ_RESET (uint16_t)0x00F0 |
mbed_official | 573:ad23fe03a082 | 116 | #define NOR_CMD_DATA_FIRST (uint16_t)0x00AA |
mbed_official | 573:ad23fe03a082 | 117 | #define NOR_CMD_DATA_SECOND (uint16_t)0x0055 |
mbed_official | 573:ad23fe03a082 | 118 | #define NOR_CMD_DATA_AUTO_SELECT (uint16_t)0x0090 |
mbed_official | 573:ad23fe03a082 | 119 | #define NOR_CMD_DATA_PROGRAM (uint16_t)0x00A0 |
mbed_official | 573:ad23fe03a082 | 120 | #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD (uint16_t)0x0080 |
mbed_official | 573:ad23fe03a082 | 121 | #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH (uint16_t)0x00AA |
mbed_official | 573:ad23fe03a082 | 122 | #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH (uint16_t)0x0055 |
mbed_official | 573:ad23fe03a082 | 123 | #define NOR_CMD_DATA_CHIP_ERASE (uint16_t)0x0010 |
mbed_official | 573:ad23fe03a082 | 124 | #define NOR_CMD_DATA_CFI (uint16_t)0x0098 |
mbed_official | 573:ad23fe03a082 | 125 | |
mbed_official | 573:ad23fe03a082 | 126 | #define NOR_CMD_DATA_BUFFER_AND_PROG (uint8_t)0x25 |
mbed_official | 573:ad23fe03a082 | 127 | #define NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM (uint8_t)0x29 |
mbed_official | 573:ad23fe03a082 | 128 | #define NOR_CMD_DATA_BLOCK_ERASE (uint8_t)0x30 |
mbed_official | 573:ad23fe03a082 | 129 | |
mbed_official | 573:ad23fe03a082 | 130 | /* Mask on NOR STATUS REGISTER */ |
mbed_official | 573:ad23fe03a082 | 131 | #define NOR_MASK_STATUS_DQ5 (uint16_t)0x0020 |
mbed_official | 573:ad23fe03a082 | 132 | #define NOR_MASK_STATUS_DQ6 (uint16_t)0x0040 |
mbed_official | 573:ad23fe03a082 | 133 | |
mbed_official | 573:ad23fe03a082 | 134 | /** |
mbed_official | 573:ad23fe03a082 | 135 | * @} |
mbed_official | 573:ad23fe03a082 | 136 | */ |
mbed_official | 573:ad23fe03a082 | 137 | |
mbed_official | 573:ad23fe03a082 | 138 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 139 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 140 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 141 | /* Exported functions --------------------------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 142 | /** @defgroup NOR_Exported_Functions NOR Exported Functions |
mbed_official | 573:ad23fe03a082 | 143 | * @{ |
mbed_official | 573:ad23fe03a082 | 144 | */ |
mbed_official | 573:ad23fe03a082 | 145 | |
mbed_official | 573:ad23fe03a082 | 146 | /** @defgroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions |
mbed_official | 573:ad23fe03a082 | 147 | * @brief Initialization and Configuration functions |
mbed_official | 573:ad23fe03a082 | 148 | * |
mbed_official | 573:ad23fe03a082 | 149 | @verbatim |
mbed_official | 573:ad23fe03a082 | 150 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 151 | ##### NOR Initialization and de_initialization functions ##### |
mbed_official | 573:ad23fe03a082 | 152 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 153 | [..] |
mbed_official | 573:ad23fe03a082 | 154 | This section provides functions allowing to initialize/de-initialize |
mbed_official | 573:ad23fe03a082 | 155 | the NOR memory |
mbed_official | 573:ad23fe03a082 | 156 | |
mbed_official | 573:ad23fe03a082 | 157 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 158 | * @{ |
mbed_official | 573:ad23fe03a082 | 159 | */ |
mbed_official | 573:ad23fe03a082 | 160 | |
mbed_official | 573:ad23fe03a082 | 161 | /** |
mbed_official | 573:ad23fe03a082 | 162 | * @brief Perform the NOR memory Initialization sequence |
mbed_official | 573:ad23fe03a082 | 163 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 164 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 165 | * @param Timing: pointer to NOR control timing structure |
mbed_official | 573:ad23fe03a082 | 166 | * @param ExtTiming: pointer to NOR extended mode timing structure |
mbed_official | 573:ad23fe03a082 | 167 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 168 | */ |
mbed_official | 573:ad23fe03a082 | 169 | HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming) |
mbed_official | 573:ad23fe03a082 | 170 | { |
mbed_official | 573:ad23fe03a082 | 171 | /* Check the NOR handle parameter */ |
mbed_official | 573:ad23fe03a082 | 172 | if(hnor == NULL) |
mbed_official | 573:ad23fe03a082 | 173 | { |
mbed_official | 573:ad23fe03a082 | 174 | return HAL_ERROR; |
mbed_official | 573:ad23fe03a082 | 175 | } |
mbed_official | 573:ad23fe03a082 | 176 | |
mbed_official | 573:ad23fe03a082 | 177 | if(hnor->State == HAL_NOR_STATE_RESET) |
mbed_official | 573:ad23fe03a082 | 178 | { |
mbed_official | 573:ad23fe03a082 | 179 | /* Allocate lock resource and initialize it */ |
mbed_official | 573:ad23fe03a082 | 180 | hnor->Lock = HAL_UNLOCKED; |
mbed_official | 573:ad23fe03a082 | 181 | /* Initialize the low level hardware (MSP) */ |
mbed_official | 573:ad23fe03a082 | 182 | HAL_NOR_MspInit(hnor); |
mbed_official | 573:ad23fe03a082 | 183 | } |
mbed_official | 573:ad23fe03a082 | 184 | |
mbed_official | 573:ad23fe03a082 | 185 | /* Initialize NOR control Interface */ |
mbed_official | 573:ad23fe03a082 | 186 | FMC_NORSRAM_Init(hnor->Instance, &(hnor->Init)); |
mbed_official | 573:ad23fe03a082 | 187 | |
mbed_official | 573:ad23fe03a082 | 188 | /* Initialize NOR timing Interface */ |
mbed_official | 573:ad23fe03a082 | 189 | FMC_NORSRAM_Timing_Init(hnor->Instance, Timing, hnor->Init.NSBank); |
mbed_official | 573:ad23fe03a082 | 190 | |
mbed_official | 573:ad23fe03a082 | 191 | /* Initialize NOR extended mode timing Interface */ |
mbed_official | 573:ad23fe03a082 | 192 | FMC_NORSRAM_Extended_Timing_Init(hnor->Extended, ExtTiming, hnor->Init.NSBank, hnor->Init.ExtendedMode); |
mbed_official | 573:ad23fe03a082 | 193 | |
mbed_official | 573:ad23fe03a082 | 194 | /* Enable the NORSRAM device */ |
mbed_official | 573:ad23fe03a082 | 195 | __FMC_NORSRAM_ENABLE(hnor->Instance, hnor->Init.NSBank); |
mbed_official | 573:ad23fe03a082 | 196 | |
mbed_official | 573:ad23fe03a082 | 197 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 198 | hnor->State = HAL_NOR_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 199 | |
mbed_official | 573:ad23fe03a082 | 200 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 201 | } |
mbed_official | 573:ad23fe03a082 | 202 | |
mbed_official | 573:ad23fe03a082 | 203 | /** |
mbed_official | 573:ad23fe03a082 | 204 | * @brief Perform NOR memory De-Initialization sequence |
mbed_official | 573:ad23fe03a082 | 205 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 206 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 207 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 208 | */ |
mbed_official | 573:ad23fe03a082 | 209 | HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor) |
mbed_official | 573:ad23fe03a082 | 210 | { |
mbed_official | 573:ad23fe03a082 | 211 | /* De-Initialize the low level hardware (MSP) */ |
mbed_official | 573:ad23fe03a082 | 212 | HAL_NOR_MspDeInit(hnor); |
mbed_official | 573:ad23fe03a082 | 213 | |
mbed_official | 573:ad23fe03a082 | 214 | /* Configure the NOR registers with their reset values */ |
mbed_official | 573:ad23fe03a082 | 215 | FMC_NORSRAM_DeInit(hnor->Instance, hnor->Extended, hnor->Init.NSBank); |
mbed_official | 573:ad23fe03a082 | 216 | |
mbed_official | 573:ad23fe03a082 | 217 | /* Update the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 218 | hnor->State = HAL_NOR_STATE_RESET; |
mbed_official | 573:ad23fe03a082 | 219 | |
mbed_official | 573:ad23fe03a082 | 220 | /* Release Lock */ |
mbed_official | 573:ad23fe03a082 | 221 | __HAL_UNLOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 222 | |
mbed_official | 573:ad23fe03a082 | 223 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 224 | } |
mbed_official | 573:ad23fe03a082 | 225 | |
mbed_official | 573:ad23fe03a082 | 226 | /** |
mbed_official | 573:ad23fe03a082 | 227 | * @brief NOR MSP Init |
mbed_official | 573:ad23fe03a082 | 228 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 229 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 230 | * @retval None |
mbed_official | 573:ad23fe03a082 | 231 | */ |
mbed_official | 573:ad23fe03a082 | 232 | __weak void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor) |
mbed_official | 573:ad23fe03a082 | 233 | { |
mbed_official | 573:ad23fe03a082 | 234 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 573:ad23fe03a082 | 235 | the HAL_NOR_MspInit could be implemented in the user file |
mbed_official | 573:ad23fe03a082 | 236 | */ |
mbed_official | 573:ad23fe03a082 | 237 | } |
mbed_official | 573:ad23fe03a082 | 238 | |
mbed_official | 573:ad23fe03a082 | 239 | /** |
mbed_official | 573:ad23fe03a082 | 240 | * @brief NOR MSP DeInit |
mbed_official | 573:ad23fe03a082 | 241 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 242 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 243 | * @retval None |
mbed_official | 573:ad23fe03a082 | 244 | */ |
mbed_official | 573:ad23fe03a082 | 245 | __weak void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor) |
mbed_official | 573:ad23fe03a082 | 246 | { |
mbed_official | 573:ad23fe03a082 | 247 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 573:ad23fe03a082 | 248 | the HAL_NOR_MspDeInit could be implemented in the user file |
mbed_official | 573:ad23fe03a082 | 249 | */ |
mbed_official | 573:ad23fe03a082 | 250 | } |
mbed_official | 573:ad23fe03a082 | 251 | |
mbed_official | 573:ad23fe03a082 | 252 | /** |
mbed_official | 573:ad23fe03a082 | 253 | * @brief NOR MSP Wait for Ready/Busy signal |
mbed_official | 573:ad23fe03a082 | 254 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 255 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 256 | * @param Timeout: Maximum timeout value |
mbed_official | 573:ad23fe03a082 | 257 | * @retval None |
mbed_official | 573:ad23fe03a082 | 258 | */ |
mbed_official | 573:ad23fe03a082 | 259 | __weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout) |
mbed_official | 573:ad23fe03a082 | 260 | { |
mbed_official | 573:ad23fe03a082 | 261 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 573:ad23fe03a082 | 262 | the HAL_NOR_MspWait could be implemented in the user file |
mbed_official | 573:ad23fe03a082 | 263 | */ |
mbed_official | 573:ad23fe03a082 | 264 | } |
mbed_official | 573:ad23fe03a082 | 265 | |
mbed_official | 573:ad23fe03a082 | 266 | /** |
mbed_official | 573:ad23fe03a082 | 267 | * @} |
mbed_official | 573:ad23fe03a082 | 268 | */ |
mbed_official | 573:ad23fe03a082 | 269 | |
mbed_official | 573:ad23fe03a082 | 270 | /** @defgroup NOR_Exported_Functions_Group2 Input and Output functions |
mbed_official | 573:ad23fe03a082 | 271 | * @brief Input Output and memory control functions |
mbed_official | 573:ad23fe03a082 | 272 | * |
mbed_official | 573:ad23fe03a082 | 273 | @verbatim |
mbed_official | 573:ad23fe03a082 | 274 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 275 | ##### NOR Input and Output functions ##### |
mbed_official | 573:ad23fe03a082 | 276 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 277 | [..] |
mbed_official | 573:ad23fe03a082 | 278 | This section provides functions allowing to use and control the NOR memory |
mbed_official | 573:ad23fe03a082 | 279 | |
mbed_official | 573:ad23fe03a082 | 280 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 281 | * @{ |
mbed_official | 573:ad23fe03a082 | 282 | */ |
mbed_official | 573:ad23fe03a082 | 283 | |
mbed_official | 573:ad23fe03a082 | 284 | /** |
mbed_official | 573:ad23fe03a082 | 285 | * @brief Read NOR flash IDs |
mbed_official | 573:ad23fe03a082 | 286 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 287 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 288 | * @param pNOR_ID : pointer to NOR ID structure |
mbed_official | 573:ad23fe03a082 | 289 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 290 | */ |
mbed_official | 573:ad23fe03a082 | 291 | HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID) |
mbed_official | 573:ad23fe03a082 | 292 | { |
mbed_official | 573:ad23fe03a082 | 293 | uint32_t deviceaddress = 0; |
mbed_official | 573:ad23fe03a082 | 294 | |
mbed_official | 573:ad23fe03a082 | 295 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 296 | __HAL_LOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 297 | |
mbed_official | 573:ad23fe03a082 | 298 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 299 | if(hnor->State == HAL_NOR_STATE_BUSY) |
mbed_official | 573:ad23fe03a082 | 300 | { |
mbed_official | 573:ad23fe03a082 | 301 | return HAL_BUSY; |
mbed_official | 573:ad23fe03a082 | 302 | } |
mbed_official | 573:ad23fe03a082 | 303 | |
mbed_official | 573:ad23fe03a082 | 304 | /* Select the NOR device address */ |
mbed_official | 573:ad23fe03a082 | 305 | if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) |
mbed_official | 573:ad23fe03a082 | 306 | { |
mbed_official | 573:ad23fe03a082 | 307 | deviceaddress = NOR_MEMORY_ADRESS1; |
mbed_official | 573:ad23fe03a082 | 308 | } |
mbed_official | 573:ad23fe03a082 | 309 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) |
mbed_official | 573:ad23fe03a082 | 310 | { |
mbed_official | 573:ad23fe03a082 | 311 | deviceaddress = NOR_MEMORY_ADRESS2; |
mbed_official | 573:ad23fe03a082 | 312 | } |
mbed_official | 573:ad23fe03a082 | 313 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) |
mbed_official | 573:ad23fe03a082 | 314 | { |
mbed_official | 573:ad23fe03a082 | 315 | deviceaddress = NOR_MEMORY_ADRESS3; |
mbed_official | 573:ad23fe03a082 | 316 | } |
mbed_official | 573:ad23fe03a082 | 317 | else /* FMC_NORSRAM_BANK4 */ |
mbed_official | 573:ad23fe03a082 | 318 | { |
mbed_official | 573:ad23fe03a082 | 319 | deviceaddress = NOR_MEMORY_ADRESS4; |
mbed_official | 573:ad23fe03a082 | 320 | } |
mbed_official | 573:ad23fe03a082 | 321 | |
mbed_official | 573:ad23fe03a082 | 322 | /* Update the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 323 | hnor->State = HAL_NOR_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 324 | |
mbed_official | 573:ad23fe03a082 | 325 | /* Send read ID command */ |
mbed_official | 573:ad23fe03a082 | 326 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); |
mbed_official | 573:ad23fe03a082 | 327 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND); |
mbed_official | 573:ad23fe03a082 | 328 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_AUTO_SELECT); |
mbed_official | 573:ad23fe03a082 | 329 | |
mbed_official | 573:ad23fe03a082 | 330 | /* Read the NOR IDs */ |
mbed_official | 573:ad23fe03a082 | 331 | pNOR_ID->Manufacturer_Code = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, MC_ADDRESS); |
mbed_official | 573:ad23fe03a082 | 332 | pNOR_ID->Device_Code1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, DEVICE_CODE1_ADDR); |
mbed_official | 573:ad23fe03a082 | 333 | pNOR_ID->Device_Code2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, DEVICE_CODE2_ADDR); |
mbed_official | 573:ad23fe03a082 | 334 | pNOR_ID->Device_Code3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, DEVICE_CODE3_ADDR); |
mbed_official | 573:ad23fe03a082 | 335 | |
mbed_official | 573:ad23fe03a082 | 336 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 337 | hnor->State = HAL_NOR_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 338 | |
mbed_official | 573:ad23fe03a082 | 339 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 340 | __HAL_UNLOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 341 | |
mbed_official | 573:ad23fe03a082 | 342 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 343 | } |
mbed_official | 573:ad23fe03a082 | 344 | |
mbed_official | 573:ad23fe03a082 | 345 | /** |
mbed_official | 573:ad23fe03a082 | 346 | * @brief Returns the NOR memory to Read mode. |
mbed_official | 573:ad23fe03a082 | 347 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 348 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 349 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 350 | */ |
mbed_official | 573:ad23fe03a082 | 351 | HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor) |
mbed_official | 573:ad23fe03a082 | 352 | { |
mbed_official | 573:ad23fe03a082 | 353 | uint32_t deviceaddress = 0; |
mbed_official | 573:ad23fe03a082 | 354 | |
mbed_official | 573:ad23fe03a082 | 355 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 356 | __HAL_LOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 357 | |
mbed_official | 573:ad23fe03a082 | 358 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 359 | if(hnor->State == HAL_NOR_STATE_BUSY) |
mbed_official | 573:ad23fe03a082 | 360 | { |
mbed_official | 573:ad23fe03a082 | 361 | return HAL_BUSY; |
mbed_official | 573:ad23fe03a082 | 362 | } |
mbed_official | 573:ad23fe03a082 | 363 | |
mbed_official | 573:ad23fe03a082 | 364 | /* Select the NOR device address */ |
mbed_official | 573:ad23fe03a082 | 365 | if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) |
mbed_official | 573:ad23fe03a082 | 366 | { |
mbed_official | 573:ad23fe03a082 | 367 | deviceaddress = NOR_MEMORY_ADRESS1; |
mbed_official | 573:ad23fe03a082 | 368 | } |
mbed_official | 573:ad23fe03a082 | 369 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) |
mbed_official | 573:ad23fe03a082 | 370 | { |
mbed_official | 573:ad23fe03a082 | 371 | deviceaddress = NOR_MEMORY_ADRESS2; |
mbed_official | 573:ad23fe03a082 | 372 | } |
mbed_official | 573:ad23fe03a082 | 373 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) |
mbed_official | 573:ad23fe03a082 | 374 | { |
mbed_official | 573:ad23fe03a082 | 375 | deviceaddress = NOR_MEMORY_ADRESS3; |
mbed_official | 573:ad23fe03a082 | 376 | } |
mbed_official | 573:ad23fe03a082 | 377 | else /* FMC_NORSRAM_BANK4 */ |
mbed_official | 573:ad23fe03a082 | 378 | { |
mbed_official | 573:ad23fe03a082 | 379 | deviceaddress = NOR_MEMORY_ADRESS4; |
mbed_official | 573:ad23fe03a082 | 380 | } |
mbed_official | 573:ad23fe03a082 | 381 | |
mbed_official | 573:ad23fe03a082 | 382 | NOR_WRITE(deviceaddress, NOR_CMD_DATA_READ_RESET); |
mbed_official | 573:ad23fe03a082 | 383 | |
mbed_official | 573:ad23fe03a082 | 384 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 385 | hnor->State = HAL_NOR_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 386 | |
mbed_official | 573:ad23fe03a082 | 387 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 388 | __HAL_UNLOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 389 | |
mbed_official | 573:ad23fe03a082 | 390 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 391 | } |
mbed_official | 573:ad23fe03a082 | 392 | |
mbed_official | 573:ad23fe03a082 | 393 | /** |
mbed_official | 573:ad23fe03a082 | 394 | * @brief Read data from NOR memory |
mbed_official | 573:ad23fe03a082 | 395 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 396 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 397 | * @param pAddress: pointer to Device address |
mbed_official | 573:ad23fe03a082 | 398 | * @param pData : pointer to read data |
mbed_official | 573:ad23fe03a082 | 399 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 400 | */ |
mbed_official | 573:ad23fe03a082 | 401 | HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData) |
mbed_official | 573:ad23fe03a082 | 402 | { |
mbed_official | 573:ad23fe03a082 | 403 | uint32_t deviceaddress = 0; |
mbed_official | 573:ad23fe03a082 | 404 | |
mbed_official | 573:ad23fe03a082 | 405 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 406 | __HAL_LOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 407 | |
mbed_official | 573:ad23fe03a082 | 408 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 409 | if(hnor->State == HAL_NOR_STATE_BUSY) |
mbed_official | 573:ad23fe03a082 | 410 | { |
mbed_official | 573:ad23fe03a082 | 411 | return HAL_BUSY; |
mbed_official | 573:ad23fe03a082 | 412 | } |
mbed_official | 573:ad23fe03a082 | 413 | |
mbed_official | 573:ad23fe03a082 | 414 | /* Select the NOR device address */ |
mbed_official | 573:ad23fe03a082 | 415 | if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) |
mbed_official | 573:ad23fe03a082 | 416 | { |
mbed_official | 573:ad23fe03a082 | 417 | deviceaddress = NOR_MEMORY_ADRESS1; |
mbed_official | 573:ad23fe03a082 | 418 | } |
mbed_official | 573:ad23fe03a082 | 419 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) |
mbed_official | 573:ad23fe03a082 | 420 | { |
mbed_official | 573:ad23fe03a082 | 421 | deviceaddress = NOR_MEMORY_ADRESS2; |
mbed_official | 573:ad23fe03a082 | 422 | } |
mbed_official | 573:ad23fe03a082 | 423 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) |
mbed_official | 573:ad23fe03a082 | 424 | { |
mbed_official | 573:ad23fe03a082 | 425 | deviceaddress = NOR_MEMORY_ADRESS3; |
mbed_official | 573:ad23fe03a082 | 426 | } |
mbed_official | 573:ad23fe03a082 | 427 | else /* FMC_NORSRAM_BANK4 */ |
mbed_official | 573:ad23fe03a082 | 428 | { |
mbed_official | 573:ad23fe03a082 | 429 | deviceaddress = NOR_MEMORY_ADRESS4; |
mbed_official | 573:ad23fe03a082 | 430 | } |
mbed_official | 573:ad23fe03a082 | 431 | |
mbed_official | 573:ad23fe03a082 | 432 | /* Update the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 433 | hnor->State = HAL_NOR_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 434 | |
mbed_official | 573:ad23fe03a082 | 435 | /* Send read data command */ |
mbed_official | 573:ad23fe03a082 | 436 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); |
mbed_official | 573:ad23fe03a082 | 437 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND); |
mbed_official | 573:ad23fe03a082 | 438 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET); |
mbed_official | 573:ad23fe03a082 | 439 | |
mbed_official | 573:ad23fe03a082 | 440 | /* Read the data */ |
mbed_official | 573:ad23fe03a082 | 441 | *pData = *(__IO uint32_t *)(uint32_t)pAddress; |
mbed_official | 573:ad23fe03a082 | 442 | |
mbed_official | 573:ad23fe03a082 | 443 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 444 | hnor->State = HAL_NOR_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 445 | |
mbed_official | 573:ad23fe03a082 | 446 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 447 | __HAL_UNLOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 448 | |
mbed_official | 573:ad23fe03a082 | 449 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 450 | } |
mbed_official | 573:ad23fe03a082 | 451 | |
mbed_official | 573:ad23fe03a082 | 452 | /** |
mbed_official | 573:ad23fe03a082 | 453 | * @brief Program data to NOR memory |
mbed_official | 573:ad23fe03a082 | 454 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 455 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 456 | * @param pAddress: Device address |
mbed_official | 573:ad23fe03a082 | 457 | * @param pData : pointer to the data to write |
mbed_official | 573:ad23fe03a082 | 458 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 459 | */ |
mbed_official | 573:ad23fe03a082 | 460 | HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData) |
mbed_official | 573:ad23fe03a082 | 461 | { |
mbed_official | 573:ad23fe03a082 | 462 | uint32_t deviceaddress = 0; |
mbed_official | 573:ad23fe03a082 | 463 | |
mbed_official | 573:ad23fe03a082 | 464 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 465 | __HAL_LOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 466 | |
mbed_official | 573:ad23fe03a082 | 467 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 468 | if(hnor->State == HAL_NOR_STATE_BUSY) |
mbed_official | 573:ad23fe03a082 | 469 | { |
mbed_official | 573:ad23fe03a082 | 470 | return HAL_BUSY; |
mbed_official | 573:ad23fe03a082 | 471 | } |
mbed_official | 573:ad23fe03a082 | 472 | |
mbed_official | 573:ad23fe03a082 | 473 | /* Select the NOR device address */ |
mbed_official | 573:ad23fe03a082 | 474 | if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) |
mbed_official | 573:ad23fe03a082 | 475 | { |
mbed_official | 573:ad23fe03a082 | 476 | deviceaddress = NOR_MEMORY_ADRESS1; |
mbed_official | 573:ad23fe03a082 | 477 | } |
mbed_official | 573:ad23fe03a082 | 478 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) |
mbed_official | 573:ad23fe03a082 | 479 | { |
mbed_official | 573:ad23fe03a082 | 480 | deviceaddress = NOR_MEMORY_ADRESS2; |
mbed_official | 573:ad23fe03a082 | 481 | } |
mbed_official | 573:ad23fe03a082 | 482 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) |
mbed_official | 573:ad23fe03a082 | 483 | { |
mbed_official | 573:ad23fe03a082 | 484 | deviceaddress = NOR_MEMORY_ADRESS3; |
mbed_official | 573:ad23fe03a082 | 485 | } |
mbed_official | 573:ad23fe03a082 | 486 | else /* FMC_NORSRAM_BANK4 */ |
mbed_official | 573:ad23fe03a082 | 487 | { |
mbed_official | 573:ad23fe03a082 | 488 | deviceaddress = NOR_MEMORY_ADRESS4; |
mbed_official | 573:ad23fe03a082 | 489 | } |
mbed_official | 573:ad23fe03a082 | 490 | |
mbed_official | 573:ad23fe03a082 | 491 | /* Update the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 492 | hnor->State = HAL_NOR_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 493 | |
mbed_official | 573:ad23fe03a082 | 494 | /* Send program data command */ |
mbed_official | 573:ad23fe03a082 | 495 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); |
mbed_official | 573:ad23fe03a082 | 496 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND); |
mbed_official | 573:ad23fe03a082 | 497 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_PROGRAM); |
mbed_official | 573:ad23fe03a082 | 498 | |
mbed_official | 573:ad23fe03a082 | 499 | /* Write the data */ |
mbed_official | 573:ad23fe03a082 | 500 | NOR_WRITE(pAddress, *pData); |
mbed_official | 573:ad23fe03a082 | 501 | |
mbed_official | 573:ad23fe03a082 | 502 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 503 | hnor->State = HAL_NOR_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 504 | |
mbed_official | 573:ad23fe03a082 | 505 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 506 | __HAL_UNLOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 507 | |
mbed_official | 573:ad23fe03a082 | 508 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 509 | } |
mbed_official | 573:ad23fe03a082 | 510 | |
mbed_official | 573:ad23fe03a082 | 511 | /** |
mbed_official | 573:ad23fe03a082 | 512 | * @brief Reads a half-word buffer from the NOR memory. |
mbed_official | 573:ad23fe03a082 | 513 | * @param hnor: pointer to the NOR handle |
mbed_official | 573:ad23fe03a082 | 514 | * @param uwAddress: NOR memory internal address to read from. |
mbed_official | 573:ad23fe03a082 | 515 | * @param pData: pointer to the buffer that receives the data read from the |
mbed_official | 573:ad23fe03a082 | 516 | * NOR memory. |
mbed_official | 573:ad23fe03a082 | 517 | * @param uwBufferSize : number of Half word to read. |
mbed_official | 573:ad23fe03a082 | 518 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 519 | */ |
mbed_official | 573:ad23fe03a082 | 520 | HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize) |
mbed_official | 573:ad23fe03a082 | 521 | { |
mbed_official | 573:ad23fe03a082 | 522 | uint32_t deviceaddress = 0; |
mbed_official | 573:ad23fe03a082 | 523 | |
mbed_official | 573:ad23fe03a082 | 524 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 525 | __HAL_LOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 526 | |
mbed_official | 573:ad23fe03a082 | 527 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 528 | if(hnor->State == HAL_NOR_STATE_BUSY) |
mbed_official | 573:ad23fe03a082 | 529 | { |
mbed_official | 573:ad23fe03a082 | 530 | return HAL_BUSY; |
mbed_official | 573:ad23fe03a082 | 531 | } |
mbed_official | 573:ad23fe03a082 | 532 | |
mbed_official | 573:ad23fe03a082 | 533 | /* Select the NOR device address */ |
mbed_official | 573:ad23fe03a082 | 534 | if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) |
mbed_official | 573:ad23fe03a082 | 535 | { |
mbed_official | 573:ad23fe03a082 | 536 | deviceaddress = NOR_MEMORY_ADRESS1; |
mbed_official | 573:ad23fe03a082 | 537 | } |
mbed_official | 573:ad23fe03a082 | 538 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) |
mbed_official | 573:ad23fe03a082 | 539 | { |
mbed_official | 573:ad23fe03a082 | 540 | deviceaddress = NOR_MEMORY_ADRESS2; |
mbed_official | 573:ad23fe03a082 | 541 | } |
mbed_official | 573:ad23fe03a082 | 542 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) |
mbed_official | 573:ad23fe03a082 | 543 | { |
mbed_official | 573:ad23fe03a082 | 544 | deviceaddress = NOR_MEMORY_ADRESS3; |
mbed_official | 573:ad23fe03a082 | 545 | } |
mbed_official | 573:ad23fe03a082 | 546 | else /* FMC_NORSRAM_BANK4 */ |
mbed_official | 573:ad23fe03a082 | 547 | { |
mbed_official | 573:ad23fe03a082 | 548 | deviceaddress = NOR_MEMORY_ADRESS4; |
mbed_official | 573:ad23fe03a082 | 549 | } |
mbed_official | 573:ad23fe03a082 | 550 | |
mbed_official | 573:ad23fe03a082 | 551 | /* Update the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 552 | hnor->State = HAL_NOR_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 553 | |
mbed_official | 573:ad23fe03a082 | 554 | /* Send read data command */ |
mbed_official | 573:ad23fe03a082 | 555 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); |
mbed_official | 573:ad23fe03a082 | 556 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND); |
mbed_official | 573:ad23fe03a082 | 557 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET); |
mbed_official | 573:ad23fe03a082 | 558 | |
mbed_official | 573:ad23fe03a082 | 559 | /* Read buffer */ |
mbed_official | 573:ad23fe03a082 | 560 | while( uwBufferSize > 0) |
mbed_official | 573:ad23fe03a082 | 561 | { |
mbed_official | 573:ad23fe03a082 | 562 | *pData++ = *(__IO uint16_t *)uwAddress; |
mbed_official | 573:ad23fe03a082 | 563 | uwAddress += 2; |
mbed_official | 573:ad23fe03a082 | 564 | uwBufferSize--; |
mbed_official | 573:ad23fe03a082 | 565 | } |
mbed_official | 573:ad23fe03a082 | 566 | |
mbed_official | 573:ad23fe03a082 | 567 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 568 | hnor->State = HAL_NOR_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 569 | |
mbed_official | 573:ad23fe03a082 | 570 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 571 | __HAL_UNLOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 572 | |
mbed_official | 573:ad23fe03a082 | 573 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 574 | } |
mbed_official | 573:ad23fe03a082 | 575 | |
mbed_official | 573:ad23fe03a082 | 576 | /** |
mbed_official | 573:ad23fe03a082 | 577 | * @brief Writes a half-word buffer to the NOR memory. This function must be used |
mbed_official | 573:ad23fe03a082 | 578 | only with S29GL128P NOR memory. |
mbed_official | 573:ad23fe03a082 | 579 | * @param hnor: pointer to the NOR handle |
mbed_official | 573:ad23fe03a082 | 580 | * @param uwAddress: NOR memory internal start write address |
mbed_official | 573:ad23fe03a082 | 581 | * @param pData: pointer to source data buffer. |
mbed_official | 573:ad23fe03a082 | 582 | * @param uwBufferSize: Size of the buffer to write |
mbed_official | 573:ad23fe03a082 | 583 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 584 | */ |
mbed_official | 573:ad23fe03a082 | 585 | HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize) |
mbed_official | 573:ad23fe03a082 | 586 | { |
mbed_official | 573:ad23fe03a082 | 587 | uint16_t * p_currentaddress = (uint16_t *)NULL; |
mbed_official | 573:ad23fe03a082 | 588 | uint16_t * p_endaddress = (uint16_t *)NULL; |
mbed_official | 573:ad23fe03a082 | 589 | uint32_t lastloadedaddress = 0, deviceaddress = 0; |
mbed_official | 573:ad23fe03a082 | 590 | |
mbed_official | 573:ad23fe03a082 | 591 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 592 | __HAL_LOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 593 | |
mbed_official | 573:ad23fe03a082 | 594 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 595 | if(hnor->State == HAL_NOR_STATE_BUSY) |
mbed_official | 573:ad23fe03a082 | 596 | { |
mbed_official | 573:ad23fe03a082 | 597 | return HAL_BUSY; |
mbed_official | 573:ad23fe03a082 | 598 | } |
mbed_official | 573:ad23fe03a082 | 599 | |
mbed_official | 573:ad23fe03a082 | 600 | /* Select the NOR device address */ |
mbed_official | 573:ad23fe03a082 | 601 | if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) |
mbed_official | 573:ad23fe03a082 | 602 | { |
mbed_official | 573:ad23fe03a082 | 603 | deviceaddress = NOR_MEMORY_ADRESS1; |
mbed_official | 573:ad23fe03a082 | 604 | } |
mbed_official | 573:ad23fe03a082 | 605 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) |
mbed_official | 573:ad23fe03a082 | 606 | { |
mbed_official | 573:ad23fe03a082 | 607 | deviceaddress = NOR_MEMORY_ADRESS2; |
mbed_official | 573:ad23fe03a082 | 608 | } |
mbed_official | 573:ad23fe03a082 | 609 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) |
mbed_official | 573:ad23fe03a082 | 610 | { |
mbed_official | 573:ad23fe03a082 | 611 | deviceaddress = NOR_MEMORY_ADRESS3; |
mbed_official | 573:ad23fe03a082 | 612 | } |
mbed_official | 573:ad23fe03a082 | 613 | else /* FMC_NORSRAM_BANK4 */ |
mbed_official | 573:ad23fe03a082 | 614 | { |
mbed_official | 573:ad23fe03a082 | 615 | deviceaddress = NOR_MEMORY_ADRESS4; |
mbed_official | 573:ad23fe03a082 | 616 | } |
mbed_official | 573:ad23fe03a082 | 617 | |
mbed_official | 573:ad23fe03a082 | 618 | /* Update the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 619 | hnor->State = HAL_NOR_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 620 | |
mbed_official | 573:ad23fe03a082 | 621 | /* Initialize variables */ |
mbed_official | 573:ad23fe03a082 | 622 | p_currentaddress = (uint16_t*)((uint32_t)(uwAddress)); |
mbed_official | 573:ad23fe03a082 | 623 | p_endaddress = p_currentaddress + (uwBufferSize-1); |
mbed_official | 573:ad23fe03a082 | 624 | lastloadedaddress = (uint32_t)(uwAddress); |
mbed_official | 573:ad23fe03a082 | 625 | |
mbed_official | 573:ad23fe03a082 | 626 | /* Issue unlock command sequence */ |
mbed_official | 573:ad23fe03a082 | 627 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); |
mbed_official | 573:ad23fe03a082 | 628 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND); |
mbed_official | 573:ad23fe03a082 | 629 | |
mbed_official | 573:ad23fe03a082 | 630 | /* Write Buffer Load Command */ |
mbed_official | 573:ad23fe03a082 | 631 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, uwAddress), NOR_CMD_DATA_BUFFER_AND_PROG); |
mbed_official | 573:ad23fe03a082 | 632 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, uwAddress), (uwBufferSize - 1)); |
mbed_official | 573:ad23fe03a082 | 633 | |
mbed_official | 573:ad23fe03a082 | 634 | /* Load Data into NOR Buffer */ |
mbed_official | 573:ad23fe03a082 | 635 | while(p_currentaddress <= p_endaddress) |
mbed_official | 573:ad23fe03a082 | 636 | { |
mbed_official | 573:ad23fe03a082 | 637 | /* Store last loaded address & data value (for polling) */ |
mbed_official | 573:ad23fe03a082 | 638 | lastloadedaddress = (uint32_t)p_currentaddress; |
mbed_official | 573:ad23fe03a082 | 639 | |
mbed_official | 573:ad23fe03a082 | 640 | NOR_WRITE(p_currentaddress, *pData++); |
mbed_official | 573:ad23fe03a082 | 641 | |
mbed_official | 573:ad23fe03a082 | 642 | p_currentaddress ++; |
mbed_official | 573:ad23fe03a082 | 643 | } |
mbed_official | 573:ad23fe03a082 | 644 | |
mbed_official | 573:ad23fe03a082 | 645 | NOR_WRITE((uint32_t)(lastloadedaddress), NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM); |
mbed_official | 573:ad23fe03a082 | 646 | |
mbed_official | 573:ad23fe03a082 | 647 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 648 | hnor->State = HAL_NOR_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 649 | |
mbed_official | 573:ad23fe03a082 | 650 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 651 | __HAL_UNLOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 652 | |
mbed_official | 573:ad23fe03a082 | 653 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 654 | |
mbed_official | 573:ad23fe03a082 | 655 | } |
mbed_official | 573:ad23fe03a082 | 656 | |
mbed_official | 573:ad23fe03a082 | 657 | /** |
mbed_official | 573:ad23fe03a082 | 658 | * @brief Erase the specified block of the NOR memory |
mbed_official | 573:ad23fe03a082 | 659 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 660 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 661 | * @param BlockAddress : Block to erase address |
mbed_official | 573:ad23fe03a082 | 662 | * @param Address: Device address |
mbed_official | 573:ad23fe03a082 | 663 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 664 | */ |
mbed_official | 573:ad23fe03a082 | 665 | HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address) |
mbed_official | 573:ad23fe03a082 | 666 | { |
mbed_official | 573:ad23fe03a082 | 667 | uint32_t deviceaddress = 0; |
mbed_official | 573:ad23fe03a082 | 668 | |
mbed_official | 573:ad23fe03a082 | 669 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 670 | __HAL_LOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 671 | |
mbed_official | 573:ad23fe03a082 | 672 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 673 | if(hnor->State == HAL_NOR_STATE_BUSY) |
mbed_official | 573:ad23fe03a082 | 674 | { |
mbed_official | 573:ad23fe03a082 | 675 | return HAL_BUSY; |
mbed_official | 573:ad23fe03a082 | 676 | } |
mbed_official | 573:ad23fe03a082 | 677 | |
mbed_official | 573:ad23fe03a082 | 678 | /* Select the NOR device address */ |
mbed_official | 573:ad23fe03a082 | 679 | if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) |
mbed_official | 573:ad23fe03a082 | 680 | { |
mbed_official | 573:ad23fe03a082 | 681 | deviceaddress = NOR_MEMORY_ADRESS1; |
mbed_official | 573:ad23fe03a082 | 682 | } |
mbed_official | 573:ad23fe03a082 | 683 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) |
mbed_official | 573:ad23fe03a082 | 684 | { |
mbed_official | 573:ad23fe03a082 | 685 | deviceaddress = NOR_MEMORY_ADRESS2; |
mbed_official | 573:ad23fe03a082 | 686 | } |
mbed_official | 573:ad23fe03a082 | 687 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) |
mbed_official | 573:ad23fe03a082 | 688 | { |
mbed_official | 573:ad23fe03a082 | 689 | deviceaddress = NOR_MEMORY_ADRESS3; |
mbed_official | 573:ad23fe03a082 | 690 | } |
mbed_official | 573:ad23fe03a082 | 691 | else /* FMC_NORSRAM_BANK4 */ |
mbed_official | 573:ad23fe03a082 | 692 | { |
mbed_official | 573:ad23fe03a082 | 693 | deviceaddress = NOR_MEMORY_ADRESS4; |
mbed_official | 573:ad23fe03a082 | 694 | } |
mbed_official | 573:ad23fe03a082 | 695 | |
mbed_official | 573:ad23fe03a082 | 696 | /* Update the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 697 | hnor->State = HAL_NOR_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 698 | |
mbed_official | 573:ad23fe03a082 | 699 | /* Send block erase command sequence */ |
mbed_official | 573:ad23fe03a082 | 700 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); |
mbed_official | 573:ad23fe03a082 | 701 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND); |
mbed_official | 573:ad23fe03a082 | 702 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD); |
mbed_official | 573:ad23fe03a082 | 703 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FOURTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH); |
mbed_official | 573:ad23fe03a082 | 704 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIFTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH); |
mbed_official | 573:ad23fe03a082 | 705 | NOR_WRITE((uint32_t)(BlockAddress + Address), NOR_CMD_DATA_BLOCK_ERASE); |
mbed_official | 573:ad23fe03a082 | 706 | |
mbed_official | 573:ad23fe03a082 | 707 | /* Check the NOR memory status and update the controller state */ |
mbed_official | 573:ad23fe03a082 | 708 | hnor->State = HAL_NOR_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 709 | |
mbed_official | 573:ad23fe03a082 | 710 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 711 | __HAL_UNLOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 712 | |
mbed_official | 573:ad23fe03a082 | 713 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 714 | |
mbed_official | 573:ad23fe03a082 | 715 | } |
mbed_official | 573:ad23fe03a082 | 716 | |
mbed_official | 573:ad23fe03a082 | 717 | /** |
mbed_official | 573:ad23fe03a082 | 718 | * @brief Erase the entire NOR chip. |
mbed_official | 573:ad23fe03a082 | 719 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 720 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 721 | * @param Address : Device address |
mbed_official | 573:ad23fe03a082 | 722 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 723 | */ |
mbed_official | 573:ad23fe03a082 | 724 | HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address) |
mbed_official | 573:ad23fe03a082 | 725 | { |
mbed_official | 573:ad23fe03a082 | 726 | uint32_t deviceaddress = 0; |
mbed_official | 573:ad23fe03a082 | 727 | |
mbed_official | 573:ad23fe03a082 | 728 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 729 | __HAL_LOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 730 | |
mbed_official | 573:ad23fe03a082 | 731 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 732 | if(hnor->State == HAL_NOR_STATE_BUSY) |
mbed_official | 573:ad23fe03a082 | 733 | { |
mbed_official | 573:ad23fe03a082 | 734 | return HAL_BUSY; |
mbed_official | 573:ad23fe03a082 | 735 | } |
mbed_official | 573:ad23fe03a082 | 736 | |
mbed_official | 573:ad23fe03a082 | 737 | /* Select the NOR device address */ |
mbed_official | 573:ad23fe03a082 | 738 | if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) |
mbed_official | 573:ad23fe03a082 | 739 | { |
mbed_official | 573:ad23fe03a082 | 740 | deviceaddress = NOR_MEMORY_ADRESS1; |
mbed_official | 573:ad23fe03a082 | 741 | } |
mbed_official | 573:ad23fe03a082 | 742 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) |
mbed_official | 573:ad23fe03a082 | 743 | { |
mbed_official | 573:ad23fe03a082 | 744 | deviceaddress = NOR_MEMORY_ADRESS2; |
mbed_official | 573:ad23fe03a082 | 745 | } |
mbed_official | 573:ad23fe03a082 | 746 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) |
mbed_official | 573:ad23fe03a082 | 747 | { |
mbed_official | 573:ad23fe03a082 | 748 | deviceaddress = NOR_MEMORY_ADRESS3; |
mbed_official | 573:ad23fe03a082 | 749 | } |
mbed_official | 573:ad23fe03a082 | 750 | else /* FMC_NORSRAM_BANK4 */ |
mbed_official | 573:ad23fe03a082 | 751 | { |
mbed_official | 573:ad23fe03a082 | 752 | deviceaddress = NOR_MEMORY_ADRESS4; |
mbed_official | 573:ad23fe03a082 | 753 | } |
mbed_official | 573:ad23fe03a082 | 754 | |
mbed_official | 573:ad23fe03a082 | 755 | /* Update the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 756 | hnor->State = HAL_NOR_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 757 | |
mbed_official | 573:ad23fe03a082 | 758 | /* Send NOR chip erase command sequence */ |
mbed_official | 573:ad23fe03a082 | 759 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); |
mbed_official | 573:ad23fe03a082 | 760 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND); |
mbed_official | 573:ad23fe03a082 | 761 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD); |
mbed_official | 573:ad23fe03a082 | 762 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FOURTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH); |
mbed_official | 573:ad23fe03a082 | 763 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIFTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH); |
mbed_official | 573:ad23fe03a082 | 764 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_SIXTH), NOR_CMD_DATA_CHIP_ERASE); |
mbed_official | 573:ad23fe03a082 | 765 | |
mbed_official | 573:ad23fe03a082 | 766 | /* Check the NOR memory status and update the controller state */ |
mbed_official | 573:ad23fe03a082 | 767 | hnor->State = HAL_NOR_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 768 | |
mbed_official | 573:ad23fe03a082 | 769 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 770 | __HAL_UNLOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 771 | |
mbed_official | 573:ad23fe03a082 | 772 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 773 | } |
mbed_official | 573:ad23fe03a082 | 774 | |
mbed_official | 573:ad23fe03a082 | 775 | /** |
mbed_official | 573:ad23fe03a082 | 776 | * @brief Read NOR flash CFI IDs |
mbed_official | 573:ad23fe03a082 | 777 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 778 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 779 | * @param pNOR_CFI : pointer to NOR CFI IDs structure |
mbed_official | 573:ad23fe03a082 | 780 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 781 | */ |
mbed_official | 573:ad23fe03a082 | 782 | HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI) |
mbed_official | 573:ad23fe03a082 | 783 | { |
mbed_official | 573:ad23fe03a082 | 784 | uint32_t deviceaddress = 0; |
mbed_official | 573:ad23fe03a082 | 785 | |
mbed_official | 573:ad23fe03a082 | 786 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 787 | __HAL_LOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 788 | |
mbed_official | 573:ad23fe03a082 | 789 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 790 | if(hnor->State == HAL_NOR_STATE_BUSY) |
mbed_official | 573:ad23fe03a082 | 791 | { |
mbed_official | 573:ad23fe03a082 | 792 | return HAL_BUSY; |
mbed_official | 573:ad23fe03a082 | 793 | } |
mbed_official | 573:ad23fe03a082 | 794 | |
mbed_official | 573:ad23fe03a082 | 795 | /* Select the NOR device address */ |
mbed_official | 573:ad23fe03a082 | 796 | if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) |
mbed_official | 573:ad23fe03a082 | 797 | { |
mbed_official | 573:ad23fe03a082 | 798 | deviceaddress = NOR_MEMORY_ADRESS1; |
mbed_official | 573:ad23fe03a082 | 799 | } |
mbed_official | 573:ad23fe03a082 | 800 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) |
mbed_official | 573:ad23fe03a082 | 801 | { |
mbed_official | 573:ad23fe03a082 | 802 | deviceaddress = NOR_MEMORY_ADRESS2; |
mbed_official | 573:ad23fe03a082 | 803 | } |
mbed_official | 573:ad23fe03a082 | 804 | else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) |
mbed_official | 573:ad23fe03a082 | 805 | { |
mbed_official | 573:ad23fe03a082 | 806 | deviceaddress = NOR_MEMORY_ADRESS3; |
mbed_official | 573:ad23fe03a082 | 807 | } |
mbed_official | 573:ad23fe03a082 | 808 | else /* FMC_NORSRAM_BANK4 */ |
mbed_official | 573:ad23fe03a082 | 809 | { |
mbed_official | 573:ad23fe03a082 | 810 | deviceaddress = NOR_MEMORY_ADRESS4; |
mbed_official | 573:ad23fe03a082 | 811 | } |
mbed_official | 573:ad23fe03a082 | 812 | |
mbed_official | 573:ad23fe03a082 | 813 | /* Update the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 814 | hnor->State = HAL_NOR_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 815 | |
mbed_official | 573:ad23fe03a082 | 816 | /* Send read CFI query command */ |
mbed_official | 573:ad23fe03a082 | 817 | NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI); |
mbed_official | 573:ad23fe03a082 | 818 | |
mbed_official | 573:ad23fe03a082 | 819 | /* read the NOR CFI information */ |
mbed_official | 573:ad23fe03a082 | 820 | pNOR_CFI->CFI_1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, CFI1_ADDRESS); |
mbed_official | 573:ad23fe03a082 | 821 | pNOR_CFI->CFI_2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, CFI2_ADDRESS); |
mbed_official | 573:ad23fe03a082 | 822 | pNOR_CFI->CFI_3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, CFI3_ADDRESS); |
mbed_official | 573:ad23fe03a082 | 823 | pNOR_CFI->CFI_4 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, NOR_MEMORY_8B, CFI4_ADDRESS); |
mbed_official | 573:ad23fe03a082 | 824 | |
mbed_official | 573:ad23fe03a082 | 825 | /* Check the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 826 | hnor->State = HAL_NOR_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 827 | |
mbed_official | 573:ad23fe03a082 | 828 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 829 | __HAL_UNLOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 830 | |
mbed_official | 573:ad23fe03a082 | 831 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 832 | } |
mbed_official | 573:ad23fe03a082 | 833 | |
mbed_official | 573:ad23fe03a082 | 834 | /** |
mbed_official | 573:ad23fe03a082 | 835 | * @} |
mbed_official | 573:ad23fe03a082 | 836 | */ |
mbed_official | 573:ad23fe03a082 | 837 | |
mbed_official | 573:ad23fe03a082 | 838 | /** @defgroup NOR_Exported_Functions_Group3 NOR Control functions |
mbed_official | 573:ad23fe03a082 | 839 | * @brief management functions |
mbed_official | 573:ad23fe03a082 | 840 | * |
mbed_official | 573:ad23fe03a082 | 841 | @verbatim |
mbed_official | 573:ad23fe03a082 | 842 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 843 | ##### NOR Control functions ##### |
mbed_official | 573:ad23fe03a082 | 844 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 845 | [..] |
mbed_official | 573:ad23fe03a082 | 846 | This subsection provides a set of functions allowing to control dynamically |
mbed_official | 573:ad23fe03a082 | 847 | the NOR interface. |
mbed_official | 573:ad23fe03a082 | 848 | |
mbed_official | 573:ad23fe03a082 | 849 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 850 | * @{ |
mbed_official | 573:ad23fe03a082 | 851 | */ |
mbed_official | 573:ad23fe03a082 | 852 | |
mbed_official | 573:ad23fe03a082 | 853 | /** |
mbed_official | 573:ad23fe03a082 | 854 | * @brief Enables dynamically NOR write operation. |
mbed_official | 573:ad23fe03a082 | 855 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 856 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 857 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 858 | */ |
mbed_official | 573:ad23fe03a082 | 859 | HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor) |
mbed_official | 573:ad23fe03a082 | 860 | { |
mbed_official | 573:ad23fe03a082 | 861 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 862 | __HAL_LOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 863 | |
mbed_official | 573:ad23fe03a082 | 864 | /* Enable write operation */ |
mbed_official | 573:ad23fe03a082 | 865 | FMC_NORSRAM_WriteOperation_Enable(hnor->Instance, hnor->Init.NSBank); |
mbed_official | 573:ad23fe03a082 | 866 | |
mbed_official | 573:ad23fe03a082 | 867 | /* Update the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 868 | hnor->State = HAL_NOR_STATE_READY; |
mbed_official | 573:ad23fe03a082 | 869 | |
mbed_official | 573:ad23fe03a082 | 870 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 871 | __HAL_UNLOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 872 | |
mbed_official | 573:ad23fe03a082 | 873 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 874 | } |
mbed_official | 573:ad23fe03a082 | 875 | |
mbed_official | 573:ad23fe03a082 | 876 | /** |
mbed_official | 573:ad23fe03a082 | 877 | * @brief Disables dynamically NOR write operation. |
mbed_official | 573:ad23fe03a082 | 878 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 879 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 880 | * @retval HAL status |
mbed_official | 573:ad23fe03a082 | 881 | */ |
mbed_official | 573:ad23fe03a082 | 882 | HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor) |
mbed_official | 573:ad23fe03a082 | 883 | { |
mbed_official | 573:ad23fe03a082 | 884 | /* Process Locked */ |
mbed_official | 573:ad23fe03a082 | 885 | __HAL_LOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 886 | |
mbed_official | 573:ad23fe03a082 | 887 | /* Update the SRAM controller state */ |
mbed_official | 573:ad23fe03a082 | 888 | hnor->State = HAL_NOR_STATE_BUSY; |
mbed_official | 573:ad23fe03a082 | 889 | |
mbed_official | 573:ad23fe03a082 | 890 | /* Disable write operation */ |
mbed_official | 573:ad23fe03a082 | 891 | FMC_NORSRAM_WriteOperation_Disable(hnor->Instance, hnor->Init.NSBank); |
mbed_official | 573:ad23fe03a082 | 892 | |
mbed_official | 573:ad23fe03a082 | 893 | /* Update the NOR controller state */ |
mbed_official | 573:ad23fe03a082 | 894 | hnor->State = HAL_NOR_STATE_PROTECTED; |
mbed_official | 573:ad23fe03a082 | 895 | |
mbed_official | 573:ad23fe03a082 | 896 | /* Process unlocked */ |
mbed_official | 573:ad23fe03a082 | 897 | __HAL_UNLOCK(hnor); |
mbed_official | 573:ad23fe03a082 | 898 | |
mbed_official | 573:ad23fe03a082 | 899 | return HAL_OK; |
mbed_official | 573:ad23fe03a082 | 900 | } |
mbed_official | 573:ad23fe03a082 | 901 | |
mbed_official | 573:ad23fe03a082 | 902 | /** |
mbed_official | 573:ad23fe03a082 | 903 | * @} |
mbed_official | 573:ad23fe03a082 | 904 | */ |
mbed_official | 573:ad23fe03a082 | 905 | |
mbed_official | 573:ad23fe03a082 | 906 | /** @defgroup NOR_Exported_Functions_Group4 NOR State functions |
mbed_official | 573:ad23fe03a082 | 907 | * @brief Peripheral State functions |
mbed_official | 573:ad23fe03a082 | 908 | * |
mbed_official | 573:ad23fe03a082 | 909 | @verbatim |
mbed_official | 573:ad23fe03a082 | 910 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 911 | ##### NOR State functions ##### |
mbed_official | 573:ad23fe03a082 | 912 | ============================================================================== |
mbed_official | 573:ad23fe03a082 | 913 | [..] |
mbed_official | 573:ad23fe03a082 | 914 | This subsection permits to get in run-time the status of the NOR controller |
mbed_official | 573:ad23fe03a082 | 915 | and the data flow. |
mbed_official | 573:ad23fe03a082 | 916 | |
mbed_official | 573:ad23fe03a082 | 917 | @endverbatim |
mbed_official | 573:ad23fe03a082 | 918 | * @{ |
mbed_official | 573:ad23fe03a082 | 919 | */ |
mbed_official | 573:ad23fe03a082 | 920 | |
mbed_official | 573:ad23fe03a082 | 921 | /** |
mbed_official | 573:ad23fe03a082 | 922 | * @brief return the NOR controller state |
mbed_official | 573:ad23fe03a082 | 923 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 924 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 925 | * @retval NOR controller state |
mbed_official | 573:ad23fe03a082 | 926 | */ |
mbed_official | 573:ad23fe03a082 | 927 | HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor) |
mbed_official | 573:ad23fe03a082 | 928 | { |
mbed_official | 573:ad23fe03a082 | 929 | return hnor->State; |
mbed_official | 573:ad23fe03a082 | 930 | } |
mbed_official | 573:ad23fe03a082 | 931 | |
mbed_official | 573:ad23fe03a082 | 932 | /** |
mbed_official | 573:ad23fe03a082 | 933 | * @brief Returns the NOR operation status. |
mbed_official | 573:ad23fe03a082 | 934 | * @param hnor: pointer to a NOR_HandleTypeDef structure that contains |
mbed_official | 573:ad23fe03a082 | 935 | * the configuration information for NOR module. |
mbed_official | 573:ad23fe03a082 | 936 | * @param Address: Device address |
mbed_official | 573:ad23fe03a082 | 937 | * @param Timeout: NOR programming Timeout |
mbed_official | 573:ad23fe03a082 | 938 | * @retval NOR_Status: The returned value can be: HAL_NOR_STATUS_SUCCESS, HAL_NOR_STATUS_ERROR |
mbed_official | 573:ad23fe03a082 | 939 | * or HAL_NOR_STATUS_TIMEOUT |
mbed_official | 573:ad23fe03a082 | 940 | */ |
mbed_official | 573:ad23fe03a082 | 941 | HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout) |
mbed_official | 573:ad23fe03a082 | 942 | { |
mbed_official | 573:ad23fe03a082 | 943 | HAL_NOR_StatusTypeDef status = HAL_NOR_STATUS_ONGOING; |
mbed_official | 573:ad23fe03a082 | 944 | uint16_t tmpSR1 = 0, tmpSR2 = 0; |
mbed_official | 573:ad23fe03a082 | 945 | uint32_t tickstart = 0; |
mbed_official | 573:ad23fe03a082 | 946 | |
mbed_official | 573:ad23fe03a082 | 947 | /* Poll on NOR memory Ready/Busy signal ------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 948 | HAL_NOR_MspWait(hnor, Timeout); |
mbed_official | 573:ad23fe03a082 | 949 | |
mbed_official | 573:ad23fe03a082 | 950 | /* Get the NOR memory operation status -------------------------------------*/ |
mbed_official | 573:ad23fe03a082 | 951 | |
mbed_official | 573:ad23fe03a082 | 952 | /* Get tick */ |
mbed_official | 573:ad23fe03a082 | 953 | tickstart = HAL_GetTick(); |
mbed_official | 573:ad23fe03a082 | 954 | while((status != HAL_NOR_STATUS_SUCCESS ) && (status != HAL_NOR_STATUS_TIMEOUT)) |
mbed_official | 573:ad23fe03a082 | 955 | { |
mbed_official | 573:ad23fe03a082 | 956 | /* Check for the Timeout */ |
mbed_official | 573:ad23fe03a082 | 957 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 573:ad23fe03a082 | 958 | { |
mbed_official | 573:ad23fe03a082 | 959 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
mbed_official | 573:ad23fe03a082 | 960 | { |
mbed_official | 573:ad23fe03a082 | 961 | status = HAL_NOR_STATUS_TIMEOUT; |
mbed_official | 573:ad23fe03a082 | 962 | } |
mbed_official | 573:ad23fe03a082 | 963 | } |
mbed_official | 573:ad23fe03a082 | 964 | |
mbed_official | 573:ad23fe03a082 | 965 | /* Read NOR status register (DQ6 and DQ5) */ |
mbed_official | 573:ad23fe03a082 | 966 | tmpSR1 = *(__IO uint16_t *)Address; |
mbed_official | 573:ad23fe03a082 | 967 | tmpSR2 = *(__IO uint16_t *)Address; |
mbed_official | 573:ad23fe03a082 | 968 | |
mbed_official | 573:ad23fe03a082 | 969 | /* If DQ6 did not toggle between the two reads then return HAL_NOR_STATUS_SUCCESS */ |
mbed_official | 573:ad23fe03a082 | 970 | if((tmpSR1 & NOR_MASK_STATUS_DQ6) == (tmpSR2 & NOR_MASK_STATUS_DQ6)) |
mbed_official | 573:ad23fe03a082 | 971 | { |
mbed_official | 573:ad23fe03a082 | 972 | return HAL_NOR_STATUS_SUCCESS ; |
mbed_official | 573:ad23fe03a082 | 973 | } |
mbed_official | 573:ad23fe03a082 | 974 | |
mbed_official | 573:ad23fe03a082 | 975 | if((tmpSR1 & NOR_MASK_STATUS_DQ5) == NOR_MASK_STATUS_DQ5) |
mbed_official | 573:ad23fe03a082 | 976 | { |
mbed_official | 573:ad23fe03a082 | 977 | status = HAL_NOR_STATUS_ONGOING; |
mbed_official | 573:ad23fe03a082 | 978 | } |
mbed_official | 573:ad23fe03a082 | 979 | |
mbed_official | 573:ad23fe03a082 | 980 | tmpSR1 = *(__IO uint16_t *)Address; |
mbed_official | 573:ad23fe03a082 | 981 | tmpSR2 = *(__IO uint16_t *)Address; |
mbed_official | 573:ad23fe03a082 | 982 | |
mbed_official | 573:ad23fe03a082 | 983 | /* If DQ6 did not toggle between the two reads then return HAL_NOR_STATUS_SUCCESS */ |
mbed_official | 573:ad23fe03a082 | 984 | if((tmpSR1 & NOR_MASK_STATUS_DQ6) == (tmpSR2 & NOR_MASK_STATUS_DQ6)) |
mbed_official | 573:ad23fe03a082 | 985 | { |
mbed_official | 573:ad23fe03a082 | 986 | return HAL_NOR_STATUS_SUCCESS; |
mbed_official | 573:ad23fe03a082 | 987 | } |
mbed_official | 573:ad23fe03a082 | 988 | if((tmpSR1 & NOR_MASK_STATUS_DQ5) == NOR_MASK_STATUS_DQ5) |
mbed_official | 573:ad23fe03a082 | 989 | { |
mbed_official | 573:ad23fe03a082 | 990 | return HAL_NOR_STATUS_ERROR; |
mbed_official | 573:ad23fe03a082 | 991 | } |
mbed_official | 573:ad23fe03a082 | 992 | } |
mbed_official | 573:ad23fe03a082 | 993 | |
mbed_official | 573:ad23fe03a082 | 994 | /* Return the operation status */ |
mbed_official | 573:ad23fe03a082 | 995 | return status; |
mbed_official | 573:ad23fe03a082 | 996 | } |
mbed_official | 573:ad23fe03a082 | 997 | |
mbed_official | 573:ad23fe03a082 | 998 | /** |
mbed_official | 573:ad23fe03a082 | 999 | * @} |
mbed_official | 573:ad23fe03a082 | 1000 | */ |
mbed_official | 573:ad23fe03a082 | 1001 | |
mbed_official | 573:ad23fe03a082 | 1002 | /** |
mbed_official | 573:ad23fe03a082 | 1003 | * @} |
mbed_official | 573:ad23fe03a082 | 1004 | */ |
mbed_official | 573:ad23fe03a082 | 1005 | #endif /* HAL_NOR_MODULE_ENABLED */ |
mbed_official | 573:ad23fe03a082 | 1006 | /** |
mbed_official | 573:ad23fe03a082 | 1007 | * @} |
mbed_official | 573:ad23fe03a082 | 1008 | */ |
mbed_official | 573:ad23fe03a082 | 1009 | |
mbed_official | 573:ad23fe03a082 | 1010 | /** |
mbed_official | 573:ad23fe03a082 | 1011 | * @} |
mbed_official | 573:ad23fe03a082 | 1012 | */ |
mbed_official | 573:ad23fe03a082 | 1013 | |
mbed_official | 573:ad23fe03a082 | 1014 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |