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targets/cmsis/TARGET_Maxim/TARGET_MAX32610/rtc_regs.h@637:ed69428d4850, 2015-12-22 (annotated)

Committer:
jaerts
Date:
Tue Dec 22 13:22:16 2015 +0000
Revision:
637:ed69428d4850
Parent:
507:d4fc7603a669 
Add very shady LPC1768 CAN Filter implementation

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 507:d4fc7603a669 1 /*******************************************************************************
mbed_official 507:d4fc7603a669 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
mbed_official 507:d4fc7603a669 3 *
mbed_official 507:d4fc7603a669 4 * Permission is hereby granted, free of charge, to any person obtaining a
mbed_official 507:d4fc7603a669 5 * copy of this software and associated documentation files (the "Software"),
mbed_official 507:d4fc7603a669 6 * to deal in the Software without restriction, including without limitation
mbed_official 507:d4fc7603a669 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
mbed_official 507:d4fc7603a669 8 * and/or sell copies of the Software, and to permit persons to whom the
mbed_official 507:d4fc7603a669 9 * Software is furnished to do so, subject to the following conditions:
mbed_official 507:d4fc7603a669 10 *
mbed_official 507:d4fc7603a669 11 * The above copyright notice and this permission notice shall be included
mbed_official 507:d4fc7603a669 12 * in all copies or substantial portions of the Software.
mbed_official 507:d4fc7603a669 13 *
mbed_official 507:d4fc7603a669 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
mbed_official 507:d4fc7603a669 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
mbed_official 507:d4fc7603a669 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
mbed_official 507:d4fc7603a669 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
mbed_official 507:d4fc7603a669 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
mbed_official 507:d4fc7603a669 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
mbed_official 507:d4fc7603a669 20 * OTHER DEALINGS IN THE SOFTWARE.
mbed_official 507:d4fc7603a669 21 *
mbed_official 507:d4fc7603a669 22 * Except as contained in this notice, the name of Maxim Integrated
mbed_official 507:d4fc7603a669 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
mbed_official 507:d4fc7603a669 24 * Products, Inc. Branding Policy.
mbed_official 507:d4fc7603a669 25 *
mbed_official 507:d4fc7603a669 26 * The mere transfer of this software does not imply any licenses
mbed_official 507:d4fc7603a669 27 * of trade secrets, proprietary technology, copyrights, patents,
mbed_official 507:d4fc7603a669 28 * trademarks, maskwork rights, or any other form of intellectual
mbed_official 507:d4fc7603a669 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
mbed_official 507:d4fc7603a669 30 * ownership rights.
mbed_official 507:d4fc7603a669 31 *******************************************************************************
mbed_official 507:d4fc7603a669 32 */
mbed_official 507:d4fc7603a669 33
mbed_official 507:d4fc7603a669 34 #ifndef _MXC_RTC_REGS_H
mbed_official 507:d4fc7603a669 35 #define _MXC_RTC_REGS_H
mbed_official 507:d4fc7603a669 36
mbed_official 507:d4fc7603a669 37 #ifdef __cplusplus
mbed_official 507:d4fc7603a669 38 extern "C" {
mbed_official 507:d4fc7603a669 39 #endif
mbed_official 507:d4fc7603a669 40
mbed_official 507:d4fc7603a669 41 #include <stdint.h>
mbed_official 507:d4fc7603a669 42
mbed_official 507:d4fc7603a669 43 /**
mbed_official 507:d4fc7603a669 44 * @file rtc_regs.h
mbed_official 507:d4fc7603a669 45 * @addtogroup rtc RTCTMR
mbed_official 507:d4fc7603a669 46 * @{
mbed_official 507:d4fc7603a669 47 */
mbed_official 507:d4fc7603a669 48
mbed_official 507:d4fc7603a669 49 /**
mbed_official 507:d4fc7603a669 50 * @brief Defines clock divider for 4096Hz input clock.
mbed_official 507:d4fc7603a669 51 */
mbed_official 507:d4fc7603a669 52 typedef enum {
mbed_official 507:d4fc7603a669 53 /** (4kHz) divide input clock by 2^0 = 1 */
mbed_official 507:d4fc7603a669 54 MXC_E_RTC_PRESCALE_DIV_2_0 = 0,
mbed_official 507:d4fc7603a669 55 /** (2kHz) divide input clock by 2^1 = 2 */
mbed_official 507:d4fc7603a669 56 MXC_E_RTC_PRESCALE_DIV_2_1,
mbed_official 507:d4fc7603a669 57 /** (1kHz) divide input clock by 2^2 = 4 */
mbed_official 507:d4fc7603a669 58 MXC_E_RTC_PRESCALE_DIV_2_2,
mbed_official 507:d4fc7603a669 59 /** (512Hz) divide input clock by 2^3 = 8 */
mbed_official 507:d4fc7603a669 60 MXC_E_RTC_PRESCALE_DIV_2_3,
mbed_official 507:d4fc7603a669 61 /** (256Hz) divide input clock by 2^4 = 16 */
mbed_official 507:d4fc7603a669 62 MXC_E_RTC_PRESCALE_DIV_2_4,
mbed_official 507:d4fc7603a669 63 /** (128Hz) divide input clock by 2^5 = 32 */
mbed_official 507:d4fc7603a669 64 MXC_E_RTC_PRESCALE_DIV_2_5,
mbed_official 507:d4fc7603a669 65 /** (64Hz) divide input clock by 2^6 = 64 */
mbed_official 507:d4fc7603a669 66 MXC_E_RTC_PRESCALE_DIV_2_6,
mbed_official 507:d4fc7603a669 67 /** (32Hz) divide input clock by 2^7 = 128 */
mbed_official 507:d4fc7603a669 68 MXC_E_RTC_PRESCALE_DIV_2_7,
mbed_official 507:d4fc7603a669 69 /** (16Hz) divide input clock by 2^8 = 256 */
mbed_official 507:d4fc7603a669 70 MXC_E_RTC_PRESCALE_DIV_2_8,
mbed_official 507:d4fc7603a669 71 /** (8Hz) divide input clock by 2^9 = 512 */
mbed_official 507:d4fc7603a669 72 MXC_E_RTC_PRESCALE_DIV_2_9,
mbed_official 507:d4fc7603a669 73 /** (4Hz) divide input clock by 2^10 = 1024 */
mbed_official 507:d4fc7603a669 74 MXC_E_RTC_PRESCALE_DIV_2_10,
mbed_official 507:d4fc7603a669 75 /** (2Hz) divide input clock by 2^11 = 2048 */
mbed_official 507:d4fc7603a669 76 MXC_E_RTC_PRESCALE_DIV_2_11,
mbed_official 507:d4fc7603a669 77 /** (1Hz) divide input clock by 2^12 = 4096 */
mbed_official 507:d4fc7603a669 78 MXC_E_RTC_PRESCALE_DIV_2_12,
mbed_official 507:d4fc7603a669 79 } mxc_rtc_prescale_t;
mbed_official 507:d4fc7603a669 80
mbed_official 507:d4fc7603a669 81 /* Offset Register Description
mbed_official 507:d4fc7603a669 82 ====== ========================================= */
mbed_official 507:d4fc7603a669 83 typedef struct {
mbed_official 507:d4fc7603a669 84 __IO uint32_t ctrl; /* 0x0000 RTC Timer Control */
mbed_official 507:d4fc7603a669 85 __IO uint32_t timer; /* 0x0004 RTC Timer Count Value */
mbed_official 507:d4fc7603a669 86 __IO uint32_t comp[2]; /* 0x0008 RTC Alarm (0..1) Compare Registers */
mbed_official 507:d4fc7603a669 87 __IO uint32_t flags; /* 0x0010 CPU Interrupt and RTC Domain Flags */
mbed_official 507:d4fc7603a669 88 __I uint32_t rsv0014; /* 0x0014 */
mbed_official 507:d4fc7603a669 89 __IO uint32_t inten; /* 0x0018 Interrupt Enable Controls */
mbed_official 507:d4fc7603a669 90 __IO uint32_t prescale; /* 0x001C RTC Timer Prescale Setting */
mbed_official 507:d4fc7603a669 91 __I uint32_t rsv0020; /* 0x0020 */
mbed_official 507:d4fc7603a669 92 __IO uint32_t prescale_mask; /* 0x0024 RTC Timer Prescale Compare Mask */
mbed_official 507:d4fc7603a669 93 __IO uint32_t trim_ctrl; /* 0x0028 RTC Timer Trim Controls */
mbed_official 507:d4fc7603a669 94 __IO uint32_t trim_value; /* 0x002C RTC Timer Trim Adjustment Interval */
mbed_official 507:d4fc7603a669 95 } mxc_rtctmr_regs_t;
mbed_official 507:d4fc7603a669 96
mbed_official 507:d4fc7603a669 97 /*
mbed_official 507:d4fc7603a669 98 Register offsets for module RTCTMR.
mbed_official 507:d4fc7603a669 99 */
mbed_official 507:d4fc7603a669 100 #define MXC_R_RTCTMR_OFFS_CTRL ((uint32_t)0x00000000UL)
mbed_official 507:d4fc7603a669 101 #define MXC_R_RTCTMR_OFFS_TIMER ((uint32_t)0x00000004UL)
mbed_official 507:d4fc7603a669 102 #define MXC_R_RTCTMR_OFFS_COMP_0 ((uint32_t)0x00000008UL)
mbed_official 507:d4fc7603a669 103 #define MXC_R_RTCTMR_OFFS_COMP_1 ((uint32_t)0x0000000CUL)
mbed_official 507:d4fc7603a669 104 #define MXC_R_RTCTMR_OFFS_FLAGS ((uint32_t)0x00000010UL)
mbed_official 507:d4fc7603a669 105 #define MXC_R_RTCTMR_OFFS_INTEN ((uint32_t)0x00000018UL)
mbed_official 507:d4fc7603a669 106 #define MXC_R_RTCTMR_OFFS_PRESCALE ((uint32_t)0x0000001CUL)
mbed_official 507:d4fc7603a669 107 #define MXC_R_RTCTMR_OFFS_PRESCALE_MASK ((uint32_t)0x00000024UL)
mbed_official 507:d4fc7603a669 108 #define MXC_R_RTCTMR_OFFS_TRIM_CTRL ((uint32_t)0x00000028UL)
mbed_official 507:d4fc7603a669 109 #define MXC_R_RTCTMR_OFFS_TRIM_VALUE ((uint32_t)0x0000002CUL)
mbed_official 507:d4fc7603a669 110
mbed_official 507:d4fc7603a669 111 /*
mbed_official 507:d4fc7603a669 112 Field positions and masks for module RTCTMR.
mbed_official 507:d4fc7603a669 113 */
mbed_official 507:d4fc7603a669 114 #define MXC_F_RTC_CTRL_ENABLE_POS 0
mbed_official 507:d4fc7603a669 115 #define MXC_F_RTC_CTRL_ENABLE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_ENABLE_POS))
mbed_official 507:d4fc7603a669 116 #define MXC_F_RTC_CTRL_CLEAR_POS 1
mbed_official 507:d4fc7603a669 117 #define MXC_F_RTC_CTRL_CLEAR ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CLEAR_POS))
mbed_official 507:d4fc7603a669 118 #define MXC_F_RTC_CTRL_PENDING_POS 2
mbed_official 507:d4fc7603a669 119 #define MXC_F_RTC_CTRL_PENDING ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_PENDING_POS))
mbed_official 507:d4fc7603a669 120 #define MXC_F_RTC_CTRL_USE_ASYNC_FLAGS_POS 3
mbed_official 507:d4fc7603a669 121 #define MXC_F_RTC_CTRL_USE_ASYNC_FLAGS ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_USE_ASYNC_FLAGS_POS))
mbed_official 507:d4fc7603a669 122 #define MXC_F_RTC_CTRL_AGGRESSIVE_RST_POS 4
mbed_official 507:d4fc7603a669 123 #define MXC_F_RTC_CTRL_AGGRESSIVE_RST ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_AGGRESSIVE_RST_POS))
mbed_official 507:d4fc7603a669 124 #define MXC_F_RTC_CTRL_EN_ACTIVE_POS 16
mbed_official 507:d4fc7603a669 125 #define MXC_F_RTC_CTRL_EN_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_EN_ACTIVE_POS))
mbed_official 507:d4fc7603a669 126 #define MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE_POS 17
mbed_official 507:d4fc7603a669 127 #define MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE_POS))
mbed_official 507:d4fc7603a669 128 #define MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE_POS 18
mbed_official 507:d4fc7603a669 129 #define MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE_POS))
mbed_official 507:d4fc7603a669 130 #define MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE_POS 19
mbed_official 507:d4fc7603a669 131 #define MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE_POS))
mbed_official 507:d4fc7603a669 132 #define MXC_F_RTC_CTRL_SET_ACTIVE_POS 20
mbed_official 507:d4fc7603a669 133 #define MXC_F_RTC_CTRL_SET_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_SET_ACTIVE_POS))
mbed_official 507:d4fc7603a669 134 #define MXC_F_RTC_CTRL_CLR_ACTIVE_POS 21
mbed_official 507:d4fc7603a669 135 #define MXC_F_RTC_CTRL_CLR_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CLR_ACTIVE_POS))
mbed_official 507:d4fc7603a669 136 #define MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE_POS 22
mbed_official 507:d4fc7603a669 137 #define MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE_POS))
mbed_official 507:d4fc7603a669 138 #define MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE_POS 23
mbed_official 507:d4fc7603a669 139 #define MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE_POS))
mbed_official 507:d4fc7603a669 140 #define MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE_POS 24
mbed_official 507:d4fc7603a669 141 #define MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE_POS))
mbed_official 507:d4fc7603a669 142 #define MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE_POS 25
mbed_official 507:d4fc7603a669 143 #define MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE_POS))
mbed_official 507:d4fc7603a669 144 #define MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE_POS 26
mbed_official 507:d4fc7603a669 145 #define MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE_POS))
mbed_official 507:d4fc7603a669 146
mbed_official 507:d4fc7603a669 147 #define MXC_F_RTC_FLAGS_COMP0_POS 0
mbed_official 507:d4fc7603a669 148 #define MXC_F_RTC_FLAGS_COMP0 ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP0_POS))
mbed_official 507:d4fc7603a669 149 #define MXC_F_RTC_FLAGS_COMP1_POS 1
mbed_official 507:d4fc7603a669 150 #define MXC_F_RTC_FLAGS_COMP1 ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP1_POS))
mbed_official 507:d4fc7603a669 151 #define MXC_F_RTC_FLAGS_PRESCALE_COMP_POS 2
mbed_official 507:d4fc7603a669 152 #define MXC_F_RTC_FLAGS_PRESCALE_COMP ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_PRESCALE_COMP_POS))
mbed_official 507:d4fc7603a669 153 #define MXC_F_RTC_FLAGS_OVERFLOW_POS 3
mbed_official 507:d4fc7603a669 154 #define MXC_F_RTC_FLAGS_OVERFLOW ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_OVERFLOW_POS))
mbed_official 507:d4fc7603a669 155 #define MXC_F_RTC_FLAGS_TRIM_POS 4
mbed_official 507:d4fc7603a669 156 #define MXC_F_RTC_FLAGS_TRIM ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_TRIM_POS))
mbed_official 507:d4fc7603a669 157 #define MXC_F_RTC_FLAGS_COMP0_FLAG_A_POS 8
mbed_official 507:d4fc7603a669 158 #define MXC_F_RTC_FLAGS_COMP0_FLAG_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP0_FLAG_A_POS))
mbed_official 507:d4fc7603a669 159 #define MXC_F_RTC_FLAGS_COMP1_FLAG_A_POS 9
mbed_official 507:d4fc7603a669 160 #define MXC_F_RTC_FLAGS_COMP1_FLAG_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP1_FLAG_A_POS))
mbed_official 507:d4fc7603a669 161 #define MXC_F_RTC_FLAGS_PRESCL_FLAG_A_POS 10
mbed_official 507:d4fc7603a669 162 #define MXC_F_RTC_FLAGS_PRESCL_FLAG_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_PRESCL_FLAG_A_POS))
mbed_official 507:d4fc7603a669 163 #define MXC_F_RTC_FLAGS_OVERFLOW_FLAG_A_POS 11
mbed_official 507:d4fc7603a669 164 #define MXC_F_RTC_FLAGS_OVERFLOW_FLAG_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_OVERFLOW_FLAG_A_POS))
mbed_official 507:d4fc7603a669 165 #define MXC_F_RTC_FLAGS_TRIM_FLAG_A_POS 12
mbed_official 507:d4fc7603a669 166 #define MXC_F_RTC_FLAGS_TRIM_FLAG_A ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_TRIM_FLAG_A_POS))
mbed_official 507:d4fc7603a669 167 #define MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS_POS 31
mbed_official 507:d4fc7603a669 168 #define MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS_POS))
mbed_official 507:d4fc7603a669 169
mbed_official 507:d4fc7603a669 170 #define MXC_F_RTC_INTEN_COMP0_POS 0
mbed_official 507:d4fc7603a669 171 #define MXC_F_RTC_INTEN_COMP0 ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_COMP0_POS))
mbed_official 507:d4fc7603a669 172 #define MXC_F_RTC_INTEN_COMP1_POS 1
mbed_official 507:d4fc7603a669 173 #define MXC_F_RTC_INTEN_COMP1 ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_COMP1_POS))
mbed_official 507:d4fc7603a669 174 #define MXC_F_RTC_INTEN_PRESCALE_COMP_POS 2
mbed_official 507:d4fc7603a669 175 #define MXC_F_RTC_INTEN_PRESCALE_COMP ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_PRESCALE_COMP_POS))
mbed_official 507:d4fc7603a669 176 #define MXC_F_RTC_INTEN_OVERFLOW_POS 3
mbed_official 507:d4fc7603a669 177 #define MXC_F_RTC_INTEN_OVERFLOW ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_OVERFLOW_POS))
mbed_official 507:d4fc7603a669 178 #define MXC_F_RTC_INTEN_TRIM_POS 4
mbed_official 507:d4fc7603a669 179 #define MXC_F_RTC_INTEN_TRIM ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_TRIM_POS))
mbed_official 507:d4fc7603a669 180
mbed_official 507:d4fc7603a669 181 #define MXC_F_RTC_PRESCALE_WIDTH_SELECTION_POS 0
mbed_official 507:d4fc7603a669 182 #define MXC_F_RTC_PRESCALE_WIDTH_SELECTION ((uint32_t)(0x0000000FUL << MXC_F_RTC_PRESCALE_WIDTH_SELECTION_POS))
mbed_official 507:d4fc7603a669 183
mbed_official 507:d4fc7603a669 184 #define MXC_F_RTC_PRESCALE_MASK_COMP_MASK_POS 0
mbed_official 507:d4fc7603a669 185 #define MXC_F_RTC_PRESCALE_MASK_COMP_MASK ((uint32_t)(0x0000000FUL << MXC_F_RTC_PRESCALE_MASK_COMP_MASK_POS))
mbed_official 507:d4fc7603a669 186
mbed_official 507:d4fc7603a669 187 #define MXC_F_RTC_TRIM_CTRL_TRIM_ENABLE_R_POS 0
mbed_official 507:d4fc7603a669 188 #define MXC_F_RTC_TRIM_CTRL_TRIM_ENABLE_R ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_CTRL_TRIM_ENABLE_R_POS))
mbed_official 507:d4fc7603a669 189 #define MXC_F_RTC_TRIM_CTRL_TRIM_FASTER_OVR_R_POS 1
mbed_official 507:d4fc7603a669 190 #define MXC_F_RTC_TRIM_CTRL_TRIM_FASTER_OVR_R ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_CTRL_TRIM_FASTER_OVR_R_POS))
mbed_official 507:d4fc7603a669 191 #define MXC_F_RTC_TRIM_CTRL_TRIM_SLOWER_R_POS 2
mbed_official 507:d4fc7603a669 192 #define MXC_F_RTC_TRIM_CTRL_TRIM_SLOWER_R ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_CTRL_TRIM_SLOWER_R_POS))
mbed_official 507:d4fc7603a669 193
mbed_official 507:d4fc7603a669 194 #define MXC_F_RTC_TRIM_VALUE_TRIM_VALUE_POS 0
mbed_official 507:d4fc7603a669 195 #define MXC_F_RTC_TRIM_VALUE_TRIM_VALUE ((uint32_t)(0x0003FFFFUL << MXC_F_RTC_TRIM_VALUE_TRIM_VALUE_POS))
mbed_official 507:d4fc7603a669 196 #define MXC_F_RTC_TRIM_VALUE_TRIM_CONTROL_POS 18
mbed_official 507:d4fc7603a669 197 #define MXC_F_RTC_TRIM_VALUE_TRIM_CONTROL ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_VALUE_TRIM_CONTROL_POS))
mbed_official 507:d4fc7603a669 198
mbed_official 507:d4fc7603a669 199 #define MXC_F_RTC_NANO_CNTR_NANORING_COUNTER_POS 0
mbed_official 507:d4fc7603a669 200 #define MXC_F_RTC_NANO_CNTR_NANORING_COUNTER ((uint32_t)(0x0000FFFFUL << MXC_F_RTC_NANO_CNTR_NANORING_COUNTER_POS))
mbed_official 507:d4fc7603a669 201
mbed_official 507:d4fc7603a669 202 #define MXC_F_RTC_CLK_CTRL_OSC1_EN_POS 0
mbed_official 507:d4fc7603a669 203 #define MXC_F_RTC_CLK_CTRL_OSC1_EN ((uint32_t)(0x00000001UL << MXC_F_RTC_CLK_CTRL_OSC1_EN_POS))
mbed_official 507:d4fc7603a669 204 #define MXC_F_RTC_CLK_CTRL_OSC2_EN_POS 1
mbed_official 507:d4fc7603a669 205 #define MXC_F_RTC_CLK_CTRL_OSC2_EN ((uint32_t)(0x00000001UL << MXC_F_RTC_CLK_CTRL_OSC2_EN_POS))
mbed_official 507:d4fc7603a669 206 #define MXC_F_RTC_CLK_CTRL_NANO_EN_POS 2
mbed_official 507:d4fc7603a669 207 #define MXC_F_RTC_CLK_CTRL_NANO_EN ((uint32_t)(0x00000001UL << MXC_F_RTC_CLK_CTRL_NANO_EN_POS))
mbed_official 507:d4fc7603a669 208
mbed_official 507:d4fc7603a669 209 #define MXC_F_RTC_DSEN_CTRL_DSEN_DISABLE_POS 0
mbed_official 507:d4fc7603a669 210 #define MXC_F_RTC_DSEN_CTRL_DSEN_DISABLE ((uint32_t)(0x00000001UL << MXC_F_RTC_DSEN_CTRL_DSEN_DISABLE_POS))
mbed_official 507:d4fc7603a669 211
mbed_official 507:d4fc7603a669 212 #define MXC_F_RTC_OSC_CTRL_OSC_BYPASS_POS 0
mbed_official 507:d4fc7603a669 213 #define MXC_F_RTC_OSC_CTRL_OSC_BYPASS ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_BYPASS_POS))
mbed_official 507:d4fc7603a669 214 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_R_POS 1
mbed_official 507:d4fc7603a669 215 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_R ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_DISABLE_R_POS))
mbed_official 507:d4fc7603a669 216 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_SEL_POS 2
mbed_official 507:d4fc7603a669 217 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_SEL ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_DISABLE_SEL_POS))
mbed_official 507:d4fc7603a669 218 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_O_POS 3
mbed_official 507:d4fc7603a669 219 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_O ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_DISABLE_O_POS))
mbed_official 507:d4fc7603a669 220
mbed_official 507:d4fc7603a669 221 /* Offset Register Description
mbed_official 507:d4fc7603a669 222 ====== ===================================================================== */
mbed_official 507:d4fc7603a669 223 typedef struct {
mbed_official 507:d4fc7603a669 224 __IO uint32_t nano_counter; /* 0x0000 Nanoring Counter Read Register */
mbed_official 507:d4fc7603a669 225 __IO uint32_t clk_ctrl; /* 0x0004 RTC Clock Control Settings */
mbed_official 507:d4fc7603a669 226 __IO uint32_t dsen_ctrl; /* 0x0008 Dynamic Tamper Sensor Control */
mbed_official 507:d4fc7603a669 227 __IO uint32_t osc_ctrl; /* 0x000C RTC Oscillator Control */
mbed_official 507:d4fc7603a669 228 } mxc_rtccfg_regs_t;
mbed_official 507:d4fc7603a669 229
mbed_official 507:d4fc7603a669 230 /*
mbed_official 507:d4fc7603a669 231 Register offsets for module RTCCFG.
mbed_official 507:d4fc7603a669 232 */
mbed_official 507:d4fc7603a669 233 #define MXC_R_RTCCFG_OFFS_NANO_COUNTER ((uint32_t)0x00000000UL)
mbed_official 507:d4fc7603a669 234 #define MXC_R_RTCCFG_OFFS_CLK_CTRL ((uint32_t)0x00000004UL)
mbed_official 507:d4fc7603a669 235 #define MXC_R_RTCCFG_OFFS_DSEN_CTRL ((uint32_t)0x00000008UL)
mbed_official 507:d4fc7603a669 236 #define MXC_R_RTCCFG_OFFS_OSC_CTRL ((uint32_t)0x0000000CUL)
mbed_official 507:d4fc7603a669 237
mbed_official 507:d4fc7603a669 238 #ifdef __cplusplus
mbed_official 507:d4fc7603a669 239 }
mbed_official 507:d4fc7603a669 240 #endif
mbed_official 507:d4fc7603a669 241
mbed_official 507:d4fc7603a669 242 /**
mbed_official 507:d4fc7603a669 243 * @}
mbed_official 507:d4fc7603a669 244 */
mbed_official 507:d4fc7603a669 245
mbed_official 507:d4fc7603a669 246 #endif /* _MXC_RTC_REGS_H */