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Dependencies: MAX11300 MAX4822 OWGridEye OneWire ds3231 mbed
MAX11300Hex.h
00001 /******************************************************************************* 00002 * Copyright (C) 2014 Maxim Integrated Products, Inc., All Rights Reserved. 00003 * 00004 * Permission is hereby granted, free of charge, to any person obtaining a 00005 * copy of this software and associated documentation files (the "Software"), 00006 * to deal in the Software without restriction, including without limitation 00007 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 00008 * and/or sell copies of the Software, and to permit persons to whom the 00009 * Software is furnished to do so, subject to the following conditions: 00010 * 00011 * The above copyright notice and this permission notice shall be included 00012 * in all copies or substantial portions of the Software. 00013 * 00014 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 00015 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 00016 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 00017 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES 00018 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 00019 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 00020 * OTHER DEALINGS IN THE SOFTWARE. 00021 * 00022 * Except as contained in this notice, the name of Maxim Integrated 00023 * Products, Inc. shall not be used except as stated in the Maxim Integrated 00024 * Products, Inc. Branding Policy. 00025 * 00026 * The mere transfer of this software does not imply any licenses 00027 * of trade secrets, proprietary technology, copyrights, patents, 00028 * trademarks, maskwork rights, or any other form of intellectual 00029 * property whatsoever. Maxim Integrated Products, Inc. retains all 00030 * ownership rights. 00031 ******************************************************************************* 00032 */ 00033 /// Generated by: MAX11300/1 Configuration Software (Ver. 1.1.0.4) 31/07/2016 13:08 00034 /// Description: MAXREFDES130# 00035 /// Port P0: DAC 00036 /// Port P1: DAC 00037 /// Port P2: DAC 00038 /// Port P3: DAC 00039 /// Port P4: DAC 00040 /// Port P5: DAC 00041 /// Port P6: DAC 00042 /// Port P7: DAC 00043 /// Port P8: DAC 00044 /// Port P9: GPO 00045 /// Port P10: GPO 00046 /// Port P11: GPO 00047 /// Port P12: Single Ended ADC 00048 /// Port P13: N.C. 00049 /// Port P14: N.C. 00050 /// Port P15: N.C. 00051 /// Port P16: N.C. 00052 /// Port P17: N.C. 00053 /// Port P18: N.C. 00054 /// Port P19: N.C. 00055 /// Notes: Header file for MAX11300 configuration used in MAXREFDES130# 00056 #ifndef _MAX11300_DESIGNVALUE_H_ 00057 #define _MAX11300_DESIGNVALUE_H_ 00058 00059 /// SPI first byte when writing MAX11300 (7-bit address in bits 0x7E; LSB=0 for write) 00060 #define MAX11300Addr_SPI_Write(RegAddr) ( (RegAddr << 1) ) 00061 00062 /// SPI first byte when reading MAX11300 (7-bit address in bits 0x7E; LSB=1 for read) 00063 #define MAX11300Addr_SPI_Read(RegAddr) ( (RegAddr << 1) | 1 ) 00064 00065 /// MAX11300EVKIT Register Addresses 00066 typedef enum MAX11300RegAddressEnum { 00067 00068 /// 0x00 r/o dev_id Device Identification 00069 dev_id = 0x00, 00070 00071 /// 0x01 r/o interrupt_flag Interrupt flags 00072 interrupt_flag = 0x01, 00073 00074 /// 0x02 r/o adc_status_15_to_0 new ADC data available 00075 adc_status_15_to_0 = 0x02, 00076 00077 /// 0x03 r/o adc_status_19_to_16 new ADC data available 00078 adc_status_19_to_16 = 0x03, 00079 00080 /// 0x04 r/o dac_oi_status_15_to_0 DAC Overcurrent Interrupt 00081 dac_oi_status_15_to_0 = 0x04, 00082 00083 /// 0x05 r/o dac_oi_status_19_to_16 DAC Overcurrent Interrupt 00084 dac_oi_status_19_to_16 = 0x05, 00085 00086 /// 0x06 r/o gpi_status_15_to_0 GPI event ready 00087 gpi_status_15_to_0 = 0x06, 00088 00089 /// 0x07 r/o gpi_status_19_to_16 GPI event ready 00090 gpi_status_19_to_16 = 0x07, 00091 00092 /// 0x08 r/o tmp_int_data Internal Temeprature 00093 tmp_int_data = 0x08, 00094 00095 /// 0x09 r/o tmp_ext1_data External Temperature D0P/D0N 00096 tmp_ext1_data = 0x09, 00097 00098 /// 0x0a r/o tmp_ext2_data External Temperature D1P/D1N 00099 tmp_ext2_data = 0x0a, 00100 00101 /// 0x0b r/o gpi_data_15_to_0 GPI input ports data 00102 gpi_data_15_to_0 = 0x0b, 00103 00104 /// 0x0c r/o gpi_data_19_to_16 GPI input ports data 00105 gpi_data_19_to_16 = 0x0c, 00106 00107 /// 0x0d r/w gpo_data_15_to_0 GPO output ports data 00108 gpo_data_15_to_0 = 0x0d, 00109 00110 /// 0x0e r/w gpo_data_19_to_16 GPO output ports data 00111 gpo_data_19_to_16 = 0x0e, 00112 00113 /// 0x0f r/o reserved_0F reserved 00114 reserved_0F = 0x0f, 00115 00116 /// 0x10 r/w device_control Global device control register 00117 device_control = 0x10, 00118 00119 /// 0x11 r/w interrupt_mask interrupt mask (1 = disable interrupt source) 00120 interrupt_mask = 0x11, 00121 00122 /// 0x12 r/w gpi_irqmode_7_to_0 xxxxxx 00123 gpi_irqmode_7_to_0 = 0x12, 00124 00125 /// 0x13 r/w gpi_irqmode_15_to_8 xxxxxx 00126 gpi_irqmode_15_to_8 = 0x13, 00127 00128 /// 0x14 r/w gpi_irqmode_19_to_16 xxxxxx 00129 gpi_irqmode_19_to_16 = 0x14, 00130 00131 /// 0x15 r/w gpi_irqmode_31_to_24 xxxxxx 00132 gpi_irqmode_31_to_24 = 0x15, 00133 00134 /// 0x16 r/w dac_preset_data_1 DAC preset activated by <see cref="device_control"/> 00135 dac_preset_data_1 = 0x16, 00136 00137 /// 0x17 r/w dac_preset_data_2 DAC preset activated by <see cref="device_control"/> 00138 dac_preset_data_2 = 0x17, 00139 00140 /// 0x18 r/w tmp_mon_cfg Temperautre Monitor Configuration 00141 tmp_mon_cfg = 0x18, 00142 00143 /// 0x19 r/w tmp_mon_int_hi_thresh Internal Temeprature Hot Threshold 00144 tmp_mon_int_hi_thresh = 0x19, 00145 00146 /// 0x1a r/w tmp_mon_int_lo_thresh Internal Temeprature Cold Threshold 00147 tmp_mon_int_lo_thresh = 0x1a, 00148 00149 /// 0x1b r/w tmp_mon_ext1_hi_thresh External Temperature D0P/D0N Hot Threshold 00150 tmp_mon_ext1_hi_thresh = 0x1b, 00151 00152 /// 0x1c r/w tmp_mon_ext1_lo_thresh External Temperature D0P/D0N Cold Threshold 00153 tmp_mon_ext1_lo_thresh = 0x1c, 00154 00155 /// 0x1d r/w tmp_mon_ext2_hi_thresh External Temperature D1P/D1N Hot Threshold 00156 tmp_mon_ext2_hi_thresh = 0x1d, 00157 00158 /// 0x1e r/w tmp_mon_ext2_lo_thresh External Temperature D1P/D1N Cold Threshold 00159 tmp_mon_ext2_lo_thresh = 0x1e, 00160 00161 /// 0x1f r/w reserved_1F reserved 00162 reserved_1F = 0x1f, 00163 00164 /// 0x20 r/w port_cfg_00 PIXI Port 0 configuration register 00165 port_cfg_00 = 0x20, 00166 00167 /// 0x21 r/w port_cfg_01 PIXI Port 1 configuration register 00168 port_cfg_01 = 0x21, 00169 00170 /// 0x22 r/w port_cfg_02 PIXI Port 2 configuration register 00171 port_cfg_02 = 0x22, 00172 00173 /// 0x23 r/w port_cfg_03 PIXI Port 3 configuration register 00174 port_cfg_03 = 0x23, 00175 00176 /// 0x24 r/w port_cfg_04 PIXI Port 4 configuration register 00177 port_cfg_04 = 0x24, 00178 00179 /// 0x25 r/w port_cfg_05 PIXI Port 5 configuration register 00180 port_cfg_05 = 0x25, 00181 00182 /// 0x26 r/w port_cfg_06 PIXI Port 6 configuration register 00183 port_cfg_06 = 0x26, 00184 00185 /// 0x27 r/w port_cfg_07 PIXI Port 7 configuration register 00186 port_cfg_07 = 0x27, 00187 00188 /// 0x28 r/w port_cfg_08 PIXI Port 8 configuration register 00189 port_cfg_08 = 0x28, 00190 00191 /// 0x29 r/w port_cfg_09 PIXI Port 9 configuration register 00192 port_cfg_09 = 0x29, 00193 00194 /// 0x2a r/w port_cfg_10 PIXI Port 10 configuration register 00195 port_cfg_10 = 0x2a, 00196 00197 /// 0x2b r/w port_cfg_11 PIXI Port 11 configuration register 00198 port_cfg_11 = 0x2b, 00199 00200 /// 0x2c r/w port_cfg_12 PIXI Port 12 configuration register 00201 port_cfg_12 = 0x2c, 00202 00203 /// 0x2d r/w port_cfg_13 PIXI Port 13 configuration register 00204 port_cfg_13 = 0x2d, 00205 00206 /// 0x2e r/w port_cfg_14 PIXI Port 14 configuration register 00207 port_cfg_14 = 0x2e, 00208 00209 /// 0x2f r/w port_cfg_15 PIXI Port 15 configuration register 00210 port_cfg_15 = 0x2f, 00211 00212 /// 0x30 r/w port_cfg_16 PIXI Port 16 configuration register 00213 port_cfg_16 = 0x30, 00214 00215 /// 0x31 r/w port_cfg_17 PIXI Port 17 configuration register 00216 port_cfg_17 = 0x31, 00217 00218 /// 0x32 r/w port_cfg_18 PIXI Port 18 configuration register 00219 port_cfg_18 = 0x32, 00220 00221 /// 0x33 r/w port_cfg_19 PIXI Port 19 configuration register 00222 port_cfg_19 = 0x33, 00223 00224 /// 0x40 r/o adc_data_port_00 PIXI Port 0 Analog to Digital Converter register 00225 adc_data_port_00 = 0x40, 00226 00227 /// 0x41 r/o adc_data_port_01 PIXI Port 1 Analog to Digital Converter register 00228 adc_data_port_01 = 0x41, 00229 00230 /// 0x42 r/o adc_data_port_02 PIXI Port 2 Analog to Digital Converter register 00231 adc_data_port_02 = 0x42, 00232 00233 /// 0x43 r/o adc_data_port_03 PIXI Port 3 Analog to Digital Converter register 00234 adc_data_port_03 = 0x43, 00235 00236 /// 0x44 r/o adc_data_port_04 PIXI Port 4 Analog to Digital Converter register 00237 adc_data_port_04 = 0x44, 00238 00239 /// 0x45 r/o adc_data_port_05 PIXI Port 5 Analog to Digital Converter register 00240 adc_data_port_05 = 0x45, 00241 00242 /// 0x46 r/o adc_data_port_06 PIXI Port 6 Analog to Digital Converter register 00243 adc_data_port_06 = 0x46, 00244 00245 /// 0x47 r/o adc_data_port_07 PIXI Port 7 Analog to Digital Converter register 00246 adc_data_port_07 = 0x47, 00247 00248 /// 0x48 r/o adc_data_port_08 PIXI Port 8 Analog to Digital Converter register 00249 adc_data_port_08 = 0x48, 00250 00251 /// 0x49 r/o adc_data_port_09 PIXI Port 9 Analog to Digital Converter register 00252 adc_data_port_09 = 0x49, 00253 00254 /// 0x4a r/o adc_data_port_10 PIXI Port 10 Analog to Digital Converter register 00255 adc_data_port_10 = 0x4a, 00256 00257 /// 0x4b r/o adc_data_port_11 PIXI Port 11 Analog to Digital Converter register 00258 adc_data_port_11 = 0x4b, 00259 00260 /// 0x4c r/o adc_data_port_12 PIXI Port 12 Analog to Digital Converter register 00261 adc_data_port_12 = 0x4c, 00262 00263 /// 0x4d r/o adc_data_port_13 PIXI Port 13 Analog to Digital Converter register 00264 adc_data_port_13 = 0x4d, 00265 00266 /// 0x4e r/o adc_data_port_14 PIXI Port 14 Analog to Digital Converter register 00267 adc_data_port_14 = 0x4e, 00268 00269 /// 0x4f r/o adc_data_port_15 PIXI Port 15 Analog to Digital Converter register 00270 adc_data_port_15 = 0x4f, 00271 00272 /// 0x50 r/o adc_data_port_16 PIXI Port 16 Analog to Digital Converter register 00273 adc_data_port_16 = 0x50, 00274 00275 /// 0x51 r/o adc_data_port_17 PIXI Port 17 Analog to Digital Converter register 00276 adc_data_port_17 = 0x51, 00277 00278 /// 0x52 r/o adc_data_port_18 PIXI Port 18 Analog to Digital Converter register 00279 adc_data_port_18 = 0x52, 00280 00281 /// 0x53 r/o adc_data_port_19 PIXI Port 19 Analog to Digital Converter register 00282 adc_data_port_19 = 0x53, 00283 00284 /// 0x60 r/w dac_data_port_00 PIXI Port 0 Digital to Analog Converter register 00285 dac_data_port_00 = 0x60, 00286 00287 /// 0x61 r/w dac_data_port_01 PIXI Port 1 Digital to Analog Converter register 00288 dac_data_port_01 = 0x61, 00289 00290 /// 0x62 r/w dac_data_port_02 PIXI Port 2 Digital to Analog Converter register 00291 dac_data_port_02 = 0x62, 00292 00293 /// 0x63 r/w dac_data_port_03 PIXI Port 3 Digital to Analog Converter register 00294 dac_data_port_03 = 0x63, 00295 00296 /// 0x64 r/w dac_data_port_04 PIXI Port 4 Digital to Analog Converter register 00297 dac_data_port_04 = 0x64, 00298 00299 /// 0x65 r/w dac_data_port_05 PIXI Port 5 Digital to Analog Converter register 00300 dac_data_port_05 = 0x65, 00301 00302 /// 0x66 r/w dac_data_port_06 PIXI Port 6 Digital to Analog Converter register 00303 dac_data_port_06 = 0x66, 00304 00305 /// 0x67 r/w dac_data_port_07 PIXI Port 7 Digital to Analog Converter register 00306 dac_data_port_07 = 0x67, 00307 00308 /// 0x68 r/w dac_data_port_08 PIXI Port 8 Digital to Analog Converter register 00309 dac_data_port_08 = 0x68, 00310 00311 /// 0x69 r/w dac_data_port_09 PIXI Port 9 Digital to Analog Converter register 00312 dac_data_port_09 = 0x69, 00313 00314 /// 0x6a r/w dac_data_port_10 PIXI Port 10 Digital to Analog Converter register 00315 dac_data_port_10 = 0x6a, 00316 00317 /// 0x6b r/w dac_data_port_11 PIXI Port 11 Digital to Analog Converter register 00318 dac_data_port_11 = 0x6b, 00319 00320 /// 0x6c r/w dac_data_port_12 PIXI Port 12 Digital to Analog Converter register 00321 dac_data_port_12 = 0x6c, 00322 00323 /// 0x6d r/w dac_data_port_13 PIXI Port 13 Digital to Analog Converter register 00324 dac_data_port_13 = 0x6d, 00325 00326 /// 0x6e r/w dac_data_port_14 PIXI Port 14 Digital to Analog Converter register 00327 dac_data_port_14 = 0x6e, 00328 00329 /// 0x6f r/w dac_data_port_15 PIXI Port 15 Digital to Analog Converter register 00330 dac_data_port_15 = 0x6f, 00331 00332 /// 0x70 r/w dac_data_port_16 PIXI Port 16 Digital to Analog Converter register 00333 dac_data_port_16 = 0x70, 00334 00335 /// 0x71 r/w dac_data_port_17 PIXI Port 17 Digital to Analog Converter register 00336 dac_data_port_17 = 0x71, 00337 00338 /// 0x72 r/w dac_data_port_18 PIXI Port 18 Digital to Analog Converter register 00339 dac_data_port_18 = 0x72, 00340 00341 /// 0x73 r/w dac_data_port_19 PIXI Port 19 Digital to Analog Converter register 00342 dac_data_port_19 = 0x73, 00343 00344 } MAX11300RegAddress_t; 00345 00346 /// 0x00 r/o dev_id Device Identification 00347 /// <code>1111xxxxxxxxxxxx</code> PART Part field 00348 /// <code>xxxx11xxxxxxxxxx</code> REV Revision 00349 /// <code>xxxxxx11xxxxxxxx</code> IFMODE Inteface Mode 00350 /// <code>xxxxxxxx11xxxxxx</code> IFSP Inteface Speed 00351 /// <code>xxxxxxxxxx11xxxx</code> NBRPRTS Number of ports 00352 /// <code>xxxxxxxxxxxx11xx</code> RES Resolution 00353 /// <code>xxxxxxxxxxxxxx11</code> VRNG Voltage Range 00354 #define dev_id_PART 0xf000 00355 #define dev_id_REV 0x0c00 00356 #define dev_id_IFMODE 0x0300 00357 #define dev_id_IFSP 0x00c0 00358 #define dev_id_NBRPRTS 0x0030 00359 #define dev_id_RES 0x000c 00360 #define dev_id_VRNG 0x0003 00361 00362 /// 0x01 r/o interrupt_flag Interrupt flags 00363 /// <code>1xxxxxxxxxxxxxxx</code> VMON High Voltage Supply Monitor 00364 /// <code>x1xxxxxxxxxxxxxx</code> TMPEXT2HOT External Temperature D1P/D1N Hot 00365 /// <code>xx1xxxxxxxxxxxxx</code> TMPEXT2COLD External Temperature D1P/D1N Cold 00366 /// <code>xxx1xxxxxxxxxxxx</code> TMPEXT2NEW External Temperature D1P/D1N New 00367 /// <code>xxxx1xxxxxxxxxxx</code> TMPEXT1HOT External Temperature D0P/D0N Hot 00368 /// <code>xxxxx1xxxxxxxxxx</code> TMPEXT1COLD External Temperature D0P/D0N Cold 00369 /// <code>xxxxxx1xxxxxxxxx</code> TMPEXT1NEW External Temperature D0P/D0N New 00370 /// <code>xxxxxxx1xxxxxxxx</code> TMPINTHOT Internal Temeprature Hot 00371 /// <code>xxxxxxxx1xxxxxxx</code> TMPINTCOLD Internal Temeprature Cold 00372 /// <code>xxxxxxxxx1xxxxxx</code> TMPINTNEW Internal Temeprature New 00373 /// <code>xxxxxxxxxx1xxxxx</code> DACOI DAC over-current 00374 /// <code>xxxxxxxxxxx1xxxx</code> GPIDM GPI event missed 00375 /// <code>xxxxxxxxxxxx1xxx</code> GPIDR GPI event ready 00376 /// <code>xxxxxxxxxxxxx1xx</code> ADCDM ADC data missed 00377 /// <code>xxxxxxxxxxxxxx1x</code> ADCDR ADC data ready 00378 /// <code>xxxxxxxxxxxxxxx1</code> ADCFLAG ADC conversion/sweep complete 00379 #define interrupt_flag_VMON 0x8000 00380 #define interrupt_flag_TMPEXT2HOT 0x4000 00381 #define interrupt_flag_TMPEXT2COLD 0x2000 00382 #define interrupt_flag_TMPEXT2NEW 0x1000 00383 #define interrupt_flag_TMPEXT1HOT 0x0800 00384 #define interrupt_flag_TMPEXT1COLD 0x0400 00385 #define interrupt_flag_TMPEXT1NEW 0x0200 00386 #define interrupt_flag_TMPINTHOT 0x0100 00387 #define interrupt_flag_TMPINTCOLD 0x0080 00388 #define interrupt_flag_TMPINTNEW 0x0040 00389 #define interrupt_flag_DACOI 0x0020 00390 #define interrupt_flag_GPIDM 0x0010 00391 #define interrupt_flag_GPIDR 0x0008 00392 #define interrupt_flag_ADCDM 0x0004 00393 #define interrupt_flag_ADCDR 0x0002 00394 #define interrupt_flag_ADCFLAG 0x0001 00395 00396 /// 0x02 r/o adc_status_15_to_0 new ADC data available 00397 /// <code>1xxxxxxxxxxxxxxx</code> ADCST15 ADCST[15] new <see cref="adc_data_port_15"/> 00398 /// <code>x1xxxxxxxxxxxxxx</code> ADCST14 ADCST[14] new <see cref="adc_data_port_14"/> 00399 /// <code>xx1xxxxxxxxxxxxx</code> ADCST13 ADCST[13] new <see cref="adc_data_port_13"/> 00400 /// <code>xxx1xxxxxxxxxxxx</code> ADCST12 ADCST[12] new <see cref="adc_data_port_12"/> 00401 /// <code>xxxx1xxxxxxxxxxx</code> ADCST11 ADCST[11] new <see cref="adc_data_port_11"/> 00402 /// <code>xxxxx1xxxxxxxxxx</code> ADCST10 ADCST[10] new <see cref="adc_data_port_10"/> 00403 /// <code>xxxxxx1xxxxxxxxx</code> ADCST09 ADCST[9] new <see cref="adc_data_port_09"/> 00404 /// <code>xxxxxxx1xxxxxxxx</code> ADCST08 ADCST[8] new <see cref="adc_data_port_08"/> 00405 /// <code>xxxxxxxx1xxxxxxx</code> ADCST07 ADCST[7] new <see cref="adc_data_port_07"/> 00406 /// <code>xxxxxxxxx1xxxxxx</code> ADCST06 ADCST[6] new <see cref="adc_data_port_06"/> 00407 /// <code>xxxxxxxxxx1xxxxx</code> ADCST05 ADCST[5] new <see cref="adc_data_port_05"/> 00408 /// <code>xxxxxxxxxxx1xxxx</code> ADCST04 ADCST[4] new <see cref="adc_data_port_04"/> 00409 /// <code>xxxxxxxxxxxx1xxx</code> ADCST03 ADCST[3] new <see cref="adc_data_port_03"/> 00410 /// <code>xxxxxxxxxxxxx1xx</code> ADCST02 ADCST[2] new <see cref="adc_data_port_02"/> 00411 /// <code>xxxxxxxxxxxxxx1x</code> ADCST01 ADCST[1] new <see cref="adc_data_port_01"/> 00412 /// <code>xxxxxxxxxxxxxxx1</code> ADCST00 ADCST[0] new <see cref="adc_data_port_00"/> 00413 #define adc_status_15_to_0_ADCST15 0x8000 00414 #define adc_status_15_to_0_ADCST14 0x4000 00415 #define adc_status_15_to_0_ADCST13 0x2000 00416 #define adc_status_15_to_0_ADCST12 0x1000 00417 #define adc_status_15_to_0_ADCST11 0x0800 00418 #define adc_status_15_to_0_ADCST10 0x0400 00419 #define adc_status_15_to_0_ADCST09 0x0200 00420 #define adc_status_15_to_0_ADCST08 0x0100 00421 #define adc_status_15_to_0_ADCST07 0x0080 00422 #define adc_status_15_to_0_ADCST06 0x0040 00423 #define adc_status_15_to_0_ADCST05 0x0020 00424 #define adc_status_15_to_0_ADCST04 0x0010 00425 #define adc_status_15_to_0_ADCST03 0x0008 00426 #define adc_status_15_to_0_ADCST02 0x0004 00427 #define adc_status_15_to_0_ADCST01 0x0002 00428 #define adc_status_15_to_0_ADCST00 0x0001 00429 00430 /// 0x03 r/o adc_status_19_to_16 new ADC data available 00431 /// <code>1xxxxxxxxxxxxxxx</code> ADCST31 ADCST[31] new <see cref="adc_data_port_31"/> 00432 /// <code>x1xxxxxxxxxxxxxx</code> ADCST30 ADCST[30] new <see cref="adc_data_port_30"/> 00433 /// <code>xx1xxxxxxxxxxxxx</code> ADCST29 ADCST[29] new <see cref="adc_data_port_29"/> 00434 /// <code>xxx1xxxxxxxxxxxx</code> ADCST28 ADCST[28] new <see cref="adc_data_port_28"/> 00435 /// <code>xxxx1xxxxxxxxxxx</code> ADCST27 ADCST[27] new <see cref="adc_data_port_27"/> 00436 /// <code>xxxxx1xxxxxxxxxx</code> ADCST26 ADCST[26] new <see cref="adc_data_port_26"/> 00437 /// <code>xxxxxx1xxxxxxxxx</code> ADCST25 ADCST[25] new <see cref="adc_data_port_25"/> 00438 /// <code>xxxxxxx1xxxxxxxx</code> ADCST24 ADCST[24] new <see cref="adc_data_port_24"/> 00439 /// <code>xxxxxxxx1xxxxxxx</code> ADCST23 ADCST[23] new <see cref="adc_data_port_23"/> 00440 /// <code>xxxxxxxxx1xxxxxx</code> ADCST22 ADCST[22] new <see cref="adc_data_port_22"/> 00441 /// <code>xxxxxxxxxx1xxxxx</code> ADCST21 ADCST[21] new <see cref="adc_data_port_21"/> 00442 /// <code>xxxxxxxxxxx1xxxx</code> ADCST20 ADCST[20] new <see cref="adc_data_port_20"/> 00443 /// <code>xxxxxxxxxxxx1xxx</code> ADCST19 ADCST[19] new <see cref="adc_data_port_19"/> 00444 /// <code>xxxxxxxxxxxxx1xx</code> ADCST18 ADCST[18] new <see cref="adc_data_port_18"/> 00445 /// <code>xxxxxxxxxxxxxx1x</code> ADCST17 ADCST[17] new <see cref="adc_data_port_17"/> 00446 /// <code>xxxxxxxxxxxxxxx1</code> ADCST16 ADCST[16] new <see cref="adc_data_port_16"/> 00447 #define adc_status_19_to_16_ADCST31 0x8000 00448 #define adc_status_19_to_16_ADCST30 0x4000 00449 #define adc_status_19_to_16_ADCST29 0x2000 00450 #define adc_status_19_to_16_ADCST28 0x1000 00451 #define adc_status_19_to_16_ADCST27 0x0800 00452 #define adc_status_19_to_16_ADCST26 0x0400 00453 #define adc_status_19_to_16_ADCST25 0x0200 00454 #define adc_status_19_to_16_ADCST24 0x0100 00455 #define adc_status_19_to_16_ADCST23 0x0080 00456 #define adc_status_19_to_16_ADCST22 0x0040 00457 #define adc_status_19_to_16_ADCST21 0x0020 00458 #define adc_status_19_to_16_ADCST20 0x0010 00459 #define adc_status_19_to_16_ADCST19 0x0008 00460 #define adc_status_19_to_16_ADCST18 0x0004 00461 #define adc_status_19_to_16_ADCST17 0x0002 00462 #define adc_status_19_to_16_ADCST16 0x0001 00463 00464 /// 0x04 r/o dac_oi_status_15_to_0 DAC Overcurrent Interrupt 00465 /// <code>1xxxxxxxxxxxxxxx</code> DACOIST15 DACOIST[15] new <see cref="dac_data_port_15"/> 00466 /// <code>x1xxxxxxxxxxxxxx</code> DACOIST14 DACOIST[14] new <see cref="dac_data_port_14"/> 00467 /// <code>xx1xxxxxxxxxxxxx</code> DACOIST13 DACOIST[13] new <see cref="dac_data_port_13"/> 00468 /// <code>xxx1xxxxxxxxxxxx</code> DACOIST12 DACOIST[12] new <see cref="dac_data_port_12"/> 00469 /// <code>xxxx1xxxxxxxxxxx</code> DACOIST11 DACOIST[11] new <see cref="dac_data_port_11"/> 00470 /// <code>xxxxx1xxxxxxxxxx</code> DACOIST10 DACOIST[10] new <see cref="dac_data_port_10"/> 00471 /// <code>xxxxxx1xxxxxxxxx</code> DACOIST09 DACOIST[9] new <see cref="dac_data_port_09"/> 00472 /// <code>xxxxxxx1xxxxxxxx</code> DACOIST08 DACOIST[8] new <see cref="dac_data_port_08"/> 00473 /// <code>xxxxxxxx1xxxxxxx</code> DACOIST07 DACOIST[7] new <see cref="dac_data_port_07"/> 00474 /// <code>xxxxxxxxx1xxxxxx</code> DACOIST06 DACOIST[6] new <see cref="dac_data_port_06"/> 00475 /// <code>xxxxxxxxxx1xxxxx</code> DACOIST05 DACOIST[5] new <see cref="dac_data_port_05"/> 00476 /// <code>xxxxxxxxxxx1xxxx</code> DACOIST04 DACOIST[4] new <see cref="dac_data_port_04"/> 00477 /// <code>xxxxxxxxxxxx1xxx</code> DACOIST03 DACOIST[3] new <see cref="dac_data_port_03"/> 00478 /// <code>xxxxxxxxxxxxx1xx</code> DACOIST02 DACOIST[2] new <see cref="dac_data_port_02"/> 00479 /// <code>xxxxxxxxxxxxxx1x</code> DACOIST01 DACOIST[1] new <see cref="dac_data_port_01"/> 00480 /// <code>xxxxxxxxxxxxxxx1</code> DACOIST00 DACOIST[0] new <see cref="dac_data_port_00"/> 00481 #define dac_oi_status_15_to_0_DACOIST15 0x8000 00482 #define dac_oi_status_15_to_0_DACOIST14 0x4000 00483 #define dac_oi_status_15_to_0_DACOIST13 0x2000 00484 #define dac_oi_status_15_to_0_DACOIST12 0x1000 00485 #define dac_oi_status_15_to_0_DACOIST11 0x0800 00486 #define dac_oi_status_15_to_0_DACOIST10 0x0400 00487 #define dac_oi_status_15_to_0_DACOIST09 0x0200 00488 #define dac_oi_status_15_to_0_DACOIST08 0x0100 00489 #define dac_oi_status_15_to_0_DACOIST07 0x0080 00490 #define dac_oi_status_15_to_0_DACOIST06 0x0040 00491 #define dac_oi_status_15_to_0_DACOIST05 0x0020 00492 #define dac_oi_status_15_to_0_DACOIST04 0x0010 00493 #define dac_oi_status_15_to_0_DACOIST03 0x0008 00494 #define dac_oi_status_15_to_0_DACOIST02 0x0004 00495 #define dac_oi_status_15_to_0_DACOIST01 0x0002 00496 #define dac_oi_status_15_to_0_DACOIST00 0x0001 00497 00498 /// 0x05 r/o dac_oi_status_19_to_16 DAC Overcurrent Interrupt 00499 /// <code>1xxxxxxxxxxxxxxx</code> DACOIST31 DACOIST[31] new <see cref="dac_data_port_31"/> 00500 /// <code>x1xxxxxxxxxxxxxx</code> DACOIST30 DACOIST[30] new <see cref="dac_data_port_30"/> 00501 /// <code>xx1xxxxxxxxxxxxx</code> DACOIST29 DACOIST[29] new <see cref="dac_data_port_29"/> 00502 /// <code>xxx1xxxxxxxxxxxx</code> DACOIST28 DACOIST[28] new <see cref="dac_data_port_28"/> 00503 /// <code>xxxx1xxxxxxxxxxx</code> DACOIST27 DACOIST[27] new <see cref="dac_data_port_27"/> 00504 /// <code>xxxxx1xxxxxxxxxx</code> DACOIST26 DACOIST[26] new <see cref="dac_data_port_26"/> 00505 /// <code>xxxxxx1xxxxxxxxx</code> DACOIST25 DACOIST[25] new <see cref="dac_data_port_25"/> 00506 /// <code>xxxxxxx1xxxxxxxx</code> DACOIST24 DACOIST[24] new <see cref="dac_data_port_24"/> 00507 /// <code>xxxxxxxx1xxxxxxx</code> DACOIST23 DACOIST[23] new <see cref="dac_data_port_23"/> 00508 /// <code>xxxxxxxxx1xxxxxx</code> DACOIST22 DACOIST[22] new <see cref="dac_data_port_22"/> 00509 /// <code>xxxxxxxxxx1xxxxx</code> DACOIST21 DACOIST[21] new <see cref="dac_data_port_21"/> 00510 /// <code>xxxxxxxxxxx1xxxx</code> DACOIST20 DACOIST[20] new <see cref="dac_data_port_20"/> 00511 /// <code>xxxxxxxxxxxx1xxx</code> DACOIST19 DACOIST[19] new <see cref="dac_data_port_19"/> 00512 /// <code>xxxxxxxxxxxxx1xx</code> DACOIST18 DACOIST[18] new <see cref="dac_data_port_18"/> 00513 /// <code>xxxxxxxxxxxxxx1x</code> DACOIST17 DACOIST[17] new <see cref="dac_data_port_17"/> 00514 /// <code>xxxxxxxxxxxxxxx1</code> DACOIST16 DACOIST[16] new <see cref="dac_data_port_16"/> 00515 #define dac_oi_status_19_to_16_DACOIST31 0x8000 00516 #define dac_oi_status_19_to_16_DACOIST30 0x4000 00517 #define dac_oi_status_19_to_16_DACOIST29 0x2000 00518 #define dac_oi_status_19_to_16_DACOIST28 0x1000 00519 #define dac_oi_status_19_to_16_DACOIST27 0x0800 00520 #define dac_oi_status_19_to_16_DACOIST26 0x0400 00521 #define dac_oi_status_19_to_16_DACOIST25 0x0200 00522 #define dac_oi_status_19_to_16_DACOIST24 0x0100 00523 #define dac_oi_status_19_to_16_DACOIST23 0x0080 00524 #define dac_oi_status_19_to_16_DACOIST22 0x0040 00525 #define dac_oi_status_19_to_16_DACOIST21 0x0020 00526 #define dac_oi_status_19_to_16_DACOIST20 0x0010 00527 #define dac_oi_status_19_to_16_DACOIST19 0x0008 00528 #define dac_oi_status_19_to_16_DACOIST18 0x0004 00529 #define dac_oi_status_19_to_16_DACOIST17 0x0002 00530 #define dac_oi_status_19_to_16_DACOIST16 0x0001 00531 00532 /// 0x06 r/o gpi_status_15_to_0 GPI event ready 00533 /// <code>1xxxxxxxxxxxxxxx</code> GPIST15 GPIST[15] 00534 /// <code>x1xxxxxxxxxxxxxx</code> GPIST14 GPIST[14] 00535 /// <code>xx1xxxxxxxxxxxxx</code> GPIST13 GPIST[13] 00536 /// <code>xxx1xxxxxxxxxxxx</code> GPIST12 GPIST[12] 00537 /// <code>xxxx1xxxxxxxxxxx</code> GPIST11 GPIST[11] 00538 /// <code>xxxxx1xxxxxxxxxx</code> GPIST10 GPIST[10] 00539 /// <code>xxxxxx1xxxxxxxxx</code> GPIST09 GPIST[9] 00540 /// <code>xxxxxxx1xxxxxxxx</code> GPIST08 GPIST[8] 00541 /// <code>xxxxxxxx1xxxxxxx</code> GPIST07 GPIST[7] 00542 /// <code>xxxxxxxxx1xxxxxx</code> GPIST06 GPIST[6] 00543 /// <code>xxxxxxxxxx1xxxxx</code> GPIST05 GPIST[5] 00544 /// <code>xxxxxxxxxxx1xxxx</code> GPIST04 GPIST[4] 00545 /// <code>xxxxxxxxxxxx1xxx</code> GPIST03 GPIST[3] 00546 /// <code>xxxxxxxxxxxxx1xx</code> GPIST02 GPIST[2] 00547 /// <code>xxxxxxxxxxxxxx1x</code> GPIST01 GPIST[1] 00548 /// <code>xxxxxxxxxxxxxxx1</code> GPIST00 GPIST[0] 00549 #define gpi_status_15_to_0_GPIST15 0x8000 00550 #define gpi_status_15_to_0_GPIST14 0x4000 00551 #define gpi_status_15_to_0_GPIST13 0x2000 00552 #define gpi_status_15_to_0_GPIST12 0x1000 00553 #define gpi_status_15_to_0_GPIST11 0x0800 00554 #define gpi_status_15_to_0_GPIST10 0x0400 00555 #define gpi_status_15_to_0_GPIST09 0x0200 00556 #define gpi_status_15_to_0_GPIST08 0x0100 00557 #define gpi_status_15_to_0_GPIST07 0x0080 00558 #define gpi_status_15_to_0_GPIST06 0x0040 00559 #define gpi_status_15_to_0_GPIST05 0x0020 00560 #define gpi_status_15_to_0_GPIST04 0x0010 00561 #define gpi_status_15_to_0_GPIST03 0x0008 00562 #define gpi_status_15_to_0_GPIST02 0x0004 00563 #define gpi_status_15_to_0_GPIST01 0x0002 00564 #define gpi_status_15_to_0_GPIST00 0x0001 00565 00566 /// 0x07 r/o gpi_status_19_to_16 GPI event ready 00567 /// <code>1xxxxxxxxxxxxxxx</code> GPIST31 GPIST[31] 00568 /// <code>x1xxxxxxxxxxxxxx</code> GPIST30 GPIST[30] 00569 /// <code>xx1xxxxxxxxxxxxx</code> GPIST29 GPIST[29] 00570 /// <code>xxx1xxxxxxxxxxxx</code> GPIST28 GPIST[28] 00571 /// <code>xxxx1xxxxxxxxxxx</code> GPIST27 GPIST[27] 00572 /// <code>xxxxx1xxxxxxxxxx</code> GPIST26 GPIST[26] 00573 /// <code>xxxxxx1xxxxxxxxx</code> GPIST25 GPIST[25] 00574 /// <code>xxxxxxx1xxxxxxxx</code> GPIST24 GPIST[24] 00575 /// <code>xxxxxxxx1xxxxxxx</code> GPIST23 GPIST[23] 00576 /// <code>xxxxxxxxx1xxxxxx</code> GPIST22 GPIST[22] 00577 /// <code>xxxxxxxxxx1xxxxx</code> GPIST21 GPIST[21] 00578 /// <code>xxxxxxxxxxx1xxxx</code> GPIST20 GPIST[20] 00579 /// <code>xxxxxxxxxxxx1xxx</code> GPIST19 GPIST[19] 00580 /// <code>xxxxxxxxxxxxx1xx</code> GPIST18 GPIST[18] 00581 /// <code>xxxxxxxxxxxxxx1x</code> GPIST17 GPIST[17] 00582 /// <code>xxxxxxxxxxxxxxx1</code> GPIST16 GPIST[16] 00583 #define gpi_status_19_to_16_GPIST31 0x8000 00584 #define gpi_status_19_to_16_GPIST30 0x4000 00585 #define gpi_status_19_to_16_GPIST29 0x2000 00586 #define gpi_status_19_to_16_GPIST28 0x1000 00587 #define gpi_status_19_to_16_GPIST27 0x0800 00588 #define gpi_status_19_to_16_GPIST26 0x0400 00589 #define gpi_status_19_to_16_GPIST25 0x0200 00590 #define gpi_status_19_to_16_GPIST24 0x0100 00591 #define gpi_status_19_to_16_GPIST23 0x0080 00592 #define gpi_status_19_to_16_GPIST22 0x0040 00593 #define gpi_status_19_to_16_GPIST21 0x0020 00594 #define gpi_status_19_to_16_GPIST20 0x0010 00595 #define gpi_status_19_to_16_GPIST19 0x0008 00596 #define gpi_status_19_to_16_GPIST18 0x0004 00597 #define gpi_status_19_to_16_GPIST17 0x0002 00598 #define gpi_status_19_to_16_GPIST16 0x0001 00599 00600 /// 0x08 r/o tmp_int_data Internal Temeprature 00601 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement 00602 #define tmp_int_data_tempcode 0x0fff 00603 00604 /// 0x09 r/o tmp_ext1_data External Temperature D0P/D0N 00605 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement 00606 #define tmp_ext1_data_tempcode 0x0fff 00607 00608 /// 0x0a r/o tmp_ext2_data External Temperature D1P/D1N 00609 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement 00610 #define tmp_ext2_data_tempcode 0x0fff 00611 00612 /// 0x0b r/o gpi_data_15_to_0 GPI input ports data 00613 /// <code>1xxxxxxxxxxxxxxx</code> GPIDAT15 GPIDAT[15] 00614 /// <code>x1xxxxxxxxxxxxxx</code> GPIDAT14 GPIDAT[14] 00615 /// <code>xx1xxxxxxxxxxxxx</code> GPIDAT13 GPIDAT[13] 00616 /// <code>xxx1xxxxxxxxxxxx</code> GPIDAT12 GPIDAT[12] 00617 /// <code>xxxx1xxxxxxxxxxx</code> GPIDAT11 GPIDAT[11] 00618 /// <code>xxxxx1xxxxxxxxxx</code> GPIDAT10 GPIDAT[10] 00619 /// <code>xxxxxx1xxxxxxxxx</code> GPIDAT09 GPIDAT[9] 00620 /// <code>xxxxxxx1xxxxxxxx</code> GPIDAT08 GPIDAT[8] 00621 /// <code>xxxxxxxx1xxxxxxx</code> GPIDAT07 GPIDAT[7] 00622 /// <code>xxxxxxxxx1xxxxxx</code> GPIDAT06 GPIDAT[6] 00623 /// <code>xxxxxxxxxx1xxxxx</code> GPIDAT05 GPIDAT[5] 00624 /// <code>xxxxxxxxxxx1xxxx</code> GPIDAT04 GPIDAT[4] 00625 /// <code>xxxxxxxxxxxx1xxx</code> GPIDAT03 GPIDAT[3] 00626 /// <code>xxxxxxxxxxxxx1xx</code> GPIDAT02 GPIDAT[2] 00627 /// <code>xxxxxxxxxxxxxx1x</code> GPIDAT01 GPIDAT[1] 00628 /// <code>xxxxxxxxxxxxxxx1</code> GPIDAT00 GPIDAT[0] 00629 #define gpi_data_15_to_0_GPIDAT15 0x8000 00630 #define gpi_data_15_to_0_GPIDAT14 0x4000 00631 #define gpi_data_15_to_0_GPIDAT13 0x2000 00632 #define gpi_data_15_to_0_GPIDAT12 0x1000 00633 #define gpi_data_15_to_0_GPIDAT11 0x0800 00634 #define gpi_data_15_to_0_GPIDAT10 0x0400 00635 #define gpi_data_15_to_0_GPIDAT09 0x0200 00636 #define gpi_data_15_to_0_GPIDAT08 0x0100 00637 #define gpi_data_15_to_0_GPIDAT07 0x0080 00638 #define gpi_data_15_to_0_GPIDAT06 0x0040 00639 #define gpi_data_15_to_0_GPIDAT05 0x0020 00640 #define gpi_data_15_to_0_GPIDAT04 0x0010 00641 #define gpi_data_15_to_0_GPIDAT03 0x0008 00642 #define gpi_data_15_to_0_GPIDAT02 0x0004 00643 #define gpi_data_15_to_0_GPIDAT01 0x0002 00644 #define gpi_data_15_to_0_GPIDAT00 0x0001 00645 00646 /// 0x0c r/o gpi_data_19_to_16 GPI input ports data 00647 /// <code>1xxxxxxxxxxxxxxx</code> GPIDAT31 GPIDAT[31] 00648 /// <code>x1xxxxxxxxxxxxxx</code> GPIDAT30 GPIDAT[30] 00649 /// <code>xx1xxxxxxxxxxxxx</code> GPIDAT29 GPIDAT[29] 00650 /// <code>xxx1xxxxxxxxxxxx</code> GPIDAT28 GPIDAT[28] 00651 /// <code>xxxx1xxxxxxxxxxx</code> GPIDAT27 GPIDAT[27] 00652 /// <code>xxxxx1xxxxxxxxxx</code> GPIDAT26 GPIDAT[26] 00653 /// <code>xxxxxx1xxxxxxxxx</code> GPIDAT25 GPIDAT[25] 00654 /// <code>xxxxxxx1xxxxxxxx</code> GPIDAT24 GPIDAT[24] 00655 /// <code>xxxxxxxx1xxxxxxx</code> GPIDAT23 GPIDAT[23] 00656 /// <code>xxxxxxxxx1xxxxxx</code> GPIDAT22 GPIDAT[22] 00657 /// <code>xxxxxxxxxx1xxxxx</code> GPIDAT21 GPIDAT[21] 00658 /// <code>xxxxxxxxxxx1xxxx</code> GPIDAT20 GPIDAT[20] 00659 /// <code>xxxxxxxxxxxx1xxx</code> GPIDAT19 GPIDAT[19] 00660 /// <code>xxxxxxxxxxxxx1xx</code> GPIDAT18 GPIDAT[18] 00661 /// <code>xxxxxxxxxxxxxx1x</code> GPIDAT17 GPIDAT[17] 00662 /// <code>xxxxxxxxxxxxxxx1</code> GPIDAT16 GPIDAT[16] 00663 #define gpi_data_19_to_16_GPIDAT31 0x8000 00664 #define gpi_data_19_to_16_GPIDAT30 0x4000 00665 #define gpi_data_19_to_16_GPIDAT29 0x2000 00666 #define gpi_data_19_to_16_GPIDAT28 0x1000 00667 #define gpi_data_19_to_16_GPIDAT27 0x0800 00668 #define gpi_data_19_to_16_GPIDAT26 0x0400 00669 #define gpi_data_19_to_16_GPIDAT25 0x0200 00670 #define gpi_data_19_to_16_GPIDAT24 0x0100 00671 #define gpi_data_19_to_16_GPIDAT23 0x0080 00672 #define gpi_data_19_to_16_GPIDAT22 0x0040 00673 #define gpi_data_19_to_16_GPIDAT21 0x0020 00674 #define gpi_data_19_to_16_GPIDAT20 0x0010 00675 #define gpi_data_19_to_16_GPIDAT19 0x0008 00676 #define gpi_data_19_to_16_GPIDAT18 0x0004 00677 #define gpi_data_19_to_16_GPIDAT17 0x0002 00678 #define gpi_data_19_to_16_GPIDAT16 0x0001 00679 00680 /// 0x0d r/w gpo_data_15_to_0 GPO output ports data 00681 /// <code>1xxxxxxxxxxxxxxx</code> GPODAT15 GPODAT[15] 00682 /// <code>x1xxxxxxxxxxxxxx</code> GPODAT14 GPODAT[14] 00683 /// <code>xx1xxxxxxxxxxxxx</code> GPODAT13 GPODAT[13] 00684 /// <code>xxx1xxxxxxxxxxxx</code> GPODAT12 GPODAT[12] 00685 /// <code>xxxx1xxxxxxxxxxx</code> GPODAT11 GPODAT[11] 00686 /// <code>xxxxx1xxxxxxxxxx</code> GPODAT10 GPODAT[10] 00687 /// <code>xxxxxx1xxxxxxxxx</code> GPODAT09 GPODAT[9] 00688 /// <code>xxxxxxx1xxxxxxxx</code> GPODAT08 GPODAT[8] 00689 /// <code>xxxxxxxx1xxxxxxx</code> GPODAT07 GPODAT[7] 00690 /// <code>xxxxxxxxx1xxxxxx</code> GPODAT06 GPODAT[6] 00691 /// <code>xxxxxxxxxx1xxxxx</code> GPODAT05 GPODAT[5] 00692 /// <code>xxxxxxxxxxx1xxxx</code> GPODAT04 GPODAT[4] 00693 /// <code>xxxxxxxxxxxx1xxx</code> GPODAT03 GPODAT[3] 00694 /// <code>xxxxxxxxxxxxx1xx</code> GPODAT02 GPODAT[2] 00695 /// <code>xxxxxxxxxxxxxx1x</code> GPODAT01 GPODAT[1] 00696 /// <code>xxxxxxxxxxxxxxx1</code> GPODAT00 GPODAT[0] 00697 #define gpo_data_15_to_0_GPODAT15 0x8000 00698 #define gpo_data_15_to_0_GPODAT14 0x4000 00699 #define gpo_data_15_to_0_GPODAT13 0x2000 00700 #define gpo_data_15_to_0_GPODAT12 0x1000 00701 #define gpo_data_15_to_0_GPODAT11 0x0800 00702 #define gpo_data_15_to_0_GPODAT10 0x0400 00703 #define gpo_data_15_to_0_GPODAT09 0x0200 00704 #define gpo_data_15_to_0_GPODAT08 0x0100 00705 #define gpo_data_15_to_0_GPODAT07 0x0080 00706 #define gpo_data_15_to_0_GPODAT06 0x0040 00707 #define gpo_data_15_to_0_GPODAT05 0x0020 00708 #define gpo_data_15_to_0_GPODAT04 0x0010 00709 #define gpo_data_15_to_0_GPODAT03 0x0008 00710 #define gpo_data_15_to_0_GPODAT02 0x0004 00711 #define gpo_data_15_to_0_GPODAT01 0x0002 00712 #define gpo_data_15_to_0_GPODAT00 0x0001 00713 #define gpo_data_15_to_0_DESIGNVALUE 0x0000 00714 00715 /// 0x0e r/w gpo_data_19_to_16 GPO output ports data 00716 /// <code>1xxxxxxxxxxxxxxx</code> GPODAT31 GPODAT[31] 00717 /// <code>x1xxxxxxxxxxxxxx</code> GPODAT30 GPODAT[30] 00718 /// <code>xx1xxxxxxxxxxxxx</code> GPODAT29 GPODAT[29] 00719 /// <code>xxx1xxxxxxxxxxxx</code> GPODAT28 GPODAT[28] 00720 /// <code>xxxx1xxxxxxxxxxx</code> GPODAT27 GPODAT[27] 00721 /// <code>xxxxx1xxxxxxxxxx</code> GPODAT26 GPODAT[26] 00722 /// <code>xxxxxx1xxxxxxxxx</code> GPODAT25 GPODAT[25] 00723 /// <code>xxxxxxx1xxxxxxxx</code> GPODAT24 GPODAT[24] 00724 /// <code>xxxxxxxx1xxxxxxx</code> GPODAT23 GPODAT[23] 00725 /// <code>xxxxxxxxx1xxxxxx</code> GPODAT22 GPODAT[22] 00726 /// <code>xxxxxxxxxx1xxxxx</code> GPODAT21 GPODAT[21] 00727 /// <code>xxxxxxxxxxx1xxxx</code> GPODAT20 GPODAT[20] 00728 /// <code>xxxxxxxxxxxx1xxx</code> GPODAT19 GPODAT[19] 00729 /// <code>xxxxxxxxxxxxx1xx</code> GPODAT18 GPODAT[18] 00730 /// <code>xxxxxxxxxxxxxx1x</code> GPODAT17 GPODAT[17] 00731 /// <code>xxxxxxxxxxxxxxx1</code> GPODAT16 GPODAT[16] 00732 #define gpo_data_19_to_16_GPODAT31 0x8000 00733 #define gpo_data_19_to_16_GPODAT30 0x4000 00734 #define gpo_data_19_to_16_GPODAT29 0x2000 00735 #define gpo_data_19_to_16_GPODAT28 0x1000 00736 #define gpo_data_19_to_16_GPODAT27 0x0800 00737 #define gpo_data_19_to_16_GPODAT26 0x0400 00738 #define gpo_data_19_to_16_GPODAT25 0x0200 00739 #define gpo_data_19_to_16_GPODAT24 0x0100 00740 #define gpo_data_19_to_16_GPODAT23 0x0080 00741 #define gpo_data_19_to_16_GPODAT22 0x0040 00742 #define gpo_data_19_to_16_GPODAT21 0x0020 00743 #define gpo_data_19_to_16_GPODAT20 0x0010 00744 #define gpo_data_19_to_16_GPODAT19 0x0008 00745 #define gpo_data_19_to_16_GPODAT18 0x0004 00746 #define gpo_data_19_to_16_GPODAT17 0x0002 00747 #define gpo_data_19_to_16_GPODAT16 0x0001 00748 #define gpo_data_19_to_16_DESIGNVALUE 0x0000 00749 00750 /// 0x0f r/o reserved_0F reserved 00751 00752 00753 /// 0x10 r/w device_control Global device control register 00754 /// <code>1xxxxxxxxxxxxxxx</code> RESET Soft reset command 00755 /// <code>x1xxxxxxxxxxxxxx</code> BRST Burst Mode 00756 /// <code>xx1xxxxxxxxxxxxx</code> LPEN Low Power Enable 00757 /// <code>xxx1xxxxxxxxxxxx</code> RS_CANCEL series resistance cancelation on external temperature monitors D0P/D0N and D1P/D1N 00758 /// <code>xxxx1xxxxxxxxxxx</code> TMPPER temperature monitor period 00759 /// <code>xxxxx1xxxxxxxxxx</code> TMPCTLEXT1 monitor external temperature D1P/D1N 00760 /// <code>xxxxxx1xxxxxxxxx</code> TMPCTLEXT0 monitor external temperature D0P/D0N 00761 /// <code>xxxxxxx1xxxxxxxx</code> TMPCTLINT monitor internal temperature 00762 /// <code>xxxxxxxx1xxxxxxx</code> THSHDN Thermal Shutdown 00763 /// <code>xxxxxxxxx1xxxxxx</code> DACREF DAC voltage reference 00764 /// <code>xxxxxxxxxx11xxxx</code> ADCCONV ADC conversion rate 00765 /// <code>xxxxxxxxxxxx11xx</code> DACCTL DAC update mode 00766 /// <code>xxxxxxxxxxxxxx11</code> ADCCTL ADC conversion mode 00767 #define device_control_RESET 0x8000 00768 #define device_control_BRST 0x4000 00769 #define device_control_LPEN 0x2000 00770 #define device_control_RS_CANCEL 0x1000 00771 #define device_control_TMPPER 0x0800 00772 #define device_control_TMPCTLEXT1 0x0400 00773 #define device_control_TMPCTLEXT0 0x0200 00774 #define device_control_TMPCTLINT 0x0100 00775 #define device_control_THSHDN 0x0080 00776 #define device_control_DACREF 0x0040 00777 #define device_control_ADCCONV 0x0030 00778 #define device_control_DACCTL 0x000c 00779 #define device_control_ADCCTL 0x0003 00780 #define device_control_DESIGNVALUE 0x00f2 00781 00782 /// 0x11 r/w interrupt_mask interrupt mask (1 = disable interrupt source) 00783 /// <code>1xxxxxxxxxxxxxxx</code> VMON High Voltage Supply Monitor 00784 /// <code>x1xxxxxxxxxxxxxx</code> TMPEXT2HOT External Temperature D1P/D1N Hot 00785 /// <code>xx1xxxxxxxxxxxxx</code> TMPEXT2COLD External Temperature D1P/D1N Cold 00786 /// <code>xxx1xxxxxxxxxxxx</code> TMPEXT2NEW External Temperature D1P/D1N New 00787 /// <code>xxxx1xxxxxxxxxxx</code> TMPEXT1HOT External Temperature D0P/D0N Hot 00788 /// <code>xxxxx1xxxxxxxxxx</code> TMPEXT1COLD External Temperature D0P/D0N Cold 00789 /// <code>xxxxxx1xxxxxxxxx</code> TMPEXT1NEW External Temperature D0P/D0N New 00790 /// <code>xxxxxxx1xxxxxxxx</code> TMPINTHOT Internal Temeprature Hot 00791 /// <code>xxxxxxxx1xxxxxxx</code> TMPINTCOLD Internal Temeprature Cold 00792 /// <code>xxxxxxxxx1xxxxxx</code> TMPINTNEW Internal Temeprature New 00793 /// <code>xxxxxxxxxx1xxxxx</code> DACOI DAC over-current 00794 /// <code>xxxxxxxxxxx1xxxx</code> GPIDM GPI event missed 00795 /// <code>xxxxxxxxxxxx1xxx</code> GPIDR GPI event ready 00796 /// <code>xxxxxxxxxxxxx1xx</code> ADCDM ADC data missed 00797 /// <code>xxxxxxxxxxxxxx1x</code> ADCDR ADC data ready 00798 /// <code>xxxxxxxxxxxxxxx1</code> ADCFLAG ADC conversion/sweep complete 00799 #define interrupt_mask_VMON 0x8000 00800 #define interrupt_mask_TMPEXT2HOT 0x4000 00801 #define interrupt_mask_TMPEXT2COLD 0x2000 00802 #define interrupt_mask_TMPEXT2NEW 0x1000 00803 #define interrupt_mask_TMPEXT1HOT 0x0800 00804 #define interrupt_mask_TMPEXT1COLD 0x0400 00805 #define interrupt_mask_TMPEXT1NEW 0x0200 00806 #define interrupt_mask_TMPINTHOT 0x0100 00807 #define interrupt_mask_TMPINTCOLD 0x0080 00808 #define interrupt_mask_TMPINTNEW 0x0040 00809 #define interrupt_mask_DACOI 0x0020 00810 #define interrupt_mask_GPIDM 0x0010 00811 #define interrupt_mask_GPIDR 0x0008 00812 #define interrupt_mask_ADCDM 0x0004 00813 #define interrupt_mask_ADCDR 0x0002 00814 #define interrupt_mask_ADCFLAG 0x0001 00815 #define interrupt_mask_DESIGNVALUE 0xffff 00816 00817 /// 0x12 r/w gpi_irqmode_7_to_0 xxxxxx 00818 /// <code>11xxxxxxxxxxxxxx</code> GPIMD07 GPIMD[7] 00819 /// <code>xx11xxxxxxxxxxxx</code> GPIMD06 GPIMD[6] 00820 /// <code>xxxx11xxxxxxxxxx</code> GPIMD05 GPIMD[5] 00821 /// <code>xxxxxx11xxxxxxxx</code> GPIMD04 GPIMD[4] 00822 /// <code>xxxxxxxx11xxxxxx</code> GPIMD03 GPIMD[3] 00823 /// <code>xxxxxxxxxx11xxxx</code> GPIMD02 GPIMD[2] 00824 /// <code>xxxxxxxxxxxx11xx</code> GPIMD01 GPIMD[1] 00825 /// <code>xxxxxxxxxxxxxx11</code> GPIMD00 GPIMD[0] 00826 #define gpi_irqmode_7_to_0_GPIMD07 0xc000 00827 #define gpi_irqmode_7_to_0_GPIMD06 0x3000 00828 #define gpi_irqmode_7_to_0_GPIMD05 0x0c00 00829 #define gpi_irqmode_7_to_0_GPIMD04 0x0300 00830 #define gpi_irqmode_7_to_0_GPIMD03 0x00c0 00831 #define gpi_irqmode_7_to_0_GPIMD02 0x0030 00832 #define gpi_irqmode_7_to_0_GPIMD01 0x000c 00833 #define gpi_irqmode_7_to_0_GPIMD00 0x0003 00834 #define gpi_irqmode_7_to_0_DESIGNVALUE 0x0000 00835 00836 /// 0x13 r/w gpi_irqmode_15_to_8 xxxxxx 00837 /// <code>11xxxxxxxxxxxxxx</code> GPIMD15 GPIMD[15] 00838 /// <code>xx11xxxxxxxxxxxx</code> GPIMD14 GPIMD[14] 00839 /// <code>xxxx11xxxxxxxxxx</code> GPIMD13 GPIMD[13] 00840 /// <code>xxxxxx11xxxxxxxx</code> GPIMD12 GPIMD[12] 00841 /// <code>xxxxxxxx11xxxxxx</code> GPIMD11 GPIMD[11] 00842 /// <code>xxxxxxxxxx11xxxx</code> GPIMD10 GPIMD[10] 00843 /// <code>xxxxxxxxxxxx11xx</code> GPIMD09 GPIMD[9] 00844 /// <code>xxxxxxxxxxxxxx11</code> GPIMD08 GPIMD[8] 00845 #define gpi_irqmode_15_to_8_GPIMD15 0xc000 00846 #define gpi_irqmode_15_to_8_GPIMD14 0x3000 00847 #define gpi_irqmode_15_to_8_GPIMD13 0x0c00 00848 #define gpi_irqmode_15_to_8_GPIMD12 0x0300 00849 #define gpi_irqmode_15_to_8_GPIMD11 0x00c0 00850 #define gpi_irqmode_15_to_8_GPIMD10 0x0030 00851 #define gpi_irqmode_15_to_8_GPIMD09 0x000c 00852 #define gpi_irqmode_15_to_8_GPIMD08 0x0003 00853 #define gpi_irqmode_15_to_8_DESIGNVALUE 0x0000 00854 00855 /// 0x14 r/w gpi_irqmode_19_to_16 xxxxxx 00856 /// <code>11xxxxxxxxxxxxxx</code> GPIMD23 GPIMD[23] 00857 /// <code>xx11xxxxxxxxxxxx</code> GPIMD22 GPIMD[22] 00858 /// <code>xxxx11xxxxxxxxxx</code> GPIMD21 GPIMD[21] 00859 /// <code>xxxxxx11xxxxxxxx</code> GPIMD20 GPIMD[20] 00860 /// <code>xxxxxxxx11xxxxxx</code> GPIMD19 GPIMD[19] 00861 /// <code>xxxxxxxxxx11xxxx</code> GPIMD18 GPIMD[18] 00862 /// <code>xxxxxxxxxxxx11xx</code> GPIMD17 GPIMD[17] 00863 /// <code>xxxxxxxxxxxxxx11</code> GPIMD16 GPIMD[16] 00864 #define gpi_irqmode_19_to_16_GPIMD23 0xc000 00865 #define gpi_irqmode_19_to_16_GPIMD22 0x3000 00866 #define gpi_irqmode_19_to_16_GPIMD21 0x0c00 00867 #define gpi_irqmode_19_to_16_GPIMD20 0x0300 00868 #define gpi_irqmode_19_to_16_GPIMD19 0x00c0 00869 #define gpi_irqmode_19_to_16_GPIMD18 0x0030 00870 #define gpi_irqmode_19_to_16_GPIMD17 0x000c 00871 #define gpi_irqmode_19_to_16_GPIMD16 0x0003 00872 #define gpi_irqmode_19_to_16_DESIGNVALUE 0x0000 00873 00874 /// 0x15 r/w gpi_irqmode_31_to_24 xxxxxx 00875 /// <code>11xxxxxxxxxxxxxx</code> GPIMD31 GPIMD[31] 00876 /// <code>xx11xxxxxxxxxxxx</code> GPIMD30 GPIMD[30] 00877 /// <code>xxxx11xxxxxxxxxx</code> GPIMD29 GPIMD[29] 00878 /// <code>xxxxxx11xxxxxxxx</code> GPIMD28 GPIMD[28] 00879 /// <code>xxxxxxxx11xxxxxx</code> GPIMD27 GPIMD[27] 00880 /// <code>xxxxxxxxxx11xxxx</code> GPIMD26 GPIMD[26] 00881 /// <code>xxxxxxxxxxxx11xx</code> GPIMD25 GPIMD[25] 00882 /// <code>xxxxxxxxxxxxxx11</code> GPIMD24 GPIMD[24] 00883 #define gpi_irqmode_31_to_24_GPIMD31 0xc000 00884 #define gpi_irqmode_31_to_24_GPIMD30 0x3000 00885 #define gpi_irqmode_31_to_24_GPIMD29 0x0c00 00886 #define gpi_irqmode_31_to_24_GPIMD28 0x0300 00887 #define gpi_irqmode_31_to_24_GPIMD27 0x00c0 00888 #define gpi_irqmode_31_to_24_GPIMD26 0x0030 00889 #define gpi_irqmode_31_to_24_GPIMD25 0x000c 00890 #define gpi_irqmode_31_to_24_GPIMD24 0x0003 00891 00892 /// 0x16 r/w dac_preset_data_1 DAC preset activated by <see cref="device_control"/> 00893 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 00894 #define dac_preset_data_1_daccode 0x0fff 00895 #define dac_preset_data_1_DESIGNVALUE 0x0000 00896 00897 /// 0x17 r/w dac_preset_data_2 DAC preset activated by <see cref="device_control"/> 00898 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 00899 #define dac_preset_data_2_daccode 0x0fff 00900 #define dac_preset_data_2_DESIGNVALUE 0x0000 00901 00902 /// 0x18 r/w tmp_mon_cfg Temperautre Monitor Configuration 00903 /// <code>xxxxxxxxxx11xxxx</code> TMPEXT2MONCFG average 4, 8, 16, or 32 measurements 00904 /// <code>xxxxxxxxxxxx11xx</code> TMPEXT1MONCFG average 4, 8, 16, or 32 measurements 00905 /// <code>xxxxxxxxxxxxxx11</code> TMPINTMONCFG average 4, 8, 16, or 32 measurements 00906 #define tmp_mon_cfg_TMPEXT2MONCFG 0x0030 00907 #define tmp_mon_cfg_TMPEXT1MONCFG 0x000c 00908 #define tmp_mon_cfg_TMPINTMONCFG 0x0003 00909 00910 /// 0x19 r/w tmp_mon_int_hi_thresh Internal Temeprature Hot Threshold 00911 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement 00912 #define tmp_mon_int_hi_thresh_tempcode 0x0fff 00913 #define tmp_mon_int_hi_thresh_DESIGNVALUE 0x07ff 00914 00915 /// 0x1a r/w tmp_mon_int_lo_thresh Internal Temeprature Cold Threshold 00916 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement 00917 #define tmp_mon_int_lo_thresh_tempcode 0x0fff 00918 #define tmp_mon_int_lo_thresh_DESIGNVALUE 0x0800 00919 00920 /// 0x1b r/w tmp_mon_ext1_hi_thresh External Temperature D0P/D0N Hot Threshold 00921 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement 00922 #define tmp_mon_ext1_hi_thresh_tempcode 0x0fff 00923 #define tmp_mon_ext1_hi_thresh_DESIGNVALUE 0x07ff 00924 00925 /// 0x1c r/w tmp_mon_ext1_lo_thresh External Temperature D0P/D0N Cold Threshold 00926 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement 00927 #define tmp_mon_ext1_lo_thresh_tempcode 0x0fff 00928 #define tmp_mon_ext1_lo_thresh_DESIGNVALUE 0x0800 00929 00930 /// 0x1d r/w tmp_mon_ext2_hi_thresh External Temperature D1P/D1N Hot Threshold 00931 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement 00932 #define tmp_mon_ext2_hi_thresh_tempcode 0x0fff 00933 #define tmp_mon_ext2_hi_thresh_DESIGNVALUE 0x07ff 00934 00935 /// 0x1e r/w tmp_mon_ext2_lo_thresh External Temperature D1P/D1N Cold Threshold 00936 /// <code>xxxx111111111111</code> tempcode Temperature code, LSB=0.125 degrees C, 12-bit 2's complement 00937 #define tmp_mon_ext2_lo_thresh_tempcode 0x0fff 00938 #define tmp_mon_ext2_lo_thresh_DESIGNVALUE 0x0800 00939 00940 /// 0x1f r/w reserved_1F reserved 00941 00942 00943 /// 0x20 r/w port_cfg_00 PIXI Port 0 configuration register 00944 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 00945 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 00946 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 00947 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 00948 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 00949 #define port_cfg_00_PortCfgFuncID 0xf000 00950 #define port_cfg_00_funcprm_avrInv 0x0800 00951 #define port_cfg_00_funcprm_range 0x0700 00952 #define port_cfg_00_funcprm_nsamples 0x00e0 00953 #define port_cfg_00_funcprm_port 0x001f 00954 #define port_cfg_00_DESIGNVALUE 0x5100 00955 00956 /// 0x21 r/w port_cfg_01 PIXI Port 1 configuration register 00957 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 00958 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 00959 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 00960 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 00961 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 00962 #define port_cfg_01_PortCfgFuncID 0xf000 00963 #define port_cfg_01_funcprm_avrInv 0x0800 00964 #define port_cfg_01_funcprm_range 0x0700 00965 #define port_cfg_01_funcprm_nsamples 0x00e0 00966 #define port_cfg_01_funcprm_port 0x001f 00967 #define port_cfg_01_DESIGNVALUE 0x5100 00968 00969 /// 0x22 r/w port_cfg_02 PIXI Port 2 configuration register 00970 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 00971 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 00972 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 00973 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 00974 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 00975 #define port_cfg_02_PortCfgFuncID 0xf000 00976 #define port_cfg_02_funcprm_avrInv 0x0800 00977 #define port_cfg_02_funcprm_range 0x0700 00978 #define port_cfg_02_funcprm_nsamples 0x00e0 00979 #define port_cfg_02_funcprm_port 0x001f 00980 #define port_cfg_02_DESIGNVALUE 0x5100 00981 00982 /// 0x23 r/w port_cfg_03 PIXI Port 3 configuration register 00983 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 00984 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 00985 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 00986 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 00987 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 00988 #define port_cfg_03_PortCfgFuncID 0xf000 00989 #define port_cfg_03_funcprm_avrInv 0x0800 00990 #define port_cfg_03_funcprm_range 0x0700 00991 #define port_cfg_03_funcprm_nsamples 0x00e0 00992 #define port_cfg_03_funcprm_port 0x001f 00993 #define port_cfg_03_DESIGNVALUE 0x5100 00994 00995 /// 0x24 r/w port_cfg_04 PIXI Port 4 configuration register 00996 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 00997 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 00998 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 00999 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01000 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01001 #define port_cfg_04_PortCfgFuncID 0xf000 01002 #define port_cfg_04_funcprm_avrInv 0x0800 01003 #define port_cfg_04_funcprm_range 0x0700 01004 #define port_cfg_04_funcprm_nsamples 0x00e0 01005 #define port_cfg_04_funcprm_port 0x001f 01006 #define port_cfg_04_DESIGNVALUE 0x5100 01007 01008 /// 0x25 r/w port_cfg_05 PIXI Port 5 configuration register 01009 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 01010 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 01011 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 01012 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01013 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01014 #define port_cfg_05_PortCfgFuncID 0xf000 01015 #define port_cfg_05_funcprm_avrInv 0x0800 01016 #define port_cfg_05_funcprm_range 0x0700 01017 #define port_cfg_05_funcprm_nsamples 0x00e0 01018 #define port_cfg_05_funcprm_port 0x001f 01019 #define port_cfg_05_DESIGNVALUE 0x5100 01020 01021 /// 0x26 r/w port_cfg_06 PIXI Port 6 configuration register 01022 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 01023 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 01024 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 01025 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01026 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01027 #define port_cfg_06_PortCfgFuncID 0xf000 01028 #define port_cfg_06_funcprm_avrInv 0x0800 01029 #define port_cfg_06_funcprm_range 0x0700 01030 #define port_cfg_06_funcprm_nsamples 0x00e0 01031 #define port_cfg_06_funcprm_port 0x001f 01032 #define port_cfg_06_DESIGNVALUE 0x5100 01033 01034 /// 0x27 r/w port_cfg_07 PIXI Port 7 configuration register 01035 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 01036 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 01037 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 01038 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01039 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01040 #define port_cfg_07_PortCfgFuncID 0xf000 01041 #define port_cfg_07_funcprm_avrInv 0x0800 01042 #define port_cfg_07_funcprm_range 0x0700 01043 #define port_cfg_07_funcprm_nsamples 0x00e0 01044 #define port_cfg_07_funcprm_port 0x001f 01045 #define port_cfg_07_DESIGNVALUE 0x5100 01046 01047 /// 0x28 r/w port_cfg_08 PIXI Port 8 configuration register 01048 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 01049 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 01050 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 01051 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01052 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01053 #define port_cfg_08_PortCfgFuncID 0xf000 01054 #define port_cfg_08_funcprm_avrInv 0x0800 01055 #define port_cfg_08_funcprm_range 0x0700 01056 #define port_cfg_08_funcprm_nsamples 0x00e0 01057 #define port_cfg_08_funcprm_port 0x001f 01058 #define port_cfg_08_DESIGNVALUE 0x5100 01059 01060 /// 0x29 r/w port_cfg_09 PIXI Port 9 configuration register 01061 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 01062 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 01063 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 01064 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01065 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01066 #define port_cfg_09_PortCfgFuncID 0xf000 01067 #define port_cfg_09_funcprm_avrInv 0x0800 01068 #define port_cfg_09_funcprm_range 0x0700 01069 #define port_cfg_09_funcprm_nsamples 0x00e0 01070 #define port_cfg_09_funcprm_port 0x001f 01071 #define port_cfg_09_DESIGNVALUE 0x3000 01072 01073 /// 0x2a r/w port_cfg_10 PIXI Port 10 configuration register 01074 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 01075 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 01076 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 01077 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01078 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01079 #define port_cfg_10_PortCfgFuncID 0xf000 01080 #define port_cfg_10_funcprm_avrInv 0x0800 01081 #define port_cfg_10_funcprm_range 0x0700 01082 #define port_cfg_10_funcprm_nsamples 0x00e0 01083 #define port_cfg_10_funcprm_port 0x001f 01084 #define port_cfg_10_DESIGNVALUE 0x3000 01085 01086 /// 0x2b r/w port_cfg_11 PIXI Port 11 configuration register 01087 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 01088 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 01089 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 01090 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01091 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01092 #define port_cfg_11_PortCfgFuncID 0xf000 01093 #define port_cfg_11_funcprm_avrInv 0x0800 01094 #define port_cfg_11_funcprm_range 0x0700 01095 #define port_cfg_11_funcprm_nsamples 0x00e0 01096 #define port_cfg_11_funcprm_port 0x001f 01097 #define port_cfg_11_DESIGNVALUE 0x3000 01098 01099 /// 0x2c r/w port_cfg_12 PIXI Port 12 configuration register 01100 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 01101 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 01102 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 01103 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01104 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01105 #define port_cfg_12_PortCfgFuncID 0xf000 01106 #define port_cfg_12_funcprm_avrInv 0x0800 01107 #define port_cfg_12_funcprm_range 0x0700 01108 #define port_cfg_12_funcprm_nsamples 0x00e0 01109 #define port_cfg_12_funcprm_port 0x001f 01110 #define port_cfg_12_DESIGNVALUE 0x7180 01111 01112 /// 0x2d r/w port_cfg_13 PIXI Port 13 configuration register 01113 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 01114 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 01115 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 01116 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01117 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01118 #define port_cfg_13_PortCfgFuncID 0xf000 01119 #define port_cfg_13_funcprm_avrInv 0x0800 01120 #define port_cfg_13_funcprm_range 0x0700 01121 #define port_cfg_13_funcprm_nsamples 0x00e0 01122 #define port_cfg_13_funcprm_port 0x001f 01123 #define port_cfg_13_DESIGNVALUE 0x0000 01124 01125 /// 0x2e r/w port_cfg_14 PIXI Port 14 configuration register 01126 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 01127 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 01128 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 01129 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01130 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01131 #define port_cfg_14_PortCfgFuncID 0xf000 01132 #define port_cfg_14_funcprm_avrInv 0x0800 01133 #define port_cfg_14_funcprm_range 0x0700 01134 #define port_cfg_14_funcprm_nsamples 0x00e0 01135 #define port_cfg_14_funcprm_port 0x001f 01136 #define port_cfg_14_DESIGNVALUE 0x0000 01137 01138 /// 0x2f r/w port_cfg_15 PIXI Port 15 configuration register 01139 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 01140 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 01141 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 01142 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01143 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01144 #define port_cfg_15_PortCfgFuncID 0xf000 01145 #define port_cfg_15_funcprm_avrInv 0x0800 01146 #define port_cfg_15_funcprm_range 0x0700 01147 #define port_cfg_15_funcprm_nsamples 0x00e0 01148 #define port_cfg_15_funcprm_port 0x001f 01149 #define port_cfg_15_DESIGNVALUE 0x0000 01150 01151 /// 0x30 r/w port_cfg_16 PIXI Port 16 configuration register 01152 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 01153 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 01154 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 01155 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01156 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01157 #define port_cfg_16_PortCfgFuncID 0xf000 01158 #define port_cfg_16_funcprm_avrInv 0x0800 01159 #define port_cfg_16_funcprm_range 0x0700 01160 #define port_cfg_16_funcprm_nsamples 0x00e0 01161 #define port_cfg_16_funcprm_port 0x001f 01162 #define port_cfg_16_DESIGNVALUE 0x0000 01163 01164 /// 0x31 r/w port_cfg_17 PIXI Port 17 configuration register 01165 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 01166 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 01167 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 01168 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01169 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01170 #define port_cfg_17_PortCfgFuncID 0xf000 01171 #define port_cfg_17_funcprm_avrInv 0x0800 01172 #define port_cfg_17_funcprm_range 0x0700 01173 #define port_cfg_17_funcprm_nsamples 0x00e0 01174 #define port_cfg_17_funcprm_port 0x001f 01175 #define port_cfg_17_DESIGNVALUE 0x0000 01176 01177 /// 0x32 r/w port_cfg_18 PIXI Port 18 configuration register 01178 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 01179 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 01180 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 01181 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01182 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01183 #define port_cfg_18_PortCfgFuncID 0xf000 01184 #define port_cfg_18_funcprm_avrInv 0x0800 01185 #define port_cfg_18_funcprm_range 0x0700 01186 #define port_cfg_18_funcprm_nsamples 0x00e0 01187 #define port_cfg_18_funcprm_port 0x001f 01188 #define port_cfg_18_DESIGNVALUE 0x0000 01189 01190 /// 0x33 r/w port_cfg_19 PIXI Port 19 configuration register 01191 /// <code>1111xxxxxxxxxxxx</code> PortCfgFuncID Port function / mode 01192 /// <code>xxxx1xxxxxxxxxxx</code> funcprm_avrInv AVR / INV 01193 /// <code>xxxxx111xxxxxxxx</code> funcprm_range DAC Range / ADC Range 01194 /// <code>xxxxxxxx111xxxxx</code> funcprm_nsamples Number of samples / CAP 01195 /// <code>xxxxxxxxxxx11111</code> funcprm_port Associated port 0..31 01196 #define port_cfg_19_PortCfgFuncID 0xf000 01197 #define port_cfg_19_funcprm_avrInv 0x0800 01198 #define port_cfg_19_funcprm_range 0x0700 01199 #define port_cfg_19_funcprm_nsamples 0x00e0 01200 #define port_cfg_19_funcprm_port 0x001f 01201 #define port_cfg_19_DESIGNVALUE 0x0000 01202 01203 /// 0x40 r/o adc_data_port_00 PIXI Port 0 Analog to Digital Converter register 01204 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01205 #define adc_data_port_00_adccode 0x0fff 01206 01207 /// 0x41 r/o adc_data_port_01 PIXI Port 1 Analog to Digital Converter register 01208 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01209 #define adc_data_port_01_adccode 0x0fff 01210 01211 /// 0x42 r/o adc_data_port_02 PIXI Port 2 Analog to Digital Converter register 01212 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01213 #define adc_data_port_02_adccode 0x0fff 01214 01215 /// 0x43 r/o adc_data_port_03 PIXI Port 3 Analog to Digital Converter register 01216 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01217 #define adc_data_port_03_adccode 0x0fff 01218 01219 /// 0x44 r/o adc_data_port_04 PIXI Port 4 Analog to Digital Converter register 01220 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01221 #define adc_data_port_04_adccode 0x0fff 01222 01223 /// 0x45 r/o adc_data_port_05 PIXI Port 5 Analog to Digital Converter register 01224 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01225 #define adc_data_port_05_adccode 0x0fff 01226 01227 /// 0x46 r/o adc_data_port_06 PIXI Port 6 Analog to Digital Converter register 01228 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01229 #define adc_data_port_06_adccode 0x0fff 01230 01231 /// 0x47 r/o adc_data_port_07 PIXI Port 7 Analog to Digital Converter register 01232 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01233 #define adc_data_port_07_adccode 0x0fff 01234 01235 /// 0x48 r/o adc_data_port_08 PIXI Port 8 Analog to Digital Converter register 01236 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01237 #define adc_data_port_08_adccode 0x0fff 01238 01239 /// 0x49 r/o adc_data_port_09 PIXI Port 9 Analog to Digital Converter register 01240 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01241 #define adc_data_port_09_adccode 0x0fff 01242 01243 /// 0x4a r/o adc_data_port_10 PIXI Port 10 Analog to Digital Converter register 01244 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01245 #define adc_data_port_10_adccode 0x0fff 01246 01247 /// 0x4b r/o adc_data_port_11 PIXI Port 11 Analog to Digital Converter register 01248 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01249 #define adc_data_port_11_adccode 0x0fff 01250 01251 /// 0x4c r/o adc_data_port_12 PIXI Port 12 Analog to Digital Converter register 01252 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01253 #define adc_data_port_12_adccode 0x0fff 01254 01255 /// 0x4d r/o adc_data_port_13 PIXI Port 13 Analog to Digital Converter register 01256 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01257 #define adc_data_port_13_adccode 0x0fff 01258 01259 /// 0x4e r/o adc_data_port_14 PIXI Port 14 Analog to Digital Converter register 01260 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01261 #define adc_data_port_14_adccode 0x0fff 01262 01263 /// 0x4f r/o adc_data_port_15 PIXI Port 15 Analog to Digital Converter register 01264 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01265 #define adc_data_port_15_adccode 0x0fff 01266 01267 /// 0x50 r/o adc_data_port_16 PIXI Port 16 Analog to Digital Converter register 01268 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01269 #define adc_data_port_16_adccode 0x0fff 01270 01271 /// 0x51 r/o adc_data_port_17 PIXI Port 17 Analog to Digital Converter register 01272 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01273 #define adc_data_port_17_adccode 0x0fff 01274 01275 /// 0x52 r/o adc_data_port_18 PIXI Port 18 Analog to Digital Converter register 01276 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01277 #define adc_data_port_18_adccode 0x0fff 01278 01279 /// 0x53 r/o adc_data_port_19 PIXI Port 19 Analog to Digital Converter register 01280 /// <code>xxxx111111111111</code> adccode 12-bit ADC code 01281 #define adc_data_port_19_adccode 0x0fff 01282 01283 /// 0x60 r/w dac_data_port_00 PIXI Port 0 Digital to Analog Converter register 01284 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01285 #define dac_data_port_00_daccode 0x0fff 01286 #define dac_data_port_00_DESIGNVALUE 0x0000 01287 01288 /// 0x61 r/w dac_data_port_01 PIXI Port 1 Digital to Analog Converter register 01289 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01290 #define dac_data_port_01_daccode 0x0fff 01291 #define dac_data_port_01_DESIGNVALUE 0x0000 01292 01293 /// 0x62 r/w dac_data_port_02 PIXI Port 2 Digital to Analog Converter register 01294 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01295 #define dac_data_port_02_daccode 0x0fff 01296 #define dac_data_port_02_DESIGNVALUE 0x0000 01297 01298 /// 0x63 r/w dac_data_port_03 PIXI Port 3 Digital to Analog Converter register 01299 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01300 #define dac_data_port_03_daccode 0x0fff 01301 #define dac_data_port_03_DESIGNVALUE 0x0000 01302 01303 /// 0x64 r/w dac_data_port_04 PIXI Port 4 Digital to Analog Converter register 01304 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01305 #define dac_data_port_04_daccode 0x0fff 01306 #define dac_data_port_04_DESIGNVALUE 0x0000 01307 01308 /// 0x65 r/w dac_data_port_05 PIXI Port 5 Digital to Analog Converter register 01309 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01310 #define dac_data_port_05_daccode 0x0fff 01311 #define dac_data_port_05_DESIGNVALUE 0x0000 01312 01313 /// 0x66 r/w dac_data_port_06 PIXI Port 6 Digital to Analog Converter register 01314 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01315 #define dac_data_port_06_daccode 0x0fff 01316 #define dac_data_port_06_DESIGNVALUE 0x0000 01317 01318 /// 0x67 r/w dac_data_port_07 PIXI Port 7 Digital to Analog Converter register 01319 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01320 #define dac_data_port_07_daccode 0x0fff 01321 #define dac_data_port_07_DESIGNVALUE 0x0000 01322 01323 /// 0x68 r/w dac_data_port_08 PIXI Port 8 Digital to Analog Converter register 01324 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01325 #define dac_data_port_08_daccode 0x0fff 01326 #define dac_data_port_08_DESIGNVALUE 0x0000 01327 01328 /// 0x69 r/w dac_data_port_09 PIXI Port 9 Digital to Analog Converter register 01329 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01330 #define dac_data_port_09_daccode 0x0fff 01331 #define dac_data_port_09_DESIGNVALUE 0x0800 01332 01333 /// 0x6a r/w dac_data_port_10 PIXI Port 10 Digital to Analog Converter register 01334 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01335 #define dac_data_port_10_daccode 0x0fff 01336 #define dac_data_port_10_DESIGNVALUE 0x0800 01337 01338 /// 0x6b r/w dac_data_port_11 PIXI Port 11 Digital to Analog Converter register 01339 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01340 #define dac_data_port_11_daccode 0x0fff 01341 #define dac_data_port_11_DESIGNVALUE 0x0800 01342 01343 /// 0x6c r/w dac_data_port_12 PIXI Port 12 Digital to Analog Converter register 01344 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01345 #define dac_data_port_12_daccode 0x0fff 01346 #define dac_data_port_12_DESIGNVALUE 0x0000 01347 01348 /// 0x6d r/w dac_data_port_13 PIXI Port 13 Digital to Analog Converter register 01349 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01350 #define dac_data_port_13_daccode 0x0fff 01351 #define dac_data_port_13_DESIGNVALUE 0x0000 01352 01353 /// 0x6e r/w dac_data_port_14 PIXI Port 14 Digital to Analog Converter register 01354 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01355 #define dac_data_port_14_daccode 0x0fff 01356 #define dac_data_port_14_DESIGNVALUE 0x0000 01357 01358 /// 0x6f r/w dac_data_port_15 PIXI Port 15 Digital to Analog Converter register 01359 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01360 #define dac_data_port_15_daccode 0x0fff 01361 #define dac_data_port_15_DESIGNVALUE 0x0000 01362 01363 /// 0x70 r/w dac_data_port_16 PIXI Port 16 Digital to Analog Converter register 01364 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01365 #define dac_data_port_16_daccode 0x0fff 01366 #define dac_data_port_16_DESIGNVALUE 0x0000 01367 01368 /// 0x71 r/w dac_data_port_17 PIXI Port 17 Digital to Analog Converter register 01369 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01370 #define dac_data_port_17_daccode 0x0fff 01371 #define dac_data_port_17_DESIGNVALUE 0x0000 01372 01373 /// 0x72 r/w dac_data_port_18 PIXI Port 18 Digital to Analog Converter register 01374 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01375 #define dac_data_port_18_daccode 0x0fff 01376 #define dac_data_port_18_DESIGNVALUE 0x0000 01377 01378 /// 0x73 r/w dac_data_port_19 PIXI Port 19 Digital to Analog Converter register 01379 /// <code>xxxx111111111111</code> daccode 12-bit DAC code 01380 #define dac_data_port_19_daccode 0x0fff 01381 #define dac_data_port_19_DESIGNVALUE 0x0000 01382 01383 #endif /* _MAX11300_DESIGNVALUE_H_ */ 01384 01385 // End of file 01386
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