Diff: utility/Enc28j60Eth.cpp

Revision:

15:53715cc81c63

Parent:

14:7648334eb41b

Child:

16:269f652b4d0b

--- a/utility/Enc28j60Eth.cpp	Tue Sep 03 09:16:55 2019 +0000
+++ b/utility/Enc28j60Eth.cpp	Sat Sep 07 17:42:42 2019 +0000
@@ -57,20 +57,21 @@
  */
 void Enc28j60Eth::init(uint8_t* macaddr)
 {
-    MemPool::init();           // 1 byte in between RX_STOP_INIT and pool to allow prepending of controlbyte
+    MemPool::init();            // 1 byte in between RX_STOP_INIT and pool to allow prepending of controlbyte
+    
     // initialize SPI interface
+    _cs = 1;
     _spi.format(8, 0);          // 8-bit, mode 0
-    _spi.frequency(20000000);   // 20 Mbit/s
-    wait_ms(1000);              // 1 second for stable state
-    // Release SPI
-    _cs = 1;
+    _spi.frequency(10000000);   // 10 Mbit/s
+    wait_ms(100);               // for stable state
 
     // perform system reset
     writeOp(ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET);
 
     // check CLKRDY bit to see if reset is complete
-    //while(!(readReg(ESTAT) & ESTAT_CLKRDY));
-    // The CLKRDY does not work. See Rev. B4 Silicon Errata point. Just wait.
+    // while(!(readReg(ESTAT) & ESTAT_CLKRDY));
+    // The CLKRDY does not work. See Rev. B4 Silicon Errata point.
+    // Just wait.
     wait_ms(50);
 
     // do bank 0 stuff
@@ -90,18 +91,18 @@
 
     //All memory which is not used by the receive buffer is considered the transmission buffer.
     // No explicit action is required to initialize the transmission buffer.
-    // However, he host controller should leave at least seven bytes between each
-    // packet and the beginning of the receive buffer.
     // TX start
     //writeRegPair(ETXSTL, TXSTART_INIT);
     // TX end
     //writeRegPair(ETXNDL, TXEND_INIT);
+    // However, he host controller should leave at least seven bytes between each
+    // packet and the beginning of the receive buffer.
 
     // do bank 1 stuff, packet filter:
     // For broadcast packets we allow only ARP packtets
     // All other packets should be unicast only for our mac (MAADR)
     //
-    // The pattern to match on is therefore
+    // The pattern to match is therefore
     // Type     ETH.DST
     // ARP      BROADCAST
     // 06 08 -- ff ff ff ff ff ff -> ip checksum for theses bytes=f7f9
@@ -370,7 +371,9 @@
 
     // read data
     result = _spi.write(0x00);
+    
     _cs = 1;
+    
     return(result);
 }
 
@@ -391,6 +394,7 @@
 
     // write data
     _spi.write(data);
+    
     _cs = 1;
 }
 
@@ -458,7 +462,6 @@
     if (address & 0x80)
         result = _spi.write(0x00);
 
-    // release CS
     _cs = 1;
     return(result);
 }
@@ -478,6 +481,7 @@
 
     // write data
     _spi.write(data);
+    
     _cs = 1;
 }
 
@@ -493,15 +497,16 @@
 
     // issue read command
     _spi.write(ENC28J60_READ_BUF_MEM);
+ 
+    // read data
     while (len) {
         len--;
-
-        // read data
         *data = _spi.write(0x00);
         data++;
     }
 
     *data = '\0';
+    
     _cs = 1;
 }
 
@@ -517,10 +522,10 @@
 
     // issue write command
     _spi.write(ENC28J60_WRITE_BUF_MEM);
+
+    // write data
     while (len) {
         len--;
-
-        // write data
         _spi.write(*data);
         data++;
     }