Diff: DeviceController.h

Revision:

156:e68ee0bcdcda

Child:

161:efd949e8d536

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/DeviceController.h	Mon May 09 20:03:26 2016 +0000
@@ -0,0 +1,62 @@
+#ifndef __DEVICE_CONTROLLER_H__
+#define __DEVICE_CONTROLLER_H__
+
+#include "DeviceFlash.h"
+#include "DeviceSSP.h"
+#include "DeviceI2C.h"
+#include "DeviceQEI.h"
+#include "DeviceServicePort.h"
+#include "DeviceHostPort.h"
+//#include "DeviceDAC.h"
+#include "DeviceTimers.h"
+
+typedef struct _DeviceUARTSettings {
+  uint32_t baudRate;
+} DeviceUARTSettings;
+
+typedef struct _DeviceUARTState {
+ //Line Control Register. Contains controls for frame formatting and break generation.
+ uint8_t LCR;
+ 
+ //Divisor Latch MSB. Most significant byte of the baud rate divisor value.
+ //The full divisor is used to generate a baud rate from the fractional rate divider.
+ //When DLAB = 1
+ uint8_t DLM;
+ 
+ //Divisor Latch LSB. Least significant byte of the baud rate divisor value.
+ //The full divisor is used to generate a baud rate from the fractional rate divider.
+ //When DLAB = 1
+ uint8_t DLL;
+ 
+ //FIFO Control Register. Controls FIFO usage and modes.
+ uint8_t FCR;
+} DeviceUARTState;
+
+typedef struct _DeviceUART {
+  DeviceUARTSettings settings;
+  DeviceUARTState state;
+} DeviceUART;
+
+typedef struct _DeviceControllerSettings {
+  uint32_t chip;
+} DeviceControllerSettings;
+
+typedef struct _DeviceControllerState {
+} DeviceControllerState;
+
+typedef struct _DeviceController {
+  DeviceControllerSettings settings;
+  DeviceControllerState state;
+  DeviceFlash flash;
+  //DeviceDAC dac;
+  DeviceSSP SSP;
+  DeviceI2C I2C;
+  DeviceQEI QEI;
+  DeviceTimer timer[2];
+  DeviceUART uart[2];
+} DeviceController;
+
+void InitControllerWithDefaults(void);
+void InitController(void);
+
+#endif  /* __DEVICE_CONTROLLER_H__ */
\ No newline at end of file