Iftikhar Aziz / mbed-dev

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Dependents:   LSS_Rev_1

Fork of mbed-dev by Umar Naeem

targets/hal/TARGET_NXP/TARGET_LPC15XX/serial_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 // math.h required for floating point operations for baud rate calculation
bogdanm 0:9b334a45a8ff 17 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 18 #include <math.h>
bogdanm 0:9b334a45a8ff 19 #include <string.h>
bogdanm 0:9b334a45a8ff 20
bogdanm 0:9b334a45a8ff 21 #include "serial_api.h"
bogdanm 0:9b334a45a8ff 22 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 23 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 24 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 /******************************************************************************
bogdanm 0:9b334a45a8ff 27 * INITIALIZATION
bogdanm 0:9b334a45a8ff 28 ******************************************************************************/
bogdanm 0:9b334a45a8ff 29 #define UART_NUM 3
bogdanm 0:9b334a45a8ff 30
bogdanm 0:9b334a45a8ff 31 static const SWM_Map SWM_UART_TX[] = {
bogdanm 0:9b334a45a8ff 32 {0, 0}, // Pin assign register0, 7:0bit
bogdanm 0:9b334a45a8ff 33 {1, 8}, // Pin assign register1, 15:8bit
bogdanm 0:9b334a45a8ff 34 {2, 16}, // Pin assign register2, 23:16bit
bogdanm 0:9b334a45a8ff 35 };
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 static const SWM_Map SWM_UART_RX[] = {
bogdanm 0:9b334a45a8ff 38 {0, 8},
bogdanm 0:9b334a45a8ff 39 {1, 16},
bogdanm 0:9b334a45a8ff 40 {2, 24},
bogdanm 0:9b334a45a8ff 41 };
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 static const SWM_Map SWM_UART_RTS[] = {
bogdanm 0:9b334a45a8ff 44 {0, 16},
bogdanm 0:9b334a45a8ff 45 {1, 24},
bogdanm 0:9b334a45a8ff 46 {3, 0}, // not available
bogdanm 0:9b334a45a8ff 47 };
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 static const SWM_Map SWM_UART_CTS[] = {
bogdanm 0:9b334a45a8ff 50 {0, 24},
bogdanm 0:9b334a45a8ff 51 {2, 0},
bogdanm 0:9b334a45a8ff 52 {3, 8} // not available
bogdanm 0:9b334a45a8ff 53 };
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 // bit flags for used UARTs
bogdanm 0:9b334a45a8ff 56 static unsigned char uart_used = 0;
bogdanm 0:9b334a45a8ff 57 static int get_available_uart(void) {
bogdanm 0:9b334a45a8ff 58 int i;
bogdanm 0:9b334a45a8ff 59 for (i=0; i<3; i++) {
bogdanm 0:9b334a45a8ff 60 if ((uart_used & (1 << i)) == 0)
bogdanm 0:9b334a45a8ff 61 return i;
bogdanm 0:9b334a45a8ff 62 }
bogdanm 0:9b334a45a8ff 63 return -1;
bogdanm 0:9b334a45a8ff 64 }
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 #define UART_EN (0x01<<0)
bogdanm 0:9b334a45a8ff 67
bogdanm 0:9b334a45a8ff 68 #define CTS_DELTA (0x01<<5)
bogdanm 0:9b334a45a8ff 69 #define RXBRK (0x01<<10)
bogdanm 0:9b334a45a8ff 70 #define DELTA_RXBRK (0x01<<11)
bogdanm 0:9b334a45a8ff 71
bogdanm 0:9b334a45a8ff 72 #define RXRDY (0x01<<0)
bogdanm 0:9b334a45a8ff 73 #define TXRDY (0x01<<2)
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 #define TXBRKEN (0x01<<1)
bogdanm 0:9b334a45a8ff 76 #define CTSEN (0x01<<9)
bogdanm 0:9b334a45a8ff 77
bogdanm 0:9b334a45a8ff 78 static uint32_t UARTSysClk;
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 static uint32_t serial_irq_ids[UART_NUM] = {0};
bogdanm 0:9b334a45a8ff 81 static uart_irq_handler irq_handler;
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 int stdio_uart_inited = 0;
bogdanm 0:9b334a45a8ff 84 serial_t stdio_uart;
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 static void switch_pin(const SWM_Map *swm, PinName pn)
bogdanm 0:9b334a45a8ff 87 {
bogdanm 0:9b334a45a8ff 88 uint32_t regVal;
bogdanm 0:9b334a45a8ff 89 if (pn != NC)
bogdanm 0:9b334a45a8ff 90 {
bogdanm 0:9b334a45a8ff 91 // check if we have any function mapped to this pin already and remove it
bogdanm 0:9b334a45a8ff 92 for (uint32_t n = 0; n < sizeof(LPC_SWM->PINASSIGN)/sizeof(*LPC_SWM->PINASSIGN); n ++) {
bogdanm 0:9b334a45a8ff 93 regVal = LPC_SWM->PINASSIGN[n];
bogdanm 0:9b334a45a8ff 94 for (uint32_t j = 0; j <= 24; j += 8) {
bogdanm 0:9b334a45a8ff 95 if (((regVal >> j) & 0xFF) == (uint32_t)pn)
bogdanm 0:9b334a45a8ff 96 regVal |= (0xFF << j);
bogdanm 0:9b334a45a8ff 97 }
bogdanm 0:9b334a45a8ff 98 LPC_SWM->PINASSIGN[n] = regVal;
bogdanm 0:9b334a45a8ff 99 }
bogdanm 0:9b334a45a8ff 100 }
bogdanm 0:9b334a45a8ff 101 // now map it
bogdanm 0:9b334a45a8ff 102 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
bogdanm 0:9b334a45a8ff 103 LPC_SWM->PINASSIGN[swm->n] = regVal | (pn << swm->offset);
bogdanm 0:9b334a45a8ff 104 }
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 void serial_init(serial_t *obj, PinName tx, PinName rx) {
bogdanm 0:9b334a45a8ff 107 int is_stdio_uart = 0;
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 int uart_n = get_available_uart();
bogdanm 0:9b334a45a8ff 110 if (uart_n == -1) {
bogdanm 0:9b334a45a8ff 111 error("No available UART");
bogdanm 0:9b334a45a8ff 112 }
bogdanm 0:9b334a45a8ff 113 obj->index = uart_n;
bogdanm 0:9b334a45a8ff 114 switch (uart_n) {
bogdanm 0:9b334a45a8ff 115 case 0: obj->uart = (LPC_USART0_Type *)LPC_USART0_BASE; break;
bogdanm 0:9b334a45a8ff 116 case 1: obj->uart = (LPC_USART0_Type *)LPC_USART1_BASE; break;
bogdanm 0:9b334a45a8ff 117 case 2: obj->uart = (LPC_USART0_Type *)LPC_USART2_BASE; break;
bogdanm 0:9b334a45a8ff 118 }
bogdanm 0:9b334a45a8ff 119 uart_used |= (1 << uart_n);
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 switch_pin(&SWM_UART_TX[uart_n], tx);
bogdanm 0:9b334a45a8ff 122 switch_pin(&SWM_UART_RX[uart_n], rx);
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 /* uart clock divided by 6 */
bogdanm 0:9b334a45a8ff 125 LPC_SYSCON->UARTCLKDIV =6;
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 /* disable uart interrupts */
bogdanm 0:9b334a45a8ff 128 NVIC_DisableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 /* Enable UART clock */
bogdanm 0:9b334a45a8ff 131 LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << (17 + uart_n));
bogdanm 0:9b334a45a8ff 132
bogdanm 0:9b334a45a8ff 133 /* Peripheral reset control to UART, a "1" bring it out of reset. */
bogdanm 0:9b334a45a8ff 134 LPC_SYSCON->PRESETCTRL1 |= (0x1 << (17 + uart_n));
bogdanm 0:9b334a45a8ff 135 LPC_SYSCON->PRESETCTRL1 &= ~(0x1 << (17 + uart_n));
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 UARTSysClk = SystemCoreClock / LPC_SYSCON->UARTCLKDIV;
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 // set default baud rate and format
bogdanm 0:9b334a45a8ff 140 serial_baud (obj, 9600);
bogdanm 0:9b334a45a8ff 141 serial_format(obj, 8, ParityNone, 1);
bogdanm 0:9b334a45a8ff 142
bogdanm 0:9b334a45a8ff 143 /* Clear all status bits. */
bogdanm 0:9b334a45a8ff 144 obj->uart->STAT = CTS_DELTA | DELTA_RXBRK;
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 /* enable uart interrupts */
bogdanm 0:9b334a45a8ff 147 NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
bogdanm 0:9b334a45a8ff 148
bogdanm 0:9b334a45a8ff 149 /* Enable UART */
bogdanm 0:9b334a45a8ff 150 obj->uart->CFG |= UART_EN;
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152 is_stdio_uart = ((tx == USBTX) && (rx == USBRX));
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 if (is_stdio_uart) {
bogdanm 0:9b334a45a8ff 155 stdio_uart_inited = 1;
bogdanm 0:9b334a45a8ff 156 memcpy(&stdio_uart, obj, sizeof(serial_t));
bogdanm 0:9b334a45a8ff 157 }
bogdanm 0:9b334a45a8ff 158 }
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 void serial_free(serial_t *obj) {
bogdanm 0:9b334a45a8ff 161 uart_used &= ~(1 << obj->index);
bogdanm 0:9b334a45a8ff 162 serial_irq_ids[obj->index] = 0;
bogdanm 0:9b334a45a8ff 163 }
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 // serial_baud
bogdanm 0:9b334a45a8ff 166 // set the baud rate, taking in to account the current SystemFrequency
bogdanm 0:9b334a45a8ff 167 void serial_baud(serial_t *obj, int baudrate) {
bogdanm 0:9b334a45a8ff 168 /* Integer divider:
bogdanm 0:9b334a45a8ff 169 BRG = UARTSysClk/(Baudrate * 16) - 1
bogdanm 0:9b334a45a8ff 170
bogdanm 0:9b334a45a8ff 171 Frational divider:
bogdanm 0:9b334a45a8ff 172 FRG = ((UARTSysClk / (Baudrate * 16 * (BRG + 1))) - 1)
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174 where
bogdanm 0:9b334a45a8ff 175 FRG = (LPC_SYSCON->UARTFRDADD + 1) / (LPC_SYSCON->UARTFRDSUB + 1)
bogdanm 0:9b334a45a8ff 176
bogdanm 0:9b334a45a8ff 177 (1) The easiest way is set SUB value to 256, -1 encoded, thus SUB
bogdanm 0:9b334a45a8ff 178 register is 0xFF.
bogdanm 0:9b334a45a8ff 179 (2) In ADD register value, depending on the value of UartSysClk,
bogdanm 0:9b334a45a8ff 180 baudrate, BRG register value, and SUB register value, be careful
bogdanm 0:9b334a45a8ff 181 about the order of multiplier and divider and make sure any
bogdanm 0:9b334a45a8ff 182 multiplier doesn't exceed 32-bit boundary and any divider doesn't get
bogdanm 0:9b334a45a8ff 183 down below one(integer 0).
bogdanm 0:9b334a45a8ff 184 (3) ADD should be always less than SUB.
bogdanm 0:9b334a45a8ff 185 */
bogdanm 0:9b334a45a8ff 186 obj->uart->BRG = UARTSysClk / 16 / baudrate - 1;
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 // To use of the fractional baud rate generator, you must write 0xFF to the DIV
bogdanm 0:9b334a45a8ff 189 // value to yield a denominator value of 256. All other values are not supported.
bogdanm 0:9b334a45a8ff 190 LPC_SYSCON->FRGCTRL = 0xFF;
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 LPC_SYSCON->FRGCTRL |= ( ( ((UARTSysClk / 16) * (0xFF + 1)) /
bogdanm 0:9b334a45a8ff 193 (baudrate * (obj->uart->BRG + 1))
bogdanm 0:9b334a45a8ff 194 ) - (0xFF + 1) ) << 8;
bogdanm 0:9b334a45a8ff 195
bogdanm 0:9b334a45a8ff 196 }
bogdanm 0:9b334a45a8ff 197
bogdanm 0:9b334a45a8ff 198 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
bogdanm 0:9b334a45a8ff 199 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
bogdanm 0:9b334a45a8ff 200 MBED_ASSERT((data_bits > 6) && (data_bits < 10)); // 0: 7 data bits ... 2: 9 data bits
bogdanm 0:9b334a45a8ff 201 MBED_ASSERT((parity == ParityNone) || (parity == ParityEven) || (parity == ParityOdd));
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 stop_bits -= 1;
bogdanm 0:9b334a45a8ff 204 data_bits -= 7;
bogdanm 0:9b334a45a8ff 205
bogdanm 0:9b334a45a8ff 206 int paritysel;
bogdanm 0:9b334a45a8ff 207 switch (parity) {
bogdanm 0:9b334a45a8ff 208 case ParityNone: paritysel = 0; break;
bogdanm 0:9b334a45a8ff 209 case ParityEven: paritysel = 2; break;
bogdanm 0:9b334a45a8ff 210 case ParityOdd : paritysel = 3; break;
bogdanm 0:9b334a45a8ff 211 default:
bogdanm 0:9b334a45a8ff 212 break;
bogdanm 0:9b334a45a8ff 213 }
bogdanm 0:9b334a45a8ff 214
bogdanm 0:9b334a45a8ff 215 // First disable the the usart as described in documentation and then enable while updating CFG
bogdanm 0:9b334a45a8ff 216
bogdanm 0:9b334a45a8ff 217 // 24.6.1 USART Configuration register
bogdanm 0:9b334a45a8ff 218 // Remark: If software needs to change configuration values, the following sequence should
bogdanm 0:9b334a45a8ff 219 // be used: 1) Make sure the USART is not currently sending or receiving data. 2) Disable
bogdanm 0:9b334a45a8ff 220 // the USART by writing a 0 to the Enable bit (0 may be written to the entire register). 3)
bogdanm 0:9b334a45a8ff 221 // Write the new configuration value, with the ENABLE bit set to 1.
bogdanm 0:9b334a45a8ff 222 obj->uart->CFG &= ~(1 << 0);
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224 obj->uart->CFG = (1 << 0) // this will enable the usart
bogdanm 0:9b334a45a8ff 225 | (data_bits << 2)
bogdanm 0:9b334a45a8ff 226 | (paritysel << 4)
bogdanm 0:9b334a45a8ff 227 | (stop_bits << 6);
bogdanm 0:9b334a45a8ff 228 }
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 /******************************************************************************
bogdanm 0:9b334a45a8ff 231 * INTERRUPTS HANDLING
bogdanm 0:9b334a45a8ff 232 ******************************************************************************/
bogdanm 0:9b334a45a8ff 233 static inline void uart_irq(SerialIrq irq_type, uint32_t index) {
bogdanm 0:9b334a45a8ff 234 if (serial_irq_ids[index] != 0)
bogdanm 0:9b334a45a8ff 235 irq_handler(serial_irq_ids[index], irq_type);
bogdanm 0:9b334a45a8ff 236 }
bogdanm 0:9b334a45a8ff 237
bogdanm 0:9b334a45a8ff 238 void uart0_irq() {uart_irq((LPC_USART0->INTSTAT & 1) ? RxIrq : TxIrq, 0);}
bogdanm 0:9b334a45a8ff 239 void uart1_irq() {uart_irq((LPC_USART1->INTSTAT & 1) ? RxIrq : TxIrq, 1);}
bogdanm 0:9b334a45a8ff 240 void uart2_irq() {uart_irq((LPC_USART2->INTSTAT & 1) ? RxIrq : TxIrq, 2);}
bogdanm 0:9b334a45a8ff 241
bogdanm 0:9b334a45a8ff 242 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
bogdanm 0:9b334a45a8ff 243 irq_handler = handler;
bogdanm 0:9b334a45a8ff 244 serial_irq_ids[obj->index] = id;
bogdanm 0:9b334a45a8ff 245 }
bogdanm 0:9b334a45a8ff 246
bogdanm 0:9b334a45a8ff 247 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
bogdanm 0:9b334a45a8ff 248 IRQn_Type irq_n = (IRQn_Type)0;
bogdanm 0:9b334a45a8ff 249 uint32_t vector = 0;
bogdanm 0:9b334a45a8ff 250 switch ((int)obj->uart) {
bogdanm 0:9b334a45a8ff 251 case LPC_USART0_BASE: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
bogdanm 0:9b334a45a8ff 252 case LPC_USART1_BASE: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
bogdanm 0:9b334a45a8ff 253 case LPC_USART2_BASE: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
bogdanm 0:9b334a45a8ff 254 }
bogdanm 0:9b334a45a8ff 255
bogdanm 0:9b334a45a8ff 256 if (enable) {
bogdanm 0:9b334a45a8ff 257 NVIC_DisableIRQ(irq_n);
bogdanm 0:9b334a45a8ff 258 obj->uart->INTENSET |= (1 << ((irq == RxIrq) ? 0 : 2));
bogdanm 0:9b334a45a8ff 259 NVIC_SetVector(irq_n, vector);
bogdanm 0:9b334a45a8ff 260 NVIC_EnableIRQ(irq_n);
bogdanm 0:9b334a45a8ff 261 } else { // disable
bogdanm 0:9b334a45a8ff 262 int all_disabled = 0;
bogdanm 0:9b334a45a8ff 263 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
bogdanm 0:9b334a45a8ff 264 obj->uart->INTENCLR |= (1 << ((irq == RxIrq) ? 0 : 2)); // disable the interrupt
bogdanm 0:9b334a45a8ff 265 all_disabled = (obj->uart->INTENSET & (1 << ((other_irq == RxIrq) ? 0 : 2))) == 0;
bogdanm 0:9b334a45a8ff 266 if (all_disabled)
bogdanm 0:9b334a45a8ff 267 NVIC_DisableIRQ(irq_n);
bogdanm 0:9b334a45a8ff 268 }
bogdanm 0:9b334a45a8ff 269 }
bogdanm 0:9b334a45a8ff 270
bogdanm 0:9b334a45a8ff 271 /******************************************************************************
bogdanm 0:9b334a45a8ff 272 * READ/WRITE
bogdanm 0:9b334a45a8ff 273 ******************************************************************************/
bogdanm 0:9b334a45a8ff 274 int serial_getc(serial_t *obj) {
bogdanm 0:9b334a45a8ff 275 while (!serial_readable(obj));
bogdanm 0:9b334a45a8ff 276 return obj->uart->RXDATA;
bogdanm 0:9b334a45a8ff 277 }
bogdanm 0:9b334a45a8ff 278
bogdanm 0:9b334a45a8ff 279 void serial_putc(serial_t *obj, int c) {
bogdanm 0:9b334a45a8ff 280 while (!serial_writable(obj));
bogdanm 0:9b334a45a8ff 281 obj->uart->TXDATA = c;
bogdanm 0:9b334a45a8ff 282 }
bogdanm 0:9b334a45a8ff 283
bogdanm 0:9b334a45a8ff 284 int serial_readable(serial_t *obj) {
bogdanm 0:9b334a45a8ff 285 return obj->uart->STAT & RXRDY;
bogdanm 0:9b334a45a8ff 286 }
bogdanm 0:9b334a45a8ff 287
bogdanm 0:9b334a45a8ff 288 int serial_writable(serial_t *obj) {
bogdanm 0:9b334a45a8ff 289 return obj->uart->STAT & TXRDY;
bogdanm 0:9b334a45a8ff 290 }
bogdanm 0:9b334a45a8ff 291
bogdanm 0:9b334a45a8ff 292 void serial_clear(serial_t *obj) {
bogdanm 0:9b334a45a8ff 293 // [TODO]
bogdanm 0:9b334a45a8ff 294 }
bogdanm 0:9b334a45a8ff 295
bogdanm 0:9b334a45a8ff 296 void serial_pinout_tx(PinName tx) {
bogdanm 0:9b334a45a8ff 297
bogdanm 0:9b334a45a8ff 298 }
bogdanm 0:9b334a45a8ff 299
bogdanm 0:9b334a45a8ff 300 void serial_break_set(serial_t *obj) {
bogdanm 0:9b334a45a8ff 301 obj->uart->CTRL |= TXBRKEN;
bogdanm 0:9b334a45a8ff 302 }
bogdanm 0:9b334a45a8ff 303
bogdanm 0:9b334a45a8ff 304 void serial_break_clear(serial_t *obj) {
bogdanm 0:9b334a45a8ff 305 obj->uart->CTRL &= ~TXBRKEN;
bogdanm 0:9b334a45a8ff 306 }
bogdanm 0:9b334a45a8ff 307
bogdanm 0:9b334a45a8ff 308 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
bogdanm 0:9b334a45a8ff 309 if ((FlowControlNone == type || FlowControlRTS == type)) txflow = NC;
bogdanm 0:9b334a45a8ff 310 if ((FlowControlNone == type || FlowControlCTS == type)) rxflow = NC;
bogdanm 0:9b334a45a8ff 311 switch_pin(&SWM_UART_RTS[obj->index], rxflow);
bogdanm 0:9b334a45a8ff 312 switch_pin(&SWM_UART_CTS[obj->index], txflow);
bogdanm 0:9b334a45a8ff 313 if (txflow == NC) obj->uart->CFG &= ~CTSEN;
bogdanm 0:9b334a45a8ff 314 else obj->uart->CFG |= CTSEN;
bogdanm 0:9b334a45a8ff 315 }
bogdanm 0:9b334a45a8ff 316