Iftikhar Aziz / mbed-dev

Dependents:   LSS_Rev_1

Fork of mbed-dev by Umar Naeem

Committer:
iftaziz
Date:
Wed Aug 23 10:32:38 2017 +0000
Revision:
166:33361e55dd8c
Parent:
157:ff67d9f36b67
r1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 157:ff67d9f36b67 1 /*******************************************************************************
<> 157:ff67d9f36b67 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 157:ff67d9f36b67 3 *
<> 157:ff67d9f36b67 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 157:ff67d9f36b67 5 * copy of this software and associated documentation files (the "Software"),
<> 157:ff67d9f36b67 6 * to deal in the Software without restriction, including without limitation
<> 157:ff67d9f36b67 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 157:ff67d9f36b67 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 157:ff67d9f36b67 9 * Software is furnished to do so, subject to the following conditions:
<> 157:ff67d9f36b67 10 *
<> 157:ff67d9f36b67 11 * The above copyright notice and this permission notice shall be included
<> 157:ff67d9f36b67 12 * in all copies or substantial portions of the Software.
<> 157:ff67d9f36b67 13 *
<> 157:ff67d9f36b67 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 157:ff67d9f36b67 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 157:ff67d9f36b67 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 157:ff67d9f36b67 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 157:ff67d9f36b67 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 157:ff67d9f36b67 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 157:ff67d9f36b67 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 157:ff67d9f36b67 21 *
<> 157:ff67d9f36b67 22 * Except as contained in this notice, the name of Maxim Integrated
<> 157:ff67d9f36b67 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 157:ff67d9f36b67 24 * Products, Inc. Branding Policy.
<> 157:ff67d9f36b67 25 *
<> 157:ff67d9f36b67 26 * The mere transfer of this software does not imply any licenses
<> 157:ff67d9f36b67 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 157:ff67d9f36b67 28 * trademarks, maskwork rights, or any other form of intellectual
<> 157:ff67d9f36b67 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 157:ff67d9f36b67 30 * ownership rights.
<> 157:ff67d9f36b67 31 *
<> 157:ff67d9f36b67 32 * $Date: 2016-03-11 11:46:02 -0600 (Fri, 11 Mar 2016) $
<> 157:ff67d9f36b67 33 * $Revision: 21838 $
<> 157:ff67d9f36b67 34 *
<> 157:ff67d9f36b67 35 ******************************************************************************/
<> 157:ff67d9f36b67 36
<> 157:ff67d9f36b67 37 #ifndef _MXC_USB_REGS_H_
<> 157:ff67d9f36b67 38 #define _MXC_USB_REGS_H_
<> 157:ff67d9f36b67 39
<> 157:ff67d9f36b67 40 #ifdef __cplusplus
<> 157:ff67d9f36b67 41 extern "C" {
<> 157:ff67d9f36b67 42 #endif
<> 157:ff67d9f36b67 43
<> 157:ff67d9f36b67 44 #include <stdint.h>
<> 157:ff67d9f36b67 45
<> 157:ff67d9f36b67 46 /*
<> 157:ff67d9f36b67 47 If types are not defined elsewhere (CMSIS) define them here
<> 157:ff67d9f36b67 48 */
<> 157:ff67d9f36b67 49 #ifndef __IO
<> 157:ff67d9f36b67 50 #define __IO volatile
<> 157:ff67d9f36b67 51 #endif
<> 157:ff67d9f36b67 52 #ifndef __I
<> 157:ff67d9f36b67 53 #define __I volatile const
<> 157:ff67d9f36b67 54 #endif
<> 157:ff67d9f36b67 55 #ifndef __O
<> 157:ff67d9f36b67 56 #define __O volatile
<> 157:ff67d9f36b67 57 #endif
<> 157:ff67d9f36b67 58 #ifndef __RO
<> 157:ff67d9f36b67 59 #define __RO volatile const
<> 157:ff67d9f36b67 60 #endif
<> 157:ff67d9f36b67 61
<> 157:ff67d9f36b67 62
<> 157:ff67d9f36b67 63 #define MXC_V_USB_EP_DIR_DISABLE ((uint32_t)0x00000000UL)
<> 157:ff67d9f36b67 64 #define MXC_V_USB_EP_DIR_OUT ((uint32_t)0x00000001UL)
<> 157:ff67d9f36b67 65 #define MXC_V_USB_EP_DIR_IN ((uint32_t)0x00000002UL)
<> 157:ff67d9f36b67 66 #define MXC_V_USB_EP_DIR_CONTROL ((uint32_t)0x00000003UL)
<> 157:ff67d9f36b67 67
<> 157:ff67d9f36b67 68 #define MXC_S_USB_EP_DIR_DISABLE (MXC_V_USB_EP_DIR_DISABLE << MXC_F_USB_EP_DIR_POS)
<> 157:ff67d9f36b67 69 #define MXC_S_USB_EP_DIR_OUT (MXC_V_USB_EP_DIR_OUT << MXC_F_USB_EP_DIR_POS)
<> 157:ff67d9f36b67 70 #define MXC_S_USB_EP_DIR_IN (MXC_V_USB_EP_DIR_IN << MXC_F_USB_EP_DIR_POS)
<> 157:ff67d9f36b67 71 #define MXC_S_USB_EP_DIR_CONTROL (MXC_V_USB_EP_DIR_CONTROL << MXC_F_USB_EP_DIR_POS)
<> 157:ff67d9f36b67 72
<> 157:ff67d9f36b67 73 /*
<> 157:ff67d9f36b67 74 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
<> 157:ff67d9f36b67 75 access to each register in module.
<> 157:ff67d9f36b67 76 */
<> 157:ff67d9f36b67 77
<> 157:ff67d9f36b67 78 /* Offset Register Description
<> 157:ff67d9f36b67 79 ============= ============================================================================ */
<> 157:ff67d9f36b67 80 typedef struct {
<> 157:ff67d9f36b67 81 __IO uint32_t cn; /* 0x0000 USB Control Register */
<> 157:ff67d9f36b67 82 __RO uint32_t rsv004[127]; /* 0x0004-0x01FC */
<> 157:ff67d9f36b67 83 __IO uint32_t dev_addr; /* 0x0200 USB Device Address Register */
<> 157:ff67d9f36b67 84 __IO uint32_t dev_cn; /* 0x0204 USB Device Control Register */
<> 157:ff67d9f36b67 85 __IO uint32_t dev_intfl; /* 0x0208 USB Device Interrupt */
<> 157:ff67d9f36b67 86 __IO uint32_t dev_inten; /* 0x020C USB Device Interrupt Enable */
<> 157:ff67d9f36b67 87 __RO uint32_t rsv210[4]; /* 0x0210-0x021C */
<> 157:ff67d9f36b67 88 __IO uint32_t ep_base; /* 0x0220 USB Endpoint Descriptor Table Base Address */
<> 157:ff67d9f36b67 89 __IO uint32_t cur_buf; /* 0x0224 USB Current Endpoint Buffer Register */
<> 157:ff67d9f36b67 90 __IO uint32_t in_owner; /* 0x0228 USB IN Endpoint Buffer Owner Register */
<> 157:ff67d9f36b67 91 __IO uint32_t out_owner; /* 0x022C USB OUT Endpoint Buffer Owner Register */
<> 157:ff67d9f36b67 92 __IO uint32_t in_int; /* 0x0230 USB IN Endpoint Buffer Available Interrupt */
<> 157:ff67d9f36b67 93 __IO uint32_t out_int; /* 0x0234 USB OUT Endpoint Data Available Interrupt */
<> 157:ff67d9f36b67 94 __IO uint32_t nak_int; /* 0x0238 USB IN Endpoint NAK Interrupt */
<> 157:ff67d9f36b67 95 __IO uint32_t dma_err_int; /* 0x023C USB DMA Error Interrupt */
<> 157:ff67d9f36b67 96 __IO uint32_t buf_ovr_int; /* 0x0240 USB Buffer Overflow Interrupt */
<> 157:ff67d9f36b67 97 __RO uint32_t rsv244[7]; /* 0x0244-0x025C */
<> 157:ff67d9f36b67 98 __IO uint32_t setup0; /* 0x0260 USB SETUP Packet Bytes 0 to 3 */
<> 157:ff67d9f36b67 99 __IO uint32_t setup1; /* 0x0264 USB SETUP Packet Bytes 4 to 7 */
<> 157:ff67d9f36b67 100 __RO uint32_t rsv268[6]; /* 0x0268-0x027C */
<> 157:ff67d9f36b67 101 __IO uint32_t ep[8]; /* 0x0280-0x029C USB Endpoint[n] Control Register */
<> 157:ff67d9f36b67 102 } mxc_usb_regs_t;
<> 157:ff67d9f36b67 103
<> 157:ff67d9f36b67 104
<> 157:ff67d9f36b67 105 /*
<> 157:ff67d9f36b67 106 Register offsets for module USB.
<> 157:ff67d9f36b67 107 */
<> 157:ff67d9f36b67 108
<> 157:ff67d9f36b67 109 #define MXC_R_USB_OFFS_CN ((uint32_t)0x00000000UL)
<> 157:ff67d9f36b67 110 #define MXC_R_USB_OFFS_DEV_ADDR ((uint32_t)0x00000200UL)
<> 157:ff67d9f36b67 111 #define MXC_R_USB_OFFS_DEV_CN ((uint32_t)0x00000204UL)
<> 157:ff67d9f36b67 112 #define MXC_R_USB_OFFS_DEV_INTFL ((uint32_t)0x00000208UL)
<> 157:ff67d9f36b67 113 #define MXC_R_USB_OFFS_DEV_INTEN ((uint32_t)0x0000020CUL)
<> 157:ff67d9f36b67 114 #define MXC_R_USB_OFFS_EP_BASE ((uint32_t)0x00000220UL)
<> 157:ff67d9f36b67 115 #define MXC_R_USB_OFFS_CUR_BUF ((uint32_t)0x00000224UL)
<> 157:ff67d9f36b67 116 #define MXC_R_USB_OFFS_IN_OWNER ((uint32_t)0x00000228UL)
<> 157:ff67d9f36b67 117 #define MXC_R_USB_OFFS_OUT_OWNER ((uint32_t)0x0000022CUL)
<> 157:ff67d9f36b67 118 #define MXC_R_USB_OFFS_IN_INT ((uint32_t)0x00000230UL)
<> 157:ff67d9f36b67 119 #define MXC_R_USB_OFFS_OUT_INT ((uint32_t)0x00000234UL)
<> 157:ff67d9f36b67 120 #define MXC_R_USB_OFFS_NAK_INT ((uint32_t)0x00000238UL)
<> 157:ff67d9f36b67 121 #define MXC_R_USB_OFFS_DMA_ERR_INT ((uint32_t)0x0000023CUL)
<> 157:ff67d9f36b67 122 #define MXC_R_USB_OFFS_BUF_OVR_INT ((uint32_t)0x00000240UL)
<> 157:ff67d9f36b67 123 #define MXC_R_USB_OFFS_SETUP0 ((uint32_t)0x00000260UL)
<> 157:ff67d9f36b67 124 #define MXC_R_USB_OFFS_SETUP1 ((uint32_t)0x00000264UL)
<> 157:ff67d9f36b67 125 #define MXC_R_USB_OFFS_EP0 ((uint32_t)0x00000280UL)
<> 157:ff67d9f36b67 126 #define MXC_R_USB_OFFS_EP1 ((uint32_t)0x00000284UL)
<> 157:ff67d9f36b67 127 #define MXC_R_USB_OFFS_EP2 ((uint32_t)0x00000288UL)
<> 157:ff67d9f36b67 128 #define MXC_R_USB_OFFS_EP3 ((uint32_t)0x0000028CUL)
<> 157:ff67d9f36b67 129 #define MXC_R_USB_OFFS_EP4 ((uint32_t)0x00000290UL)
<> 157:ff67d9f36b67 130 #define MXC_R_USB_OFFS_EP5 ((uint32_t)0x00000294UL)
<> 157:ff67d9f36b67 131 #define MXC_R_USB_OFFS_EP6 ((uint32_t)0x00000298UL)
<> 157:ff67d9f36b67 132 #define MXC_R_USB_OFFS_EP7 ((uint32_t)0x0000029CUL)
<> 157:ff67d9f36b67 133
<> 157:ff67d9f36b67 134
<> 157:ff67d9f36b67 135 /*
<> 157:ff67d9f36b67 136 Field positions and masks for module USB.
<> 157:ff67d9f36b67 137 */
<> 157:ff67d9f36b67 138
<> 157:ff67d9f36b67 139 #define MXC_F_USB_CN_USB_EN_POS 0
<> 157:ff67d9f36b67 140 #define MXC_F_USB_CN_USB_EN ((uint32_t)(0x00000001UL << MXC_F_USB_CN_USB_EN_POS))
<> 157:ff67d9f36b67 141 #define MXC_F_USB_CN_HOST_POS 1
<> 157:ff67d9f36b67 142 #define MXC_F_USB_CN_HOST ((uint32_t)(0x00000001UL << MXC_F_USB_CN_HOST_POS))
<> 157:ff67d9f36b67 143
<> 157:ff67d9f36b67 144 #define MXC_F_USB_DEV_ADDR_DEV_ADDR_POS 0
<> 157:ff67d9f36b67 145 #define MXC_F_USB_DEV_ADDR_DEV_ADDR ((uint32_t)(0x0000007FUL << MXC_F_USB_DEV_ADDR_DEV_ADDR_POS))
<> 157:ff67d9f36b67 146
<> 157:ff67d9f36b67 147 #define MXC_F_USB_DEV_CN_SIGRWU_POS 2
<> 157:ff67d9f36b67 148 #define MXC_F_USB_DEV_CN_SIGRWU ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_SIGRWU_POS))
<> 157:ff67d9f36b67 149 #define MXC_F_USB_DEV_CN_CONNECT_POS 3
<> 157:ff67d9f36b67 150 #define MXC_F_USB_DEV_CN_CONNECT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_CONNECT_POS))
<> 157:ff67d9f36b67 151 #define MXC_F_USB_DEV_CN_ULPM_POS 4
<> 157:ff67d9f36b67 152 #define MXC_F_USB_DEV_CN_ULPM ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_ULPM_POS))
<> 157:ff67d9f36b67 153 #define MXC_F_USB_DEV_CN_URST_POS 5
<> 157:ff67d9f36b67 154 #define MXC_F_USB_DEV_CN_URST ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_URST_POS))
<> 157:ff67d9f36b67 155 #define MXC_F_USB_DEV_CN_VBGATE_POS 6
<> 157:ff67d9f36b67 156 #define MXC_F_USB_DEV_CN_VBGATE ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_VBGATE_POS))
<> 157:ff67d9f36b67 157 #define MXC_F_USB_DEV_CN_OSCEN_POS 7
<> 157:ff67d9f36b67 158 #define MXC_F_USB_DEV_CN_OSCEN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_OSCEN_POS))
<> 157:ff67d9f36b67 159 #define MXC_F_USB_DEV_CN_BACT_OE_POS 8
<> 157:ff67d9f36b67 160 #define MXC_F_USB_DEV_CN_BACT_OE ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_BACT_OE_POS))
<> 157:ff67d9f36b67 161 #define MXC_F_USB_DEV_CN_FIFO_MODE_POS 9
<> 157:ff67d9f36b67 162 #define MXC_F_USB_DEV_CN_FIFO_MODE ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_FIFO_MODE_POS))
<> 157:ff67d9f36b67 163
<> 157:ff67d9f36b67 164 #define MXC_F_USB_DEV_INTFL_DPACT_POS 0
<> 157:ff67d9f36b67 165 #define MXC_F_USB_DEV_INTFL_DPACT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_DPACT_POS))
<> 157:ff67d9f36b67 166 #define MXC_F_USB_DEV_INTFL_RWU_DN_POS 1
<> 157:ff67d9f36b67 167 #define MXC_F_USB_DEV_INTFL_RWU_DN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_RWU_DN_POS))
<> 157:ff67d9f36b67 168 #define MXC_F_USB_DEV_INTFL_BACT_POS 2
<> 157:ff67d9f36b67 169 #define MXC_F_USB_DEV_INTFL_BACT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BACT_POS))
<> 157:ff67d9f36b67 170 #define MXC_F_USB_DEV_INTFL_BRST_POS 3
<> 157:ff67d9f36b67 171 #define MXC_F_USB_DEV_INTFL_BRST ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BRST_POS))
<> 157:ff67d9f36b67 172 #define MXC_F_USB_DEV_INTFL_SUSP_POS 4
<> 157:ff67d9f36b67 173 #define MXC_F_USB_DEV_INTFL_SUSP ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_SUSP_POS))
<> 157:ff67d9f36b67 174 #define MXC_F_USB_DEV_INTFL_NO_VBUS_POS 5
<> 157:ff67d9f36b67 175 #define MXC_F_USB_DEV_INTFL_NO_VBUS ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_NO_VBUS_POS))
<> 157:ff67d9f36b67 176 #define MXC_F_USB_DEV_INTFL_VBUS_POS 6
<> 157:ff67d9f36b67 177 #define MXC_F_USB_DEV_INTFL_VBUS ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_VBUS_POS))
<> 157:ff67d9f36b67 178 #define MXC_F_USB_DEV_INTFL_BRST_DN_POS 7
<> 157:ff67d9f36b67 179 #define MXC_F_USB_DEV_INTFL_BRST_DN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BRST_DN_POS))
<> 157:ff67d9f36b67 180 #define MXC_F_USB_DEV_INTFL_SETUP_POS 8
<> 157:ff67d9f36b67 181 #define MXC_F_USB_DEV_INTFL_SETUP ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_SETUP_POS))
<> 157:ff67d9f36b67 182 #define MXC_F_USB_DEV_INTFL_EP_IN_POS 9
<> 157:ff67d9f36b67 183 #define MXC_F_USB_DEV_INTFL_EP_IN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_EP_IN_POS))
<> 157:ff67d9f36b67 184 #define MXC_F_USB_DEV_INTFL_EP_OUT_POS 10
<> 157:ff67d9f36b67 185 #define MXC_F_USB_DEV_INTFL_EP_OUT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_EP_OUT_POS))
<> 157:ff67d9f36b67 186 #define MXC_F_USB_DEV_INTFL_EP_NAK_POS 11
<> 157:ff67d9f36b67 187 #define MXC_F_USB_DEV_INTFL_EP_NAK ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_EP_NAK_POS))
<> 157:ff67d9f36b67 188 #define MXC_F_USB_DEV_INTFL_DMA_ERR_POS 12
<> 157:ff67d9f36b67 189 #define MXC_F_USB_DEV_INTFL_DMA_ERR ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_DMA_ERR_POS))
<> 157:ff67d9f36b67 190 #define MXC_F_USB_DEV_INTFL_BUF_OVR_POS 13
<> 157:ff67d9f36b67 191 #define MXC_F_USB_DEV_INTFL_BUF_OVR ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BUF_OVR_POS))
<> 157:ff67d9f36b67 192 #define MXC_F_USB_DEV_INTFL_VBUS_ST_POS 16
<> 157:ff67d9f36b67 193 #define MXC_F_USB_DEV_INTFL_VBUS_ST ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_VBUS_ST_POS))
<> 157:ff67d9f36b67 194
<> 157:ff67d9f36b67 195 #define MXC_F_USB_DEV_INTEN_DPACT_POS 0
<> 157:ff67d9f36b67 196 #define MXC_F_USB_DEV_INTEN_DPACT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_DPACT_POS))
<> 157:ff67d9f36b67 197 #define MXC_F_USB_DEV_INTEN_RWU_DN_POS 1
<> 157:ff67d9f36b67 198 #define MXC_F_USB_DEV_INTEN_RWU_DN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_RWU_DN_POS))
<> 157:ff67d9f36b67 199 #define MXC_F_USB_DEV_INTEN_BACT_POS 2
<> 157:ff67d9f36b67 200 #define MXC_F_USB_DEV_INTEN_BACT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BACT_POS))
<> 157:ff67d9f36b67 201 #define MXC_F_USB_DEV_INTEN_BRST_POS 3
<> 157:ff67d9f36b67 202 #define MXC_F_USB_DEV_INTEN_BRST ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BRST_POS))
<> 157:ff67d9f36b67 203 #define MXC_F_USB_DEV_INTEN_SUSP_POS 4
<> 157:ff67d9f36b67 204 #define MXC_F_USB_DEV_INTEN_SUSP ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_SUSP_POS))
<> 157:ff67d9f36b67 205 #define MXC_F_USB_DEV_INTEN_NO_VBUS_POS 5
<> 157:ff67d9f36b67 206 #define MXC_F_USB_DEV_INTEN_NO_VBUS ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_NO_VBUS_POS))
<> 157:ff67d9f36b67 207 #define MXC_F_USB_DEV_INTEN_VBUS_POS 6
<> 157:ff67d9f36b67 208 #define MXC_F_USB_DEV_INTEN_VBUS ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_VBUS_POS))
<> 157:ff67d9f36b67 209 #define MXC_F_USB_DEV_INTEN_BRST_DN_POS 7
<> 157:ff67d9f36b67 210 #define MXC_F_USB_DEV_INTEN_BRST_DN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BRST_DN_POS))
<> 157:ff67d9f36b67 211 #define MXC_F_USB_DEV_INTEN_SETUP_POS 8
<> 157:ff67d9f36b67 212 #define MXC_F_USB_DEV_INTEN_SETUP ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_SETUP_POS))
<> 157:ff67d9f36b67 213 #define MXC_F_USB_DEV_INTEN_EP_IN_POS 9
<> 157:ff67d9f36b67 214 #define MXC_F_USB_DEV_INTEN_EP_IN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_EP_IN_POS))
<> 157:ff67d9f36b67 215 #define MXC_F_USB_DEV_INTEN_EP_OUT_POS 10
<> 157:ff67d9f36b67 216 #define MXC_F_USB_DEV_INTEN_EP_OUT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_EP_OUT_POS))
<> 157:ff67d9f36b67 217 #define MXC_F_USB_DEV_INTEN_EP_NAK_POS 11
<> 157:ff67d9f36b67 218 #define MXC_F_USB_DEV_INTEN_EP_NAK ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_EP_NAK_POS))
<> 157:ff67d9f36b67 219 #define MXC_F_USB_DEV_INTEN_DMA_ERR_POS 12
<> 157:ff67d9f36b67 220 #define MXC_F_USB_DEV_INTEN_DMA_ERR ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_DMA_ERR_POS))
<> 157:ff67d9f36b67 221 #define MXC_F_USB_DEV_INTEN_BUF_OVR_POS 13
<> 157:ff67d9f36b67 222 #define MXC_F_USB_DEV_INTEN_BUF_OVR ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BUF_OVR_POS))
<> 157:ff67d9f36b67 223
<> 157:ff67d9f36b67 224 #define MXC_F_USB_EP_BASE_EP_BASE_POS 9
<> 157:ff67d9f36b67 225 #define MXC_F_USB_EP_BASE_EP_BASE ((uint32_t)(0x007FFFFFUL << MXC_F_USB_EP_BASE_EP_BASE_POS))
<> 157:ff67d9f36b67 226
<> 157:ff67d9f36b67 227 #define MXC_F_USB_CUR_BUF_OUT_BUF_POS 0
<> 157:ff67d9f36b67 228 #define MXC_F_USB_CUR_BUF_OUT_BUF ((uint32_t)(0x0000FFFFUL << MXC_F_USB_CUR_BUF_OUT_BUF_POS))
<> 157:ff67d9f36b67 229 #define MXC_F_USB_CUR_BUF_IN_BUF_POS 16
<> 157:ff67d9f36b67 230 #define MXC_F_USB_CUR_BUF_IN_BUF ((uint32_t)(0x0000FFFFUL << MXC_F_USB_CUR_BUF_IN_BUF_POS))
<> 157:ff67d9f36b67 231
<> 157:ff67d9f36b67 232 #define MXC_F_USB_IN_OWNER_BUF0_OWNER_POS 0
<> 157:ff67d9f36b67 233 #define MXC_F_USB_IN_OWNER_BUF0_OWNER ((uint32_t)(0x0000FFFFUL << MXC_F_USB_IN_OWNER_BUF0_OWNER_POS))
<> 157:ff67d9f36b67 234 #define MXC_F_USB_IN_OWNER_BUF1_OWNER_POS 16
<> 157:ff67d9f36b67 235 #define MXC_F_USB_IN_OWNER_BUF1_OWNER ((uint32_t)(0x0000FFFFUL << MXC_F_USB_IN_OWNER_BUF1_OWNER_POS))
<> 157:ff67d9f36b67 236
<> 157:ff67d9f36b67 237 #define MXC_F_USB_OUT_OWNER_BUF0_OWNER_POS 0
<> 157:ff67d9f36b67 238 #define MXC_F_USB_OUT_OWNER_BUF0_OWNER ((uint32_t)(0x0000FFFFUL << MXC_F_USB_OUT_OWNER_BUF0_OWNER_POS))
<> 157:ff67d9f36b67 239 #define MXC_F_USB_OUT_OWNER_BUF1_OWNER_POS 16
<> 157:ff67d9f36b67 240 #define MXC_F_USB_OUT_OWNER_BUF1_OWNER ((uint32_t)(0x0000FFFFUL << MXC_F_USB_OUT_OWNER_BUF1_OWNER_POS))
<> 157:ff67d9f36b67 241
<> 157:ff67d9f36b67 242 #define MXC_F_USB_IN_INT_INBAV_POS 0
<> 157:ff67d9f36b67 243 #define MXC_F_USB_IN_INT_INBAV ((uint32_t)(0x000000FFUL << MXC_F_USB_IN_INT_INBAV_POS))
<> 157:ff67d9f36b67 244
<> 157:ff67d9f36b67 245 #define MXC_F_USB_OUT_INT_OUTDAV_POS 0
<> 157:ff67d9f36b67 246 #define MXC_F_USB_OUT_INT_OUTDAV ((uint32_t)(0x000000FFUL << MXC_F_USB_OUT_INT_OUTDAV_POS))
<> 157:ff67d9f36b67 247
<> 157:ff67d9f36b67 248 #define MXC_F_USB_NAK_INT_NAK_POS 0
<> 157:ff67d9f36b67 249 #define MXC_F_USB_NAK_INT_NAK ((uint32_t)(0x000000FFUL << MXC_F_USB_NAK_INT_NAK_POS))
<> 157:ff67d9f36b67 250
<> 157:ff67d9f36b67 251 #define MXC_F_USB_DMA_ERR_INT_DMA_ERR_POS 0
<> 157:ff67d9f36b67 252 #define MXC_F_USB_DMA_ERR_INT_DMA_ERR ((uint32_t)(0x000000FFUL << MXC_F_USB_DMA_ERR_INT_DMA_ERR_POS))
<> 157:ff67d9f36b67 253
<> 157:ff67d9f36b67 254 #define MXC_F_USB_BUF_OVR_INT_BUF_OVR_POS 0
<> 157:ff67d9f36b67 255 #define MXC_F_USB_BUF_OVR_INT_BUF_OVR ((uint32_t)(0x000000FFUL << MXC_F_USB_BUF_OVR_INT_BUF_OVR_POS))
<> 157:ff67d9f36b67 256
<> 157:ff67d9f36b67 257 #define MXC_F_USB_SETUP0_BYTE0_POS 0
<> 157:ff67d9f36b67 258 #define MXC_F_USB_SETUP0_BYTE0 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE0_POS))
<> 157:ff67d9f36b67 259 #define MXC_F_USB_SETUP0_BYTE1_POS 8
<> 157:ff67d9f36b67 260 #define MXC_F_USB_SETUP0_BYTE1 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE1_POS))
<> 157:ff67d9f36b67 261 #define MXC_F_USB_SETUP0_BYTE2_POS 16
<> 157:ff67d9f36b67 262 #define MXC_F_USB_SETUP0_BYTE2 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE2_POS))
<> 157:ff67d9f36b67 263 #define MXC_F_USB_SETUP0_BYTE3_POS 24
<> 157:ff67d9f36b67 264 #define MXC_F_USB_SETUP0_BYTE3 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE3_POS))
<> 157:ff67d9f36b67 265
<> 157:ff67d9f36b67 266 #define MXC_F_USB_SETUP1_BYTE0_POS 0
<> 157:ff67d9f36b67 267 #define MXC_F_USB_SETUP1_BYTE0 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE0_POS))
<> 157:ff67d9f36b67 268 #define MXC_F_USB_SETUP1_BYTE1_POS 8
<> 157:ff67d9f36b67 269 #define MXC_F_USB_SETUP1_BYTE1 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE1_POS))
<> 157:ff67d9f36b67 270 #define MXC_F_USB_SETUP1_BYTE2_POS 16
<> 157:ff67d9f36b67 271 #define MXC_F_USB_SETUP1_BYTE2 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE2_POS))
<> 157:ff67d9f36b67 272 #define MXC_F_USB_SETUP1_BYTE3_POS 24
<> 157:ff67d9f36b67 273 #define MXC_F_USB_SETUP1_BYTE3 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE3_POS))
<> 157:ff67d9f36b67 274
<> 157:ff67d9f36b67 275 #define MXC_F_USB_EP_DIR_POS 0
<> 157:ff67d9f36b67 276 #define MXC_F_USB_EP_DIR ((uint32_t)(0x00000003UL << MXC_F_USB_EP_DIR_POS))
<> 157:ff67d9f36b67 277 #define MXC_F_USB_EP_BUF2_POS 3
<> 157:ff67d9f36b67 278 #define MXC_F_USB_EP_BUF2 ((uint32_t)(0x00000001UL << MXC_F_USB_EP_BUF2_POS))
<> 157:ff67d9f36b67 279 #define MXC_F_USB_EP_INT_EN_POS 4
<> 157:ff67d9f36b67 280 #define MXC_F_USB_EP_INT_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP_INT_EN_POS))
<> 157:ff67d9f36b67 281 #define MXC_F_USB_EP_NAK_EN_POS 5
<> 157:ff67d9f36b67 282 #define MXC_F_USB_EP_NAK_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP_NAK_EN_POS))
<> 157:ff67d9f36b67 283 #define MXC_F_USB_EP_DT_POS 6
<> 157:ff67d9f36b67 284 #define MXC_F_USB_EP_DT ((uint32_t)(0x00000001UL << MXC_F_USB_EP_DT_POS))
<> 157:ff67d9f36b67 285 #define MXC_F_USB_EP_STALL_POS 8
<> 157:ff67d9f36b67 286 #define MXC_F_USB_EP_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP_STALL_POS))
<> 157:ff67d9f36b67 287 #define MXC_F_USB_EP_ST_STALL_POS 9
<> 157:ff67d9f36b67 288 #define MXC_F_USB_EP_ST_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP_ST_STALL_POS))
<> 157:ff67d9f36b67 289 #define MXC_F_USB_EP_ST_ACK_POS 10
<> 157:ff67d9f36b67 290 #define MXC_F_USB_EP_ST_ACK ((uint32_t)(0x00000001UL << MXC_F_USB_EP_ST_ACK_POS))
<> 157:ff67d9f36b67 291
<> 157:ff67d9f36b67 292
<> 157:ff67d9f36b67 293
<> 157:ff67d9f36b67 294 #ifdef __cplusplus
<> 157:ff67d9f36b67 295 }
<> 157:ff67d9f36b67 296 #endif
<> 157:ff67d9f36b67 297
<> 157:ff67d9f36b67 298 #endif /* _MXC_USB_REGS_H_ */
<> 157:ff67d9f36b67 299