u8g_dev_uc1610_dogxl160.c

00001 /*
00002 
00003   u8g_dev_uc1610_dogxl160.c
00004 
00005   Universal 8bit Graphics Library
00006   
00007   Copyright (c) 2011, olikraus@gmail.com
00008   All rights reserved.
00009 
00010   Redistribution and use in source and binary forms, with or without modification, 
00011   are permitted provided that the following conditions are met:
00012 
00013   * Redistributions of source code must retain the above copyright notice, this list 
00014     of conditions and the following disclaimer.
00015     
00016   * Redistributions in binary form must reproduce the above copyright notice, this 
00017     list of conditions and the following disclaimer in the documentation and/or other 
00018     materials provided with the distribution.
00019 
00020   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 
00021   CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 
00022   INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
00023   MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
00024   DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 
00025   CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
00026   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
00027   NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
00028   LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
00029   CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
00030   STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
00031   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 
00032   ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.  
00033   
00034   
00035 */
00036 
00037 #include "u8g.h"
00038 
00039 #define WIDTH 160
00040 #define HEIGHT 104
00041 
00042 static const uint8_t u8g_dev_uc1610_dogxl160_init_seq[] PROGMEM = {
00043   U8G_ESC_CS(0),             /* disable chip */
00044   U8G_ESC_ADR(0),           /* instruction mode */
00045   U8G_ESC_RST(1),           /* do reset low pulse with (1*16)+2 milliseconds */
00046   U8G_ESC_CS(1),             /* enable chip */
00047   0x0f1,            /* set display height-1 */
00048   0x067,        /*  */
00049   0x0c0,        /* SEG & COM normal */
00050   0x040,        /* set display start line */
00051   0x050,        /* */
00052   0x02b,        /* set panelloading */
00053   0x0eb,        /* set bias 1/2 */
00054   0x081,        /* set contrast */
00055   0x05f,        /* */
00056   0x089,        /* set auto increment */
00057   0x0a6,        /* normal pixel mode */
00058   0x0d3,        /* 0xd3=40% RMS separation for gray levels */
00059   0x0af,        /* display on */
00060   U8G_ESC_DLY(100),       /* delay 100 ms */
00061   0x0a5,                        /* display all points, ST7565, UC1610 */
00062   U8G_ESC_DLY(100),       /* delay 100 ms */
00063   U8G_ESC_DLY(100),       /* delay 100 ms */
00064   0x0a4,                        /* normal display */
00065   
00066   
00067   U8G_ESC_CS(0),             /* disable chip */
00068   U8G_ESC_END                /* end of sequence */
00069 };
00070 
00071 static const uint8_t u8g_dev_uc1610_dogxl160_data_start[] PROGMEM = {
00072   U8G_ESC_ADR(0),           /* instruction mode */
00073   U8G_ESC_CS(1),             /* enable chip */
00074   0x010,        /* set upper 4 bit of the col adr to 0 */
00075   0x000,        /* set lower 4 bit of the col adr to 0 */      
00076   U8G_ESC_END                /* end of sequence */
00077 };
00078 
00079 static uint8_t u8g_dev_1to2(uint8_t n)
00080 {
00081   register uint8_t a,b,c;
00082   a = n;
00083   a &= 1;
00084   n <<= 1;
00085   b = n;
00086   b &= 4;  
00087   n <<= 1;
00088   c = n;
00089   c &= 16;
00090   n <<= 1;
00091   n &= 64;
00092   n |= a;
00093   n |= b;
00094   n |= c;
00095   n |= n << 1;
00096   return n;
00097 }
00098 
00099 uint8_t u8g_dev_uc1610_dogxl160_bw_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
00100 {
00101   switch(msg)
00102   {
00103     case U8G_DEV_MSG_INIT:
00104       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
00105       u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_init_seq);
00106       break;
00107     case U8G_DEV_MSG_STOP:
00108       break;
00109     case U8G_DEV_MSG_PAGE_NEXT:
00110       {
00111         int i;
00112         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
00113         u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_data_start);    
00114         u8g_WriteByte(u8g, dev, 0x060 | (pb->p.page*2) ); /* select current page 1/2 (UC1610) */
00115         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00116         for( i = 0; i < WIDTH; i++ )
00117         {
00118           u8g_WriteByte(u8g, dev, u8g_dev_1to2( ((uint8_t *)(pb->buf))[i] ) );          
00119         }
00120 
00121         u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_data_start);    
00122         u8g_WriteByte(u8g, dev, 0x060 | (pb->p.page*2+1) ); /* select current page 2/2 (UC1610) */
00123         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00124         for( i = 0; i < WIDTH; i++ )
00125         {
00126           u8g_WriteByte(u8g, dev, u8g_dev_1to2( ((uint8_t *)(pb->buf))[i] >> 4 ) );          
00127         }
00128         
00129         u8g_SetChipSelect(u8g, dev, 0);
00130       }
00131       break;
00132     case U8G_DEV_MSG_CONTRAST:
00133       u8g_SetChipSelect(u8g, dev, 1);
00134       u8g_SetAddress(u8g, dev, 0);          /* instruction mode */
00135       u8g_WriteByte(u8g, dev, 0x081);
00136       u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 1);
00137       u8g_SetChipSelect(u8g, dev, 0);      
00138       return 1;
00139   }
00140   return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
00141 }
00142 
00143 uint8_t u8g_dev_uc1610_dogxl160_gr_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
00144 {
00145   switch(msg)
00146   {
00147     case U8G_DEV_MSG_INIT:
00148       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
00149       u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_init_seq);
00150       break;
00151     case U8G_DEV_MSG_STOP:
00152       break;
00153     case U8G_DEV_MSG_PAGE_NEXT:
00154       {
00155         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
00156         u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_data_start);    
00157         u8g_WriteByte(u8g, dev, 0x060 | (pb->p.page) ); /* select current page (UC1610) */
00158         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00159         if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
00160           return 0;
00161         u8g_SetChipSelect(u8g, dev, 0);
00162       }
00163       break;
00164     case U8G_DEV_MSG_CONTRAST:
00165       u8g_SetChipSelect(u8g, dev, 1);
00166       u8g_SetAddress(u8g, dev, 0);          /* instruction mode */
00167       u8g_WriteByte(u8g, dev, 0x081);
00168       u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 1);
00169       u8g_SetChipSelect(u8g, dev, 0);      
00170       return 1;
00171   }
00172   return u8g_dev_pb8v2_base_fn(u8g, dev, msg, arg);
00173 }
00174 
00175 uint8_t u8g_dev_uc1610_dogxl160_2x_bw_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
00176 {
00177   switch(msg)
00178   {
00179     case U8G_DEV_MSG_INIT:
00180       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
00181       u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_init_seq);
00182       break;
00183     case U8G_DEV_MSG_STOP:
00184       break;
00185     case U8G_DEV_MSG_PAGE_NEXT:
00186       {
00187         int i;
00188         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
00189         
00190         u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_data_start);    
00191         u8g_WriteByte(u8g, dev, 0x060 | (pb->p.page*4) ); /* select current page 1/2 (UC1610) */
00192         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00193         for( i = 0; i < WIDTH; i++ )
00194         {
00195           u8g_WriteByte(u8g, dev, u8g_dev_1to2( ((uint8_t *)(pb->buf))[i] ) );          
00196         }
00197 
00198         u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_data_start);    
00199         u8g_WriteByte(u8g, dev, 0x060 | (pb->p.page*4+1) ); /* select current page 2/2 (UC1610) */
00200         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00201         for( i = 0; i < WIDTH; i++ )
00202         {
00203           u8g_WriteByte(u8g, dev, u8g_dev_1to2( ((uint8_t *)(pb->buf))[i] >> 4 ) );          
00204         }
00205 
00206         u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_data_start);    
00207         u8g_WriteByte(u8g, dev, 0x060 | (pb->p.page*4+2) ); /* select current page 1/2 (UC1610) */
00208         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00209         for( i = 0; i < WIDTH; i++ )
00210         {
00211           u8g_WriteByte(u8g, dev, u8g_dev_1to2( ((uint8_t *)((uint8_t *)(pb->buf)+WIDTH))[i] ) );          
00212         }
00213 
00214         u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_data_start);    
00215         u8g_WriteByte(u8g, dev, 0x060 | (pb->p.page*4+3) ); /* select current page 2/2 (UC1610) */
00216         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00217         for( i = 0; i < WIDTH; i++ )
00218         {
00219           u8g_WriteByte(u8g, dev, u8g_dev_1to2( ((uint8_t *)((uint8_t *)(pb->buf)+WIDTH))[i] >> 4 ) );          
00220         }
00221         
00222         u8g_SetChipSelect(u8g, dev, 0);
00223       }
00224       break;
00225     case U8G_DEV_MSG_CONTRAST:
00226       u8g_SetChipSelect(u8g, dev, 1);
00227       u8g_SetAddress(u8g, dev, 0);          /* instruction mode */
00228       u8g_WriteByte(u8g, dev, 0x081);
00229       u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 1);
00230       u8g_SetChipSelect(u8g, dev, 0);      
00231       return 1;
00232   }
00233   return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
00234 }
00235 
00236 uint8_t u8g_dev_uc1610_dogxl160_2x_gr_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
00237 {
00238   switch(msg)
00239   {
00240     case U8G_DEV_MSG_INIT:
00241       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
00242       u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_init_seq);
00243       break;
00244     case U8G_DEV_MSG_STOP:
00245       break;
00246     case U8G_DEV_MSG_PAGE_NEXT:
00247       {
00248         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
00249         
00250         u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_data_start);    
00251         u8g_WriteByte(u8g, dev, 0x060 | (pb->p.page*2) ); /* select current page (UC1610) */
00252         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00253         if ( u8g_WriteSequence(u8g, dev, WIDTH, pb->buf) == 0 )
00254           return 0;
00255 
00256         u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_data_start);    
00257         u8g_WriteByte(u8g, dev, 0x060 | (pb->p.page*2+1) ); /* select current page (UC1610) */
00258         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00259         if ( u8g_WriteSequence(u8g, dev, WIDTH, (uint8_t *)(pb->buf)+WIDTH) == 0 )
00260           return 0;
00261         
00262         u8g_SetChipSelect(u8g, dev, 0);
00263       }
00264       break;
00265     case U8G_DEV_MSG_CONTRAST:
00266       u8g_SetChipSelect(u8g, dev, 1);
00267       u8g_SetAddress(u8g, dev, 0);          /* instruction mode */
00268       u8g_WriteByte(u8g, dev, 0x081);
00269       u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 1);
00270       u8g_SetChipSelect(u8g, dev, 0);      
00271       return 1;
00272   }
00273   return u8g_dev_pb16v2_base_fn(u8g, dev, msg, arg);
00274 }
00275 
00276 U8G_PB_DEV(u8g_dev_uc1610_dogxl160_bw_sw_spi, WIDTH, HEIGHT, 8, u8g_dev_uc1610_dogxl160_bw_fn, U8G_COM_SW_SPI);
00277 U8G_PB_DEV(u8g_dev_uc1610_dogxl160_bw_hw_spi, WIDTH, HEIGHT, 8, u8g_dev_uc1610_dogxl160_bw_fn, U8G_COM_HW_SPI);
00278 
00279 U8G_PB_DEV(u8g_dev_uc1610_dogxl160_gr_sw_spi, WIDTH, HEIGHT, 4, u8g_dev_uc1610_dogxl160_gr_fn, U8G_COM_SW_SPI);
00280 U8G_PB_DEV(u8g_dev_uc1610_dogxl160_gr_hw_spi, WIDTH, HEIGHT, 4, u8g_dev_uc1610_dogxl160_gr_fn, U8G_COM_HW_SPI);
00281 
00282 uint8_t u8g_dev_uc1610_dogxl160_2x_bw_buf[WIDTH*2] U8G_NOCOMMON ; 
00283 u8g_pb_t u8g_dev_uc1610_dogxl160_2x_bw_pb = { {16, HEIGHT, 0, 0, 0},  WIDTH, u8g_dev_uc1610_dogxl160_2x_bw_buf}; 
00284 u8g_dev_t u8g_dev_uc1610_dogxl160_2x_bw_sw_spi = { u8g_dev_uc1610_dogxl160_2x_bw_fn, &u8g_dev_uc1610_dogxl160_2x_bw_pb, U8G_COM_SW_SPI };
00285 u8g_dev_t u8g_dev_uc1610_dogxl160_2x_bw_hw_spi = { u8g_dev_uc1610_dogxl160_2x_bw_fn, &u8g_dev_uc1610_dogxl160_2x_bw_pb, U8G_COM_HW_SPI };
00286 
00287 uint8_t u8g_dev_uc1610_dogxl160_2x_gr_buf[WIDTH*2] U8G_NOCOMMON ; 
00288 u8g_pb_t u8g_dev_uc1610_dogxl160_2x_gr_pb = { {8, HEIGHT, 0, 0, 0},  WIDTH, u8g_dev_uc1610_dogxl160_2x_gr_buf}; 
00289 u8g_dev_t u8g_dev_uc1610_dogxl160_2x_gr_sw_spi = { u8g_dev_uc1610_dogxl160_2x_gr_fn, &u8g_dev_uc1610_dogxl160_2x_gr_pb, U8G_COM_SW_SPI };
00290 u8g_dev_t u8g_dev_uc1610_dogxl160_2x_gr_hw_spi = { u8g_dev_uc1610_dogxl160_2x_gr_fn, &u8g_dev_uc1610_dogxl160_2x_gr_pb, U8G_COM_HW_SPI };
00291