u8g_dev_uc1601_c128032.c

00001 /*
00002 
00003   u8g_dev_uc1601_c128032.c
00004   
00005   LCD-AG-C128032R-DIW W/KK E6 PBF from http://www.artronic.pl/o_produkcie.php?id=1343
00006 
00007   Universal 8bit Graphics Library
00008   
00009   Copyright (c) 2013, olikraus@gmail.com
00010   All rights reserved.
00011 
00012   Redistribution and use in source and binary forms, with or without modification, 
00013   are permitted provided that the following conditions are met:
00014 
00015   * Redistributions of source code must retain the above copyright notice, this list 
00016     of conditions and the following disclaimer.
00017     
00018   * Redistributions in binary form must reproduce the above copyright notice, this 
00019     list of conditions and the following disclaimer in the documentation and/or other 
00020     materials provided with the distribution.
00021 
00022   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 
00023   CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 
00024   INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
00025   MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
00026   DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 
00027   CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
00028   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
00029   NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
00030   LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
00031   CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
00032   STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
00033   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 
00034   ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.  
00035   
00036   
00037 */
00038 
00039 #include "u8g.h"
00040 
00041 #define WIDTH 128
00042 #define HEIGHT 32
00043 #define PAGE_HEIGHT 8
00044 
00045 /* init sequence */
00046 static const uint8_t u8g_dev_uc1601_c128032_init_seq[] PROGMEM = {
00047   U8G_ESC_CS(0),                /* disable chip */
00048   U8G_ESC_ADR(0),               /* instruction mode */
00049   U8G_ESC_CS(1),                /* enable chip */
00050   U8G_ESC_RST(15),              /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
00051 
00052   0x0a3,                /* 0x0a3: LCD bias 1/7 ,  0x0a2: LCD bias 1/9 */
00053   0x0a0,                /* 0x0a0: ADC set to normal,  0x0a1 ADC set to inverted */
00054   0x0c8,                        /* common output mode: set scan direction normal operation/SHL Select, 0x0c0 --> SHL = 0, normal, 0x0c8 --> SHL = 1 */
00055   0x0c2,                /* 22 May 2013: mirror x */
00056   
00057   0x040,                /* set display start line */
00058   
00059   0x028 | 0x04,                 /* power control: turn on voltage converter */
00060   U8G_ESC_DLY(50),          /* delay 50 ms */
00061 
00062   0x028 | 0x06,                 /* power control: turn on voltage regulator */
00063   U8G_ESC_DLY(50),          /* delay 50 ms */
00064   
00065   0x028 | 0x07,                 /* power control: turn on voltage follower */
00066   U8G_ESC_DLY(10),          /* delay 10 ms */
00067 
00068   0x020| 0x06,              /* set V0 voltage resistor ratio to 6  */
00069   
00070   0x0af,                /* display on */
00071   
00072   //0x081,              /* set contrast */
00073   //0x018,              /* contrast value*/
00074  
00075   0x0a6,                      /* display normal, bit val 0: LCD pixel off. */
00076 
00077   U8G_ESC_DLY(100),         /* delay 100 ms */
00078   U8G_ESC_CS(0),                /* disable chip */
00079   U8G_ESC_END                   /* end of sequence */
00080 };
00081 
00082 static const uint8_t u8g_dev_uc1601_c128032_data_start[] PROGMEM = {
00083   U8G_ESC_ADR(0),               /* instruction mode */
00084   U8G_ESC_CS(1),                /* enable chip */
00085   0x010,            /* set upper 4 bit of the col adr to 0 */
00086   0x004,            /* set lower 4 bit of the col adr  */      
00087   U8G_ESC_END                   /* end of sequence */
00088 };
00089 
00090 static const uint8_t u8g_dev_uc1601_c128032_sleep_on[] PROGMEM = {
00091   U8G_ESC_ADR(0),               /* instruction mode */
00092   U8G_ESC_CS(1),                /* enable chip */
00093   0x0ac,            /* static indicator off */
00094   0x000,                /* indicator register set (not sure if this is required) */
00095   0x0ae,            /* display off */      
00096   0x0a5,            /* all points on */      
00097   U8G_ESC_CS(1),                /* disable chip */
00098   U8G_ESC_END                   /* end of sequence */
00099 };
00100 
00101 static const uint8_t u8g_dev_uc1601_c128032_sleep_off[] PROGMEM = {
00102   U8G_ESC_ADR(0),               /* instruction mode */
00103   U8G_ESC_CS(1),                /* enable chip */
00104   0x0a4,            /* all points off */      
00105   0x0af,            /* display on */      
00106   U8G_ESC_DLY(50),          /* delay 50 ms */
00107   U8G_ESC_CS(1),                /* disable chip */
00108   U8G_ESC_END                   /* end of sequence */
00109 };
00110 
00111 
00112 uint8_t u8g_dev_uc1601_c128032_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
00113 {
00114   switch(msg)
00115   {
00116     case U8G_DEV_MSG_INIT:
00117       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
00118       u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1601_c128032_init_seq);
00119       break;
00120     case U8G_DEV_MSG_STOP:
00121       break;
00122     case U8G_DEV_MSG_PAGE_NEXT:
00123       {
00124         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
00125         u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1601_c128032_data_start);    
00126         u8g_WriteByte(u8g, dev, 0x0b0 | pb->p.page); /* select current page (UC1601) */
00127         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00128         if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
00129           return 0;
00130         u8g_SetChipSelect(u8g, dev, 0);
00131       }
00132       break;
00133     case U8G_DEV_MSG_CONTRAST:
00134       u8g_SetChipSelect(u8g, dev, 1);
00135       u8g_SetAddress(u8g, dev, 0);          /* instruction mode */
00136       u8g_WriteByte(u8g, dev, 0x081);
00137       u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
00138       u8g_SetChipSelect(u8g, dev, 0);      
00139       return 1;
00140     case U8G_DEV_MSG_SLEEP_ON:
00141       u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1601_c128032_sleep_on);    
00142       return 1;
00143     case U8G_DEV_MSG_SLEEP_OFF:
00144       u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1601_c128032_sleep_off);    
00145       return 1;
00146   }
00147   return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
00148 }
00149 
00150 uint8_t u8g_dev_uc1601_c128032_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
00151 {
00152   switch(msg)
00153   {
00154     case U8G_DEV_MSG_INIT:
00155       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
00156       u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1601_c128032_init_seq);
00157       break;
00158     case U8G_DEV_MSG_STOP:
00159       break;
00160     case U8G_DEV_MSG_PAGE_NEXT:
00161       {
00162         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
00163     
00164         u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1601_c128032_data_start);    
00165         u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page)); /* select current page (UC1601) */
00166         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00167     u8g_WriteSequence(u8g, dev, pb->width, pb->buf); 
00168         u8g_SetChipSelect(u8g, dev, 0);
00169     
00170         u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1601_c128032_data_start);    
00171         u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page+1)); /* select current page (UC1601) */
00172         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00173     u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width); 
00174         u8g_SetChipSelect(u8g, dev, 0);
00175       }
00176       break;
00177     case U8G_DEV_MSG_CONTRAST:
00178       u8g_SetChipSelect(u8g, dev, 1);
00179       u8g_SetAddress(u8g, dev, 0);          /* instruction mode */
00180       u8g_WriteByte(u8g, dev, 0x081);
00181       u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
00182       u8g_SetChipSelect(u8g, dev, 0);      
00183       return 1;
00184     case U8G_DEV_MSG_SLEEP_ON:
00185       u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1601_c128032_sleep_on);    
00186       return 1;
00187     case U8G_DEV_MSG_SLEEP_OFF:
00188       u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1601_c128032_sleep_off);    
00189       return 1;
00190   }
00191   return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
00192 }
00193 
00194 U8G_PB_DEV(u8g_dev_uc1601_c128032_sw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1601_c128032_fn, U8G_COM_SW_SPI);
00195 U8G_PB_DEV(u8g_dev_uc1601_c128032_hw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1601_c128032_fn, U8G_COM_HW_SPI);
00196 
00197 uint8_t u8g_dev_uc1601_c128032_2x_buf[WIDTH*2] U8G_NOCOMMON ; 
00198 u8g_pb_t u8g_dev_uc1601_c128032_2x_pb = { {16, HEIGHT, 0, 0, 0},  WIDTH, u8g_dev_uc1601_c128032_2x_buf}; 
00199 u8g_dev_t u8g_dev_uc1601_c128032_2x_sw_spi = { u8g_dev_uc1601_c128032_2x_fn, &u8g_dev_uc1601_c128032_2x_pb, U8G_COM_SW_SPI };
00200 u8g_dev_t u8g_dev_uc1601_c128032_2x_hw_spi = { u8g_dev_uc1601_c128032_2x_fn, &u8g_dev_uc1601_c128032_2x_pb, U8G_COM_HW_SPI };
00201 
00202