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u8g_dev_st7920_202x32.c
00001 /* 00002 00003 u8g_dev_st7920_202x32.c 00004 tested with CFAG20232 00005 00006 00007 Universal 8bit Graphics Library 00008 00009 Copyright (c) 2011, olikraus@gmail.com 00010 All rights reserved. 00011 00012 Redistribution and use in source and binary forms, with or without modification, 00013 are permitted provided that the following conditions are met: 00014 00015 * Redistributions of source code must retain the above copyright notice, this list 00016 of conditions and the following disclaimer. 00017 00018 * Redistributions in binary form must reproduce the above copyright notice, this 00019 list of conditions and the following disclaimer in the documentation and/or other 00020 materials provided with the distribution. 00021 00022 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 00023 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 00024 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 00025 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00026 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 00027 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 00028 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 00029 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00030 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00031 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 00032 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 00033 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 00034 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00035 00036 00037 */ 00038 00039 #include "u8g.h" 00040 00041 #define WIDTH 202 00042 #define HEIGHT 32 00043 #define PAGE_HEIGHT 8 00044 00045 00046 /* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */ 00047 static const uint8_t u8g_dev_st7920_202x32_init_seq[] PROGMEM = { 00048 U8G_ESC_CS(0), /* disable chip */ 00049 U8G_ESC_ADR(0), /* instruction mode */ 00050 U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/ 00051 U8G_ESC_DLY(100), /* 8 Dez 2012: additional delay 100 ms because of reset*/ 00052 U8G_ESC_CS(1), /* enable chip */ 00053 U8G_ESC_DLY(50), /* delay 50 ms */ 00054 00055 0x038, /* 8 Bit interface (DL=1), basic instruction set (RE=0) */ 00056 0x00c, /* display on, cursor & blink off; 0x08: all off */ 00057 0x006, /* Entry mode: Cursor move to right ,DDRAM address counter (AC) plus 1, no shift */ 00058 0x002, /* disable scroll, enable CGRAM adress */ 00059 0x001, /* clear RAM, needs 1.6 ms */ 00060 U8G_ESC_DLY(100), /* delay 10 ms */ 00061 00062 U8G_ESC_CS(0), /* disable chip */ 00063 U8G_ESC_END /* end of sequence */ 00064 }; 00065 00066 uint8_t u8g_dev_st7920_202x32_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) 00067 { 00068 switch(msg) 00069 { 00070 case U8G_DEV_MSG_INIT: 00071 u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS); 00072 u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_202x32_init_seq); 00073 break; 00074 case U8G_DEV_MSG_STOP: 00075 break; 00076 case U8G_DEV_MSG_PAGE_NEXT: 00077 { 00078 uint8_t y, i; 00079 uint8_t *ptr; 00080 u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); 00081 00082 u8g_SetAddress(u8g, dev, 0); /* cmd mode */ 00083 u8g_SetChipSelect(u8g, dev, 1); 00084 y = pb->p.page_y0; 00085 ptr = pb->buf; 00086 for( i = 0; i < 8; i ++ ) 00087 { 00088 u8g_SetAddress(u8g, dev, 0); /* cmd mode */ 00089 u8g_WriteByte(u8g, dev, 0x03e ); /* enable extended mode */ 00090 u8g_WriteByte(u8g, dev, 0x080 | y ); /* y pos */ 00091 u8g_WriteByte(u8g, dev, 0x080 ); /* set x pos to 0*/ 00092 u8g_SetAddress(u8g, dev, 1); /* data mode */ 00093 u8g_WriteSequence(u8g, dev, WIDTH/8, ptr); 00094 ptr += WIDTH/8; 00095 y++; 00096 } 00097 u8g_SetChipSelect(u8g, dev, 0); 00098 } 00099 break; 00100 } 00101 return u8g_dev_pb8h1_base_fn(u8g, dev, msg, arg); 00102 } 00103 00104 uint8_t u8g_dev_st7920_202x32_4x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) 00105 { 00106 switch(msg) 00107 { 00108 case U8G_DEV_MSG_INIT: 00109 u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS); 00110 u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_202x32_init_seq); 00111 break; 00112 case U8G_DEV_MSG_STOP: 00113 break; 00114 case U8G_DEV_MSG_PAGE_NEXT: 00115 { 00116 uint8_t y, i; 00117 uint8_t *ptr; 00118 u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); 00119 00120 u8g_SetAddress(u8g, dev, 0); /* cmd mode */ 00121 u8g_SetChipSelect(u8g, dev, 1); 00122 y = pb->p.page_y0; 00123 ptr = pb->buf; 00124 for( i = 0; i < 32; i ++ ) 00125 { 00126 u8g_SetAddress(u8g, dev, 0); /* cmd mode */ 00127 u8g_WriteByte(u8g, dev, 0x03e ); /* enable extended mode */ 00128 u8g_WriteByte(u8g, dev, 0x080 | y ); /* y pos */ 00129 u8g_WriteByte(u8g, dev, 0x080 ); /* set x pos to 0*/ 00130 u8g_SetAddress(u8g, dev, 1); /* data mode */ 00131 u8g_WriteSequence(u8g, dev, WIDTH/8, ptr); 00132 ptr += WIDTH/8; 00133 y++; 00134 } 00135 u8g_SetChipSelect(u8g, dev, 0); 00136 } 00137 break; 00138 } 00139 return u8g_dev_pb32h1_base_fn(u8g, dev, msg, arg); 00140 } 00141 00142 00143 U8G_PB_DEV(u8g_dev_st7920_202x32_sw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7920_202x32_fn, U8G_COM_ST7920_SW_SPI); 00144 U8G_PB_DEV(u8g_dev_st7920_202x32_hw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7920_202x32_fn, U8G_COM_ST7920_HW_SPI); 00145 U8G_PB_DEV(u8g_dev_st7920_202x32_8bit, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7920_202x32_fn, U8G_COM_FAST_PARALLEL); 00146 00147 #define QWIDTH (WIDTH*4) 00148 uint8_t u8g_dev_st7920_202x32_4x_buf[QWIDTH] U8G_NOCOMMON ; 00149 u8g_pb_t u8g_dev_st7920_202x32_4x_pb = { {32, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_st7920_202x32_4x_buf}; 00150 u8g_dev_t u8g_dev_st7920_202x32_4x_sw_spi = { u8g_dev_st7920_202x32_4x_fn, &u8g_dev_st7920_202x32_4x_pb, U8G_COM_ST7920_SW_SPI }; 00151 u8g_dev_t u8g_dev_st7920_202x32_4x_hw_spi = { u8g_dev_st7920_202x32_4x_fn, &u8g_dev_st7920_202x32_4x_pb, U8G_COM_ST7920_HW_SPI }; 00152 u8g_dev_t u8g_dev_st7920_202x32_4x_8bit = { u8g_dev_st7920_202x32_4x_fn, &u8g_dev_st7920_202x32_4x_pb, U8G_COM_FAST_PARALLEL }; 00153 00154 00155
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