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Show/hide line numbers u8g_dev_st7920_192x32.c Source File

u8g_dev_st7920_192x32.c

00001 /*
00002 
00003   u8g_dev_st7920_192x32.c
00004 
00005   Universal 8bit Graphics Library
00006   
00007   Copyright (c) 2011, olikraus@gmail.com
00008   All rights reserved.
00009 
00010   Redistribution and use in source and binary forms, with or without modification, 
00011   are permitted provided that the following conditions are met:
00012 
00013   * Redistributions of source code must retain the above copyright notice, this list 
00014     of conditions and the following disclaimer.
00015     
00016   * Redistributions in binary form must reproduce the above copyright notice, this 
00017     list of conditions and the following disclaimer in the documentation and/or other 
00018     materials provided with the distribution.
00019 
00020   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 
00021   CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 
00022   INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
00023   MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
00024   DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 
00025   CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
00026   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
00027   NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
00028   LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
00029   CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
00030   STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
00031   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 
00032   ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.  
00033   
00034   
00035 */
00036 
00037 #include "u8g.h"
00038 
00039 #define WIDTH 192
00040 #define HEIGHT 32
00041 
00042 
00043 /* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
00044 static const uint8_t u8g_dev_st7920_192x32_init_seq[] PROGMEM = {
00045   U8G_ESC_CS(0),             /* disable chip */
00046   U8G_ESC_ADR(0),           /* instruction mode */
00047   U8G_ESC_RST(15),           /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
00048   U8G_ESC_DLY(100),         /* 8 Dez 2012: additional delay 100 ms because of reset*/
00049   U8G_ESC_CS(1),             /* enable chip */
00050   U8G_ESC_DLY(50),         /* delay 50 ms */
00051 
00052   0x038,                                /* 8 Bit interface (DL=1), basic instruction set (RE=0) */
00053   0x00c,                                /* display on, cursor & blink off; 0x08: all off */
00054   0x006,                                /* Entry mode: Cursor move to right ,DDRAM address counter (AC) plus 1, no shift */
00055   0x002,                                /* disable scroll, enable CGRAM adress */
00056   0x001,                                /* clear RAM, needs 1.6 ms */
00057   U8G_ESC_DLY(100),               /* delay 10 ms */
00058   
00059   U8G_ESC_CS(0),             /* disable chip */
00060   U8G_ESC_END                /* end of sequence */
00061 };
00062 
00063 uint8_t u8g_dev_st7920_192x32_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
00064 {
00065   switch(msg)
00066   {
00067     case U8G_DEV_MSG_INIT:
00068       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
00069       u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_192x32_init_seq);
00070       break;
00071     case U8G_DEV_MSG_STOP:
00072       break;
00073     case U8G_DEV_MSG_PAGE_NEXT:
00074       {
00075         uint8_t y, i;
00076         uint8_t *ptr;
00077         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
00078         
00079         u8g_SetAddress(u8g, dev, 0);           /* cmd mode */
00080         u8g_SetChipSelect(u8g, dev, 1);
00081         y = pb->p.page_y0;
00082         ptr = pb->buf;
00083         for( i = 0; i < 8; i ++ )
00084         {
00085           u8g_SetAddress(u8g, dev, 0);           /* cmd mode */
00086           u8g_WriteByte(u8g, dev, 0x03e );      /* enable extended mode */
00087           u8g_WriteByte(u8g, dev, 0x080 | y );      /* y pos  */
00088           u8g_WriteByte(u8g, dev, 0x080  );      /* set x pos to 0*/          
00089           u8g_SetAddress(u8g, dev, 1);                  /* data mode */
00090           u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
00091           ptr += WIDTH/8;
00092           y++;
00093         }
00094         u8g_SetChipSelect(u8g, dev, 0);
00095       }
00096       break;
00097   }
00098   return u8g_dev_pb8h1_base_fn(u8g, dev, msg, arg);
00099 }
00100 
00101 uint8_t u8g_dev_st7920_192x32_4x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
00102 {
00103   switch(msg)
00104   {
00105     case U8G_DEV_MSG_INIT:
00106       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
00107       u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_192x32_init_seq);
00108       break;
00109     case U8G_DEV_MSG_STOP:
00110       break;
00111     case U8G_DEV_MSG_PAGE_NEXT:
00112       {
00113         uint8_t y, i;
00114         uint8_t *ptr;
00115         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
00116         
00117         u8g_SetAddress(u8g, dev, 0);           /* cmd mode */
00118         u8g_SetChipSelect(u8g, dev, 1);
00119         y = pb->p.page_y0;
00120         ptr = pb->buf;
00121         for( i = 0; i < 32; i ++ )
00122         {
00123           u8g_SetAddress(u8g, dev, 0);           /* cmd mode */
00124           u8g_WriteByte(u8g, dev, 0x03e );      /* enable extended mode */
00125           u8g_WriteByte(u8g, dev, 0x080 | y );      /* y pos  */
00126           u8g_WriteByte(u8g, dev, 0x080  );      /* set x pos to 0*/          
00127           u8g_SetAddress(u8g, dev, 1);                  /* data mode */
00128           u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
00129           ptr += WIDTH/8;
00130           y++;
00131         }
00132         u8g_SetChipSelect(u8g, dev, 0);
00133       }
00134       break;
00135   }
00136   return u8g_dev_pb32h1_base_fn(u8g, dev, msg, arg);
00137 }
00138 
00139 
00140 U8G_PB_DEV(u8g_dev_st7920_192x32_sw_spi, WIDTH, HEIGHT, 8, u8g_dev_st7920_192x32_fn, U8G_COM_ST7920_SW_SPI);
00141 U8G_PB_DEV(u8g_dev_st7920_192x32_hw_spi, WIDTH, HEIGHT, 8, u8g_dev_st7920_192x32_fn, U8G_COM_ST7920_HW_SPI);
00142 U8G_PB_DEV(u8g_dev_st7920_192x32_8bit, WIDTH, HEIGHT, 8, u8g_dev_st7920_192x32_fn, U8G_COM_FAST_PARALLEL);
00143 
00144 
00145 #define QWIDTH (WIDTH*4)
00146 uint8_t u8g_dev_st7920_192x32_4x_buf[QWIDTH] U8G_NOCOMMON ; 
00147 u8g_pb_t u8g_dev_st7920_192x32_4x_pb = { {32, HEIGHT, 0, 0, 0},  WIDTH, u8g_dev_st7920_192x32_4x_buf}; 
00148 u8g_dev_t u8g_dev_st7920_192x32_4x_sw_spi = { u8g_dev_st7920_192x32_4x_fn, &u8g_dev_st7920_192x32_4x_pb, U8G_COM_ST7920_SW_SPI };
00149 u8g_dev_t u8g_dev_st7920_192x32_4x_hw_spi = { u8g_dev_st7920_192x32_4x_fn, &u8g_dev_st7920_192x32_4x_pb, U8G_COM_ST7920_HW_SPI };
00150 u8g_dev_t u8g_dev_st7920_192x32_4x_8bit = { u8g_dev_st7920_192x32_4x_fn, &u8g_dev_st7920_192x32_4x_pb, U8G_COM_FAST_PARALLEL };
00151 
00152