u8g_dev_st7565_nhd_c12832.c

00001 /*
00002 
00003   u8g_dev_st7565_nhd_c12832.c
00004 
00005   Universal 8bit Graphics Library
00006   
00007   Copyright (c) 2011, olikraus@gmail.com
00008   All rights reserved.
00009 
00010   Redistribution and use in source and binary forms, with or without modification, 
00011   are permitted provided that the following conditions are met:
00012 
00013   * Redistributions of source code must retain the above copyright notice, this list 
00014     of conditions and the following disclaimer.
00015     
00016   * Redistributions in binary form must reproduce the above copyright notice, this 
00017     list of conditions and the following disclaimer in the documentation and/or other 
00018     materials provided with the distribution.
00019 
00020   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 
00021   CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 
00022   INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
00023   MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
00024   DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 
00025   CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
00026   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
00027   NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
00028   LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
00029   CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
00030   STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
00031   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 
00032   ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.  
00033   
00034   
00035 */
00036 
00037 #include "u8g.h"
00038 
00039 #define WIDTH 128
00040 #define HEIGHT 32
00041 #define PAGE_HEIGHT 8
00042 
00043 static const uint8_t u8g_dev_st7565_c12832_init_seq[] PROGMEM = {
00044   U8G_ESC_CS(0),             /* disable chip */
00045   U8G_ESC_ADR(0),           /* instruction mode */
00046   U8G_ESC_RST(1),           /* do reset low pulse with (1*16)+2 milliseconds */
00047   U8G_ESC_CS(1),             /* enable chip */
00048 
00049   0x040,        /* set display start line to 0 */
00050   0x0a0,        /* ADC set, values: a0=normal, a1=reverse */
00051   0x0c8,        /* common output mode: c0=normal, c8=reverse */
00052   0x0a6,        /* display normal, bit val 0: LCD pixel off. */
00053   0x0a2,        /* LCD bias 1/9 */
00054   0x02f,        /* all power  control circuits on */
00055   0x0f8,        /* set booster ratio to */
00056   0x000,        /* 4x */
00057   0x023,        /* set V0 voltage resistor ratio to large */
00058   0x081,        /* set contrast */
00059   0x00a,        /* contrast value */
00060   0x0ac,        /* indicator */
00061   0x000,        /* disable */
00062   0x0af,        /* display on */
00063 
00064 
00065   U8G_ESC_DLY(100),       /* delay 100 ms */
00066   0x0a5,                        /* display all points, ST7565 */
00067   U8G_ESC_DLY(100),       /* delay 100 ms */
00068   U8G_ESC_DLY(100),       /* delay 100 ms */
00069   0x0a4,                        /* normal display */
00070   U8G_ESC_CS(0),             /* disable chip */
00071   U8G_ESC_END                /* end of sequence */
00072 };
00073 
00074 static const uint8_t u8g_dev_st7565_c12832_data_start[] PROGMEM = {
00075   U8G_ESC_ADR(0),           /* instruction mode */
00076   U8G_ESC_CS(1),             /* enable chip */
00077   0x010,        /* set upper 4 bit of the col adr to 0 */
00078   0x000,        /* set lower 4 bit of the col adr to 0  */
00079   U8G_ESC_END                /* end of sequence */
00080 };
00081 
00082 static const uint8_t u8g_dev_st7565_c12832_sleep_on[] PROGMEM = {
00083   U8G_ESC_ADR(0),           /* instruction mode */
00084   U8G_ESC_CS(1),             /* enable chip */
00085   0x0ac,        /* static indicator off */
00086   0x000,                        /* indicator register set (not sure if this is required) */
00087   0x0ae,        /* display off */      
00088   0x0a5,        /* all points on */      
00089   U8G_ESC_CS(1),             /* disable chip */
00090   U8G_ESC_END                /* end of sequence */
00091 };
00092 
00093 static const uint8_t u8g_dev_st7565_c12832_sleep_off[] PROGMEM = {
00094   U8G_ESC_ADR(0),           /* instruction mode */
00095   U8G_ESC_CS(1),             /* enable chip */
00096   0x0a4,        /* all points off */      
00097   0x0af,        /* display on */      
00098   U8G_ESC_DLY(50),       /* delay 50 ms */
00099   U8G_ESC_CS(1),             /* disable chip */
00100   U8G_ESC_END                /* end of sequence */
00101 };
00102 
00103 uint8_t u8g_dev_st7565_c12832_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
00104 {
00105   switch(msg)
00106   {
00107     case U8G_DEV_MSG_INIT:
00108       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
00109       u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_c12832_init_seq);
00110       break;
00111     case U8G_DEV_MSG_STOP:
00112       break;
00113     case U8G_DEV_MSG_PAGE_NEXT:
00114       {
00115         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
00116         u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_c12832_data_start);    
00117         u8g_WriteByte(u8g, dev, 0x0b0 | pb->p.page); /* select current page (ST7565R) */
00118         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00119         if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
00120           return 0;
00121         u8g_SetChipSelect(u8g, dev, 0);
00122       }
00123       break;
00124     case U8G_DEV_MSG_CONTRAST:
00125       u8g_SetChipSelect(u8g, dev, 1);
00126       u8g_SetAddress(u8g, dev, 0);          /* instruction mode */
00127       u8g_WriteByte(u8g, dev, 0x081);
00128       u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
00129       u8g_SetChipSelect(u8g, dev, 0);      
00130       return 1;
00131     case U8G_DEV_MSG_SLEEP_ON:
00132       u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_c12832_sleep_on);    
00133       return 1;
00134     case U8G_DEV_MSG_SLEEP_OFF:
00135       u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_c12832_sleep_off);    
00136       return 1;
00137   }
00138   return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
00139 }
00140 
00141 U8G_PB_DEV(u8g_dev_st7565_nhd_c12832_sw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7565_c12832_fn, U8G_COM_SW_SPI);
00142 U8G_PB_DEV(u8g_dev_st7565_nhd_c12832_hw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7565_c12832_fn, U8G_COM_HW_SPI);
00143 U8G_PB_DEV(u8g_dev_st7565_nhd_c12832_parallel, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7565_c12832_fn, U8G_COM_PARALLEL);
00144 U8G_PB_DEV(u8g_dev_st7565_nhd_c12832_hw_usart_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7565_c12832_fn, U8G_COM_HW_USART_SPI);
00145 
00146