u8g_dev_st7565_dogm128.c

00001 /*
00002 
00003   u8g_dev_st7565_dogm128.c
00004 
00005   Universal 8bit Graphics Library
00006   
00007   Copyright (c) 2011, olikraus@gmail.com
00008   All rights reserved.
00009 
00010   Redistribution and use in source and binary forms, with or without modification, 
00011   are permitted provided that the following conditions are met:
00012 
00013   * Redistributions of source code must retain the above copyright notice, this list 
00014     of conditions and the following disclaimer.
00015     
00016   * Redistributions in binary form must reproduce the above copyright notice, this 
00017     list of conditions and the following disclaimer in the documentation and/or other 
00018     materials provided with the distribution.
00019 
00020   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 
00021   CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 
00022   INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
00023   MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
00024   DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 
00025   CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
00026   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
00027   NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
00028   LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
00029   CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
00030   STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
00031   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 
00032   ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.  
00033   
00034   
00035 */
00036 
00037 #include "u8g.h"
00038 
00039 #define WIDTH 128
00040 #define HEIGHT 64
00041 #define PAGE_HEIGHT 8
00042 
00043 const uint8_t u8g_dev_st7565_dogm128_init_seq[] PROGMEM = {
00044   U8G_ESC_CS(0),             /* disable chip */
00045   U8G_ESC_ADR(0),           /* instruction mode */
00046   U8G_ESC_RST(1),           /* do reset low pulse with (1*16)+2 milliseconds */
00047   U8G_ESC_CS(1),             /* enable chip */
00048   
00049   0x040,                        /* set display start line */
00050   0x0a1,                        /* ADC set to reverse */
00051   0x0c0,                        /* common output mode: set scan direction normal operation */
00052   0x0a6,                           /* display normal (none reverse) */
00053   0x0a2,                        /* LCD bias 1/9 */
00054   0x02f,                        /* all power  control circuits on */
00055   0x0f8,                        /* set booster ratio to */
00056   0x000,                        /* 4x */
00057   0x027,                        /* set V0 voltage resistor ratio to large */
00058   0x081,                        /* set contrast */
00059   0x018,                        /* contrast value, EA default: 0x016 */
00060   0x0ac,                        /* indicator */
00061   0x000,                        /* disable */
00062   0x0a4,                        /* normal display (not all on) */
00063   0x0af,                        /* display on */
00064   U8G_ESC_DLY(50),       /* delay 50 ms */
00065 
00066   U8G_ESC_CS(0),             /* disable chip */
00067   U8G_ESC_END                /* end of sequence */
00068 };
00069 
00070 static const uint8_t u8g_dev_st7565_dogm128_data_start[] PROGMEM = {
00071   U8G_ESC_ADR(0),           /* instruction mode */
00072   U8G_ESC_CS(1),             /* enable chip */
00073   0x010,        /* set upper 4 bit of the col adr to 0 */
00074   0x000,        /* set lower 4 bit of the col adr to 0 */      
00075   U8G_ESC_END                /* end of sequence */
00076 };
00077 
00078 static const uint8_t u8g_dev_st7565_dogm128_sleep_on[] PROGMEM = {
00079   U8G_ESC_ADR(0),           /* instruction mode */
00080   U8G_ESC_CS(1),             /* enable chip */
00081   0x0ac,        /* static indicator off */
00082   0x000,                        /* indicator register set (not sure if this is required) */
00083   0x0ae,        /* display off */      
00084   0x0a5,        /* all points on */      
00085   U8G_ESC_CS(1),             /* disable chip */
00086   U8G_ESC_END                /* end of sequence */
00087 };
00088 
00089 static const uint8_t u8g_dev_st7565_dogm128_sleep_off[] PROGMEM = {
00090   U8G_ESC_ADR(0),           /* instruction mode */
00091   U8G_ESC_CS(1),             /* enable chip */
00092   0x0a4,        /* all points off */      
00093   0x0af,        /* display on */      
00094   U8G_ESC_DLY(50),       /* delay 50 ms */
00095   U8G_ESC_CS(1),             /* disable chip */
00096   U8G_ESC_END                /* end of sequence */
00097 };
00098 
00099 uint8_t u8g_dev_st7565_dogm128_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
00100 {
00101   switch(msg)
00102   {
00103     case U8G_DEV_MSG_INIT:
00104       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
00105       u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_init_seq);
00106       break;
00107     case U8G_DEV_MSG_STOP:
00108       break;
00109     case U8G_DEV_MSG_PAGE_NEXT:
00110       {
00111         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
00112         u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_data_start);    
00113         u8g_WriteByte(u8g, dev, 0x0b0 | pb->p.page); /* select current page (ST7565R) */
00114         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00115         if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
00116           return 0;
00117         u8g_SetChipSelect(u8g, dev, 0);
00118       }
00119       break;
00120     case U8G_DEV_MSG_CONTRAST:
00121       u8g_SetChipSelect(u8g, dev, 1);
00122       u8g_SetAddress(u8g, dev, 0);          /* instruction mode */
00123       u8g_WriteByte(u8g, dev, 0x081);
00124       u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
00125       u8g_SetChipSelect(u8g, dev, 0);      
00126       return 1;
00127     case U8G_DEV_MSG_SLEEP_ON:
00128       u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_sleep_on);    
00129       return 1;
00130     case U8G_DEV_MSG_SLEEP_OFF:
00131       u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_sleep_off);    
00132       return 1;
00133   }
00134   return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
00135 }
00136 
00137 uint8_t u8g_dev_st7565_dogm128_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
00138 {
00139   switch(msg)
00140   {
00141     case U8G_DEV_MSG_INIT:
00142       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
00143       u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_init_seq);
00144       break;
00145     case U8G_DEV_MSG_STOP:
00146       break;
00147     case U8G_DEV_MSG_PAGE_NEXT:
00148       {
00149         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
00150         u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_data_start);    
00151         u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page)); /* select current page (ST7565R) */
00152         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00153     u8g_WriteSequence(u8g, dev, pb->width, pb->buf); 
00154         u8g_SetChipSelect(u8g, dev, 0);
00155     
00156         u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_data_start);    
00157         u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page+1)); /* select current page (ST7565R) */
00158         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00159     u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width); 
00160         u8g_SetChipSelect(u8g, dev, 0);
00161     
00162       }
00163       break;
00164     case U8G_DEV_MSG_CONTRAST:
00165       u8g_SetChipSelect(u8g, dev, 1);
00166       u8g_SetAddress(u8g, dev, 0);          /* instruction mode */
00167       u8g_WriteByte(u8g, dev, 0x081);
00168       u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
00169       u8g_SetChipSelect(u8g, dev, 0);      
00170       return 1;
00171     case U8G_DEV_MSG_SLEEP_ON:
00172       u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_sleep_on);    
00173       return 1;
00174     case U8G_DEV_MSG_SLEEP_OFF:
00175       u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_sleep_off);    
00176       return 1;
00177   }
00178   return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
00179 }
00180 
00181 U8G_PB_DEV(u8g_dev_st7565_dogm128_sw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7565_dogm128_fn, U8G_COM_SW_SPI);
00182 U8G_PB_DEV(u8g_dev_st7565_dogm128_hw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7565_dogm128_fn, U8G_COM_HW_SPI);
00183 U8G_PB_DEV(u8g_dev_st7565_dogm128_parallel, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7565_dogm128_fn, U8G_COM_PARALLEL);
00184 
00185 
00186 uint8_t u8g_dev_st7565_dogm128_2x_buf[WIDTH*2] U8G_NOCOMMON ; 
00187 u8g_pb_t u8g_dev_st7565_dogm128_2x_pb = { {16, HEIGHT, 0, 0, 0},  WIDTH, u8g_dev_st7565_dogm128_2x_buf}; 
00188 u8g_dev_t u8g_dev_st7565_dogm128_2x_sw_spi = { u8g_dev_st7565_dogm128_2x_fn, &u8g_dev_st7565_dogm128_2x_pb, U8G_COM_SW_SPI };
00189 u8g_dev_t u8g_dev_st7565_dogm128_2x_hw_spi = { u8g_dev_st7565_dogm128_2x_fn, &u8g_dev_st7565_dogm128_2x_pb, U8G_COM_HW_SPI };
00190 u8g_dev_t u8g_dev_st7565_dogm128_2x_parallel = { u8g_dev_st7565_dogm128_2x_fn, &u8g_dev_st7565_dogm128_2x_pb, U8G_COM_PARALLEL };
00191