u8g_dev_ssd1309_128x64.c

00001 /*
00002 
00003   u8g_dev_ssd1309_128x64.c
00004 
00005   Universal 8bit Graphics Library
00006   
00007   Copyright (c) 2012, olikraus@gmail.com
00008   All rights reserved.
00009 
00010   Redistribution and use in source and binary forms, with or without modification, 
00011   are permitted provided that the following conditions are met:
00012 
00013   * Redistributions of source code must retain the above copyright notice, this list 
00014     of conditions and the following disclaimer.
00015     
00016   * Redistributions in binary form must reproduce the above copyright notice, this 
00017     list of conditions and the following disclaimer in the documentation and/or other 
00018     materials provided with the distribution.
00019 
00020   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 
00021   CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 
00022   INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
00023   MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
00024   DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 
00025   CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
00026   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
00027   NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
00028   LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
00029   CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
00030   STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
00031   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 
00032   ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.  
00033   
00034   
00035 */
00036 
00037 #include "u8g.h"
00038 
00039 #define WIDTH 128
00040 #define HEIGHT 64
00041 #define PAGE_HEIGHT 8
00042 
00043 
00044 /* ssd1309 ini sequence*/
00045 static const uint8_t u8g_dev_ssd1309_128x64_init_seq[] PROGMEM={
00046     U8G_ESC_CS(0),             /* disable chip */
00047     U8G_ESC_ADR(0),           /* instruction mode */
00048     U8G_ESC_RST(1),           /* do reset low pulse with (1*16)+2 milliseconds */
00049     U8G_ESC_CS(1),             /* enable chip */
00050     
00051     0xfd,0x12,      /*Command Lock */
00052     0xae,           /*Set Display Off */
00053     0xd5,0xa0,      /*set Display Clock Divide Ratio/Oscillator Frequency */
00054     0xa8,0x3f,      /*Set Multiplex Ratio */
00055     0x3d,0x00,      /*Set Display Offset*/
00056     0x40,           /*Set Display Start Line*/
00057     0xa1,           /*Set Segment Re-Map*/
00058     0xc8,           /*Set COM Output Scan Direction*/
00059     0xda,0x12,      /*Set COM Pins Hardware Configuration*/
00060     0x81,0xdf,      /*Set Current Control */
00061     0xd9,0x82,      /*Set Pre-Charge Period */
00062     0xdb,0x34,      /*Set VCOMH Deselect Level */
00063     0xa4,           /*Set Entire Display On/Off */
00064     0xa6,           /*Set Normal/Inverse Display*/
00065     U8G_ESC_VCC(1), /*Power up VCC & Stabilized */
00066     U8G_ESC_DLY(50),
00067     0xaf,           /*Set Display On */
00068     U8G_ESC_DLY(50),
00069     U8G_ESC_CS(0),             /* disable chip */
00070     U8G_ESC_END                /* end of sequence */
00071 };
00072 
00073 /* select one init sequence here */
00074   #define u8g_dev_ssd1309_128x64_init_seq u8g_dev_ssd1309_128x64_init_seq
00075   
00076   
00077  static const uint8_t u8g_dev_ssd1309_128x64_data_start[] PROGMEM = {
00078   U8G_ESC_ADR(0),           /* instruction mode */
00079   U8G_ESC_CS(1),             /* enable chip */
00080   0x010,        /* set upper 4 bit of the col adr to 0 */
00081   0x000,        /* set lower 4 bit of the col adr to 4  */
00082   U8G_ESC_END                /* end of sequence */
00083 };
00084 
00085 static const uint8_t u8g_dev_ssd13xx_sleep_on[] PROGMEM = {
00086   U8G_ESC_ADR(0),           /* instruction mode */
00087   U8G_ESC_CS(1),             /* enable chip */
00088   0x0ae,        /* display off */      
00089   U8G_ESC_CS(1),             /* disable chip */
00090   U8G_ESC_END                /* end of sequence */
00091 };
00092 
00093 static const uint8_t u8g_dev_ssd13xx_sleep_off[] PROGMEM = {
00094   U8G_ESC_ADR(0),           /* instruction mode */
00095   U8G_ESC_CS(1),             /* enable chip */
00096   0x0af,        /* display on */      
00097   U8G_ESC_DLY(50),       /* delay 50 ms */
00098   U8G_ESC_CS(1),             /* disable chip */
00099   U8G_ESC_END                /* end of sequence */
00100 };
00101 
00102 uint8_t u8g_dev_ssd1309_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
00103 {
00104   switch(msg)
00105   {
00106     case U8G_DEV_MSG_INIT:
00107       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
00108       u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1309_128x64_init_seq);
00109       break;
00110     case U8G_DEV_MSG_STOP:
00111       break;
00112     case U8G_DEV_MSG_PAGE_NEXT:
00113       {
00114         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
00115         u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1309_128x64_data_start);    
00116         u8g_WriteByte(u8g, dev, 0x0b0 | pb->p.page); /* select current page (SSD1306) */
00117         u8g_SetAddress(u8g, dev, 1);           /* data mode */
00118         if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
00119           return 0;
00120         u8g_SetChipSelect(u8g, dev, 0);
00121       }
00122       break;
00123     case U8G_DEV_MSG_CONTRAST:
00124       u8g_SetChipSelect(u8g, dev, 1);
00125       u8g_SetAddress(u8g, dev, 0);          /* instruction mode */
00126       u8g_WriteByte(u8g, dev, 0x081);
00127       u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
00128       u8g_SetChipSelect(u8g, dev, 0);      
00129       return 1; 
00130     case U8G_DEV_MSG_SLEEP_ON:
00131       u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_on);    
00132       return 1;
00133     case U8G_DEV_MSG_SLEEP_OFF:
00134       u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_off);    
00135       return 1;
00136   }
00137   return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
00138 }
00139 
00140 U8G_PB_DEV(u8g_dev_ssd1309_128x64_hw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_ssd1309_128x64_fn, U8G_COM_HW_SPI);
00141 U8G_PB_DEV(u8g_dev_ssd1309_128x64_sw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_ssd1309_128x64_fn, U8G_COM_SW_SPI);
00142 U8G_PB_DEV(u8g_dev_ssd1309_128x64_i2c, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_ssd1309_128x64_fn, U8G_COM_SSD_I2C);
00143  
00144