u8g_dev_lc7981_240x128.c

00001 /*
00002 
00003   u8g_dev_lc7981_240x128.c
00004   
00005   Hitachi Display SP14N002
00006   
00007   Universal 8bit Graphics Library
00008   
00009   Copyright (c) 2012, olikraus@gmail.com
00010   All rights reserved.
00011 
00012   Redistribution and use in source and binary forms, with or without modification, 
00013   are permitted provided that the following conditions are met:
00014 
00015   * Redistributions of source code must retain the above copyright notice, this list 
00016     of conditions and the following disclaimer.
00017     
00018   * Redistributions in binary form must reproduce the above copyright notice, this 
00019     list of conditions and the following disclaimer in the documentation and/or other 
00020     materials provided with the distribution.
00021 
00022   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 
00023   CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 
00024   INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
00025   MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
00026   DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 
00027   CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
00028   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
00029   NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
00030   LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
00031   CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
00032   STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
00033   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 
00034   ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.  
00035   
00036   
00037 */
00038 
00039 #include "u8g.h"
00040 
00041 #define WIDTH 240
00042 #define HEIGHT 128
00043 #define PAGE_HEIGHT 8
00044 
00045 
00046 /*
00047   http://www.mark-products.com/graphics.htm#240x128%20Pixel%20Format
00048 */
00049 
00050 static const uint8_t u8g_dev_lc7981_240x128_init_seq[] PROGMEM = {
00051   U8G_ESC_CS(0),             /* disable chip */
00052   U8G_ESC_ADR(1),           /* instruction mode */
00053   U8G_ESC_RST(15),           /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
00054   U8G_ESC_CS(1),             /* enable chip */
00055   U8G_ESC_DLY(50),         /* delay 50 ms */
00056   
00057   
00058   U8G_ESC_ADR(1),               /* instruction mode */
00059   0x000,                                /* mode register */
00060   U8G_ESC_ADR(0),               /* data mode */
00061   0x032,                                /* display on (bit 5), master mode on (bit 4), graphics mode on (bit 1)*/
00062 
00063   U8G_ESC_ADR(1),               /* instruction mode */
00064   0x001,                                /* character/bits per pixel pitch */
00065   U8G_ESC_ADR(0),               /* data mode */
00066   0x007,                                /* 8 bits per pixel */
00067 
00068   U8G_ESC_ADR(1),               /* instruction mode */
00069   0x002,                                /* number of chars/byte width of the screen */
00070   U8G_ESC_ADR(0),               /* data mode */
00071   WIDTH/8-1,                         /* 8 bits per pixel */
00072 
00073   U8G_ESC_ADR(1),               /* instruction mode */
00074   0x003,                                /* time division */
00075   U8G_ESC_ADR(0),               /* data mode */
00076   0x07f,                                /*  */
00077 
00078   U8G_ESC_ADR(1),               /* instruction mode */
00079   0x008,                                /* display start low */
00080   U8G_ESC_ADR(0),               /* data mode */
00081   0x000,                                /*  */
00082 
00083   U8G_ESC_ADR(1),               /* instruction mode */
00084   0x009,                                /* display start high */
00085   U8G_ESC_ADR(0),               /* data mode */
00086   0x000,                                /*  */
00087     
00088   U8G_ESC_DLY(10),               /* delay 10 ms */
00089   
00090   U8G_ESC_CS(0),             /* disable chip */
00091   U8G_ESC_END                /* end of sequence */
00092 };
00093 
00094 uint8_t u8g_dev_lc7981_240x128_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
00095 {
00096   switch(msg)
00097   {
00098     case U8G_DEV_MSG_INIT:
00099       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_NONE);
00100       u8g_WriteEscSeqP(u8g, dev, u8g_dev_lc7981_240x128_init_seq);
00101       break;
00102     case U8G_DEV_MSG_STOP:
00103       break;
00104     case U8G_DEV_MSG_PAGE_NEXT:
00105       {
00106         uint8_t y, i;
00107         uint16_t disp_ram_adr;
00108         uint8_t *ptr;
00109         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
00110         
00111         u8g_SetAddress(u8g, dev, 1);           /* cmd mode */
00112         u8g_SetChipSelect(u8g, dev, 1);
00113         y = pb->p.page_y0;
00114         ptr = pb->buf;
00115         disp_ram_adr = WIDTH/8;
00116         disp_ram_adr *= y;
00117         for( i = 0; i < 8; i ++ )
00118         {
00119           u8g_SetAddress(u8g, dev, 1);           /* cmd mode */
00120           u8g_WriteByte(u8g, dev, 0x00a );      /* display ram (cursor) address low byte */
00121           u8g_SetAddress(u8g, dev, 0);           /* data mode */
00122           u8g_WriteByte(u8g, dev, disp_ram_adr & 0x0ff );  
00123 
00124           u8g_SetAddress(u8g, dev, 1);           /* cmd mode */
00125           u8g_WriteByte(u8g, dev, 0x00b );      /* display ram (cursor) address hight byte */
00126           u8g_SetAddress(u8g, dev, 0);           /* data mode */
00127           u8g_WriteByte(u8g, dev, disp_ram_adr >> 8 );  
00128           
00129           u8g_SetAddress(u8g, dev, 1);           /* cmd mode */
00130           u8g_WriteByte(u8g, dev, 0x00c );      /* write data */
00131           u8g_SetAddress(u8g, dev, 0);           /* data mode */
00132           u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
00133           ptr += WIDTH/8;
00134           disp_ram_adr += WIDTH/8;
00135         }
00136         u8g_SetChipSelect(u8g, dev, 0);
00137       }
00138       break;
00139   }
00140   return u8g_dev_pb8h1f_base_fn(u8g, dev, msg, arg);
00141 }
00142 
00143 U8G_PB_DEV(u8g_dev_lc7981_240x128_8bit, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_lc7981_240x128_fn, U8G_COM_FAST_PARALLEL);
00144 
00145 
00146