u8g_dev_ili9325d_320x240.c

00001 /*
00002 
00003   u8g_dev_ili9325d_320x240.c
00004   
00005   Universal 8bit Graphics Library
00006   
00007   Copyright (c) 2011, olikraus@gmail.com
00008   All rights reserved.
00009 
00010   Redistribution and use in source and binary forms, with or without modification, 
00011   are permitted provided that the following conditions are met:
00012 
00013   * Redistributions of source code must retain the above copyright notice, this list 
00014     of conditions and the following disclaimer.
00015     
00016   * Redistributions in binary form must reproduce the above copyright notice, this 
00017     list of conditions and the following disclaimer in the documentation and/or other 
00018     materials provided with the distribution.
00019 
00020   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 
00021   CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 
00022   INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
00023   MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
00024   DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 
00025   CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
00026   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
00027   NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
00028   LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
00029   CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
00030   STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
00031   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 
00032   ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.  
00033 
00034   Color format
00035     Red: 5 Bit
00036     Green: 6 Bit
00037     Blue: 5 Bit
00038   
00039     
00040 */
00041 
00042 #include "u8g.h"
00043 
00044 #define WIDTH 240
00045 
00046 #if defined(U8G_16BIT)
00047 #define HEIGHT 320
00048 #else
00049 /* if the user tries to compile the 8Bit version of the lib, then restrict the height to something which fits to 8Bit */
00050 #define HEIGHT 240
00051 #endif
00052 #define PAGE_HEIGHT 4
00053 
00054 
00055 /*
00056   reference board for this device:
00057     http://iteadstudio.com/store/index.php?main_page=product_info&cPath=57_58&products_id=55
00058   documentation:
00059     http://iteadstudio.com/Downloadfile/ITDB02_material.rar
00060   datasheet
00061     http://www.newhavendisplay.com/app_notes/ILI9325D.pdf
00062   other libs
00063     http://henningkarlsen.com/electronics/library.php
00064   init sequence
00065     http://code.google.com/p/itdb02/, ITDB02.cpp, iteadstudio.com
00066 */
00067 
00068 static const uint8_t u8g_dev_ili9325d_320x240_init_seq[] PROGMEM = {
00069   U8G_ESC_CS(0),             /* disable chip */
00070   U8G_ESC_DLY(50),         /* delay 50 ms */
00071   U8G_ESC_RST(15),           /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
00072   U8G_ESC_DLY(50),         /* delay 50 ms */
00073   U8G_ESC_RST(15),           /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
00074   U8G_ESC_DLY(50),         /* delay 50 ms */
00075   U8G_ESC_CS(1),             /* enable chip */
00076   U8G_ESC_DLY(50),         /* delay 50 ms */
00077 
00078   
00079   //U8G_ESC_ADR(0),  0x000, 0x0E5,               /* only used for none D version: set SRAM internal timing */
00080   //U8G_ESC_ADR(1),  0x078, 0x0f0,             
00081   U8G_ESC_ADR(0),  0x000, 0x001,               /* Driver Output Control, bits 8 & 10 */
00082   U8G_ESC_ADR(1),  0x001, 0x000,           
00083   U8G_ESC_ADR(0),  0x000, 0x002,               /* LCD Driving Wave Control, bit 9: Set line inversion */
00084   U8G_ESC_ADR(1),  0x002, 0x000,               /* ITDB02 none D verion: 0x007, 0x000 */        
00085   U8G_ESC_ADR(0),  0x000, 0x003,               /* Entry Mode, GRAM write direction and BGR=1 */
00086   U8G_ESC_ADR(1),  0x010, 0x030,           
00087   U8G_ESC_ADR(0),  0x000, 0x004,               /* Resize register */
00088   U8G_ESC_ADR(1),  0x000, 0x000,           
00089   U8G_ESC_ADR(0),  0x000, 0x008,               /* Display Control 2: set the back porch and front porch */
00090   U8G_ESC_ADR(1),  0x002, 0x007,           
00091   
00092   U8G_ESC_ADR(0),  0x000, 0x009,               /* Display Control 3 */
00093   U8G_ESC_ADR(1),  0x000, 0x000,           
00094 
00095   U8G_ESC_ADR(0),  0x000, 0x00a,               /* Display Control 4: FMARK */
00096   U8G_ESC_ADR(1),  0x000, 0x000,           
00097   U8G_ESC_ADR(0),  0x000, 0x00c,               /* RGB Display Interface Control 1 */
00098   U8G_ESC_ADR(1),  0x000, 0x000,           
00099   U8G_ESC_ADR(0),  0x000, 0x00d,               /* Frame Maker Position */
00100   U8G_ESC_ADR(1),  0x000, 0x000,           
00101   U8G_ESC_ADR(0),  0x000, 0x00f,                /* RGB Display Interface Control 2 */
00102   U8G_ESC_ADR(1),  0x000, 0x000,  
00103   U8G_ESC_ADR(0),  0x000, 0x010,               /* Power Control 1: SAP, BT[3:0], AP, DSTB, SLP, STB */
00104   U8G_ESC_ADR(1),  0x000, 0x000,  
00105   U8G_ESC_ADR(0),  0x000, 0x011,               /* Power Control 2: DC1[2:0], DC0[2:0], VC[2:0] */
00106   U8G_ESC_ADR(1),  0x000, 0x007,  
00107   U8G_ESC_ADR(0),  0x000, 0x012,               /* Power Control 3: VREG1OUT voltage */
00108   U8G_ESC_ADR(1),  0x000, 0x000,  
00109   U8G_ESC_ADR(0),  0x000, 0x013,               /* Power Control 4: VDV[4:0] for VCOM amplitude */
00110   U8G_ESC_ADR(1),  0x000, 0x000,  
00111   U8G_ESC_ADR(0),  0x000, 0x007,               /* Display Control 1: Operate, but do not display */
00112   U8G_ESC_ADR(1),  0x000, 0x001,   
00113   
00114   U8G_ESC_DLY(100),         /* delay 100 ms */  /*  ITDB02 none D verion:  50ms */
00115   U8G_ESC_DLY(100),         /* delay 100 ms */
00116   
00117   U8G_ESC_ADR(0),  0x000, 0x010,               /* Power Control 1: SAP, BT[3:0], AP, DSTB, SLP, STB */
00118   U8G_ESC_ADR(1),  0x016, 0x090,               /*  ITDB02 none D verion:  0x010, 0x090 */
00119   U8G_ESC_ADR(0),  0x000, 0x011,               /* Power Control 2: SAP, BT[3:0], AP, DSTB, SLP, STB */
00120   U8G_ESC_ADR(1),  0x002, 0x027,
00121 
00122   U8G_ESC_DLY(50),         /* delay 50 ms */
00123   
00124   U8G_ESC_ADR(0),  0x000, 0x012,               /* Power Control 3: VCI: External, VCI*1.80 */
00125   U8G_ESC_ADR(1),  0x000, 0x00d,               /*  ITDB02 none D verion:  0x000, 0x01f */
00126 
00127   U8G_ESC_DLY(50),         /* delay 50 ms */
00128   
00129   U8G_ESC_ADR(0),  0x000, 0x013,               /* Power Control 4: VDV[4:0] for VCOM amplitude */
00130   U8G_ESC_ADR(1),  0x012, 0x000,               /*  ITDB02 none D verion:  0x015, 0x000 */
00131   U8G_ESC_ADR(0),  0x000, 0x029,               /* Power Control 7 */
00132   U8G_ESC_ADR(1),  0x000, 0x00a,               /*  ITDB02 none D verion:  0x000, 0x027 */
00133   U8G_ESC_ADR(0),  0x000, 0x02b,               /* Frame Rate: 83 */
00134   U8G_ESC_ADR(1),  0x000, 0x00d,
00135 
00136   U8G_ESC_DLY(50),         /* delay 50 ms */
00137   
00138   U8G_ESC_ADR(0),  0x000, 0x020,               /* Horizontal GRAM Address Set */
00139   U8G_ESC_ADR(1),  0x000, 0x000,
00140   U8G_ESC_ADR(0),  0x000, 0x021,               /* Vertical GRAM Address Set */
00141   U8G_ESC_ADR(1),  0x000, 0x000,
00142 
00143   /* gamma control */
00144   U8G_ESC_ADR(0),  0x000, 0x030,               
00145   U8G_ESC_ADR(1),  0x000, 0x000,
00146   U8G_ESC_ADR(0),  0x000, 0x031,
00147   U8G_ESC_ADR(1),  0x004, 0x004,
00148   U8G_ESC_ADR(0),  0x000, 0x032,
00149   U8G_ESC_ADR(1),  0x000, 0x003,
00150   U8G_ESC_ADR(0),  0x000, 0x035,               
00151   U8G_ESC_ADR(1),  0x004, 0x005,
00152   U8G_ESC_ADR(0),  0x000, 0x036,               
00153   U8G_ESC_ADR(1),  0x008, 0x008,
00154   U8G_ESC_ADR(0),  0x000, 0x037,               
00155   U8G_ESC_ADR(1),  0x004, 0x007,
00156   U8G_ESC_ADR(0),  0x000, 0x038,               
00157   U8G_ESC_ADR(1),  0x003, 0x003,
00158   U8G_ESC_ADR(0),  0x000, 0x039,               
00159   U8G_ESC_ADR(1),  0x007, 0x007,
00160   U8G_ESC_ADR(0),  0x000, 0x03c,               
00161   U8G_ESC_ADR(1),  0x005, 0x004,
00162   U8G_ESC_ADR(0),  0x000, 0x03d,               
00163   U8G_ESC_ADR(1),  0x008, 0x008,
00164   
00165   U8G_ESC_ADR(0),  0x000, 0x050,               /* Horizontal GRAM Start Address */
00166   U8G_ESC_ADR(1),  0x000, 0x000,
00167   U8G_ESC_ADR(0),  0x000, 0x051,               /* Horizontal GRAM End Address: 239 */
00168   U8G_ESC_ADR(1),  0x000, 0x0EF,
00169   U8G_ESC_ADR(0),  0x000, 0x052,               /* Vertical GRAM Start Address */
00170   U8G_ESC_ADR(1),  0x000, 0x000,
00171   U8G_ESC_ADR(0),  0x000, 0x053,               /* Vertical GRAM End Address: 319 */
00172   U8G_ESC_ADR(1),  0x001, 0x03F,
00173   
00174   U8G_ESC_ADR(0),  0x000, 0x060,               /* Driver Output Control 2 */
00175   U8G_ESC_ADR(1),  0x0a7, 0x000,
00176   U8G_ESC_ADR(0),  0x000, 0x061,               /* Base Image Display Control: NDL,VLE, REV */
00177   U8G_ESC_ADR(1),  0x000, 0x001,
00178   U8G_ESC_ADR(0),  0x000, 0x06a,               /* Vertical Scroll Control */
00179   U8G_ESC_ADR(1),  0x000, 0x000,
00180 
00181   U8G_ESC_ADR(0),  0x000, 0x080,               /* Partial Image 1 Display Position */
00182   U8G_ESC_ADR(1),  0x000, 0x000,
00183   U8G_ESC_ADR(0),  0x000, 0x081,               /* Partial Image 1 RAM Start Address */
00184   U8G_ESC_ADR(1),  0x000, 0x000,
00185   U8G_ESC_ADR(0),  0x000, 0x082,               /* Partial Image 1 RAM End Address */
00186   U8G_ESC_ADR(1),  0x000, 0x000,
00187   U8G_ESC_ADR(0),  0x000, 0x083,               /* Partial Image 2 Display Position */
00188   U8G_ESC_ADR(1),  0x000, 0x000,
00189   U8G_ESC_ADR(0),  0x000, 0x084,               /* Partial Image 2 RAM Start Address */
00190   U8G_ESC_ADR(1),  0x000, 0x000,
00191   U8G_ESC_ADR(0),  0x000, 0x085,               /* Partial Image 2 RAM End Address */
00192   U8G_ESC_ADR(1),  0x000, 0x000,
00193 
00194   U8G_ESC_ADR(0),  0x000, 0x090,               /* Panel Interface Control 1 */
00195   U8G_ESC_ADR(1),  0x000, 0x010,
00196   U8G_ESC_ADR(0),  0x000, 0x092,               /* Panel Interface Control 2 */
00197   U8G_ESC_ADR(1),  0x000, 0x000,        /* 0x006, 0x000 */
00198 
00199   U8G_ESC_ADR(0),  0x000, 0x007,               /* Display Control 1: Operate, display ON */
00200   U8G_ESC_ADR(1),  0x001, 0x033,   
00201 
00202   U8G_ESC_DLY(10),               /* delay 10 ms */
00203   
00204   /* write test pattern */  
00205   U8G_ESC_ADR(0),  0x000, 0x020,               /* Horizontal GRAM Address Set */
00206   U8G_ESC_ADR(1),  0x000, 0x000,
00207   U8G_ESC_ADR(0),  0x000, 0x021,               /* Vertical GRAM Address Set */
00208   U8G_ESC_ADR(1),  0x000, 0x010,
00209   U8G_ESC_ADR(0),  0x000, 0x022,               /* Write Data to GRAM */
00210   U8G_ESC_ADR(1),  0x0fe, 0x0fe,
00211   0x000, 0x000,
00212   0x0fe, 0x0fe,
00213   0x000, 0x000,
00214   0x0fe, 0x0fe,
00215   0x000, 0x000,
00216   0x0fe, 0x0fe,
00217   0x000, 0x000,
00218   0x0fe, 0x0fe,
00219   0x000, 0x000,
00220   0x0fe, 0x0fe,
00221   0x000, 0x000,
00222   0x0fe, 0x0fe,
00223   0x000, 0x000,
00224   0x0fe, 0x0fe,
00225   0x000, 0x000,
00226   0x0fe, 0x0fe,
00227   
00228   U8G_ESC_CS(0),             /* disable chip */
00229   U8G_ESC_END                /* end of sequence */
00230 };
00231 
00232 
00233 static const uint8_t u8g_dev_ili9325d_320x240_page_seq[] PROGMEM = {
00234   U8G_ESC_CS(1),             /* enable chip */
00235   U8G_ESC_ADR(0),  0x000, 0x020,               /* Horizontal GRAM Address Set */
00236   U8G_ESC_ADR(1),  0x000, 0x000,
00237   U8G_ESC_ADR(0),  0x000, 0x021,               /* Vertical GRAM Address Set */
00238   U8G_ESC_ADR(1), 
00239   U8G_ESC_END                /* end of sequence */
00240 };
00241 
00242 /* convert the internal RGB 332 to 65K high byte */
00243 static uint8_t u8g_dev_ili9325d_get_65K_high_byte(uint8_t color)
00244 {
00245   uint8_t h;
00246   h = color;
00247   h &= 0x0e0;
00248   h |= h>>3;
00249   h &= 0x0f8;
00250   color>>=2;
00251   color &= 7;
00252   h |= color;
00253   return h;  
00254 }
00255 
00256 /* convert the internal RGB 332 to 65K high byte */
00257 static uint8_t u8g_dev_ili9325d_get_65K_low_byte(uint8_t color)
00258 {
00259   uint8_t l;
00260   l = color;
00261   l <<= 3;
00262   color &= 3;
00263   color <<= 1;
00264   l |= color;
00265   return l;  
00266 }
00267 
00268 
00269 uint8_t u8g_dev_ili9325d_320x240_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
00270 {
00271   
00272   switch(msg)
00273   {
00274     case U8G_DEV_MSG_INIT:
00275       u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_50NS);
00276       //for(;;)
00277         u8g_WriteEscSeqP(u8g, dev, u8g_dev_ili9325d_320x240_init_seq);
00278     
00279       break;
00280     case U8G_DEV_MSG_STOP:
00281       break;
00282     case U8G_DEV_MSG_PAGE_NEXT:
00283       {
00284         uint8_t i;
00285         uint16_t y, j;
00286         uint8_t *ptr;
00287         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
00288         
00289         y = pb->p.page_y0;
00290         ptr = pb->buf;
00291         for( i = 0; i < pb->p.page_height; i ++ )
00292         {
00293           u8g_WriteEscSeqP(u8g, dev, u8g_dev_ili9325d_320x240_page_seq);
00294           u8g_WriteByte(u8g, dev, y >> 8 );      /* display ram (cursor) address high byte */
00295           u8g_WriteByte(u8g, dev, y & 255 );      /* display ram (cursor) address low byte */
00296 
00297           u8g_SetAddress(u8g, dev, 0);           /* cmd mode */
00298           u8g_WriteByte(u8g, dev, 0 );  
00299           u8g_WriteByte(u8g, dev, 0x022 );      /* start gram data */  
00300           
00301           u8g_SetAddress(u8g, dev, 1);           /* data mode */
00302           
00303           for( j = 0; j < pb->width; j++ )
00304           {
00305             u8g_WriteByte(u8g, dev, u8g_dev_ili9325d_get_65K_high_byte(*ptr) );  
00306             u8g_WriteByte(u8g, dev, u8g_dev_ili9325d_get_65K_low_byte(*ptr) );  
00307               
00308             ptr++;
00309           }
00310           y++;
00311         }
00312         u8g_SetChipSelect(u8g, dev, 0);
00313       }
00314       break;
00315   }
00316   return u8g_dev_pb8h8_base_fn(u8g, dev, msg, arg);
00317 }
00318 
00319 uint8_t u8g_ili9325d_320x240_8h8_buf[WIDTH*PAGE_HEIGHT] U8G_NOCOMMON ; 
00320 u8g_pb_t u8g_ili9325d_320x240_8h8_pb U8G_NOCOMMON = { {PAGE_HEIGHT, HEIGHT, 0, 0, 0},  WIDTH, u8g_ili9325d_320x240_8h8_buf}; 
00321 u8g_dev_t u8g_dev_ili9325d_320x240_8bit U8G_NOCOMMON = { u8g_dev_ili9325d_320x240_fn, &u8g_ili9325d_320x240_8h8_pb, u8g_com_arduino_port_d_wr_fn };
00322 //u8g_dev_t u8g_dev_ili9325d_320x240_8bit = { u8g_dev_ili9325d_320x240_fn, &u8g_ili9325d_320x240_8h8_pb, u8g_com_arduino_parallel_fn };
00323 
00324 //U8G_PB_DEV(u8g_dev_ili9325d_320x240_8bit, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_ili9325d_320x240_fn, U8G_COM_PARALLEL);
00325 
00326 
00327