Diff: targets/cmsis/TARGET_NXP/TARGET_LPC43XX/TOOLCHAIN_IAR/LPC43xx.icf

Revision:

20:4263a77256ae

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/cmsis/TARGET_NXP/TARGET_LPC43XX/TOOLCHAIN_IAR/LPC43xx.icf	Tue Sep 10 15:14:19 2013 +0300
@@ -0,0 +1,35 @@
+/* [ROM] */
+define symbol __intvec_start__     = 0x14000000;
+define symbol __region_ROM_start__ = 0x14000000;
+define symbol __region_ROM_end__   = 0x143FFFFF;
+
+/* [RAM] Vector table dynamic copy: 8_byte_aligned(69 vect * 4 bytes) =  8_byte_aligned(0x0114) = 0x0118*/
+define symbol __NVIC_start__       = 0x10000000;
+define symbol __NVIC_end__         = 0x10000117;
+define symbol __region_RAM_start__ = 0x10000118;
+define symbol __region_RAM_end__   = 0x1001FFDF;
+define symbol _AHB_RAM_start__     = 0x20000000;
+define symbol _AHB_RAM_end__       = 0x20007FFF;
+
+/* Memory regions */
+define memory mem with size = 4G;
+
+define region ROM_region     = mem:[from __region_ROM_start__   to __region_ROM_end__];
+
+define region RAM_region     = mem:[from __region_RAM_start__   to __region_RAM_end__];
+define region AHB_RAM_region = mem:[from _AHB_RAM_start__ to _AHB_RAM_end__];
+
+/* Stack and Heap */
+define symbol __size_cstack__   = 0x800;
+define symbol __size_heap__     = 0x800;
+define block CSTACK    with alignment = 8, size = __size_cstack__   { };
+define block HEAP      with alignment = 8, size = __size_heap__     { };
+define block STACKHEAP with fixed order { block HEAP, block CSTACK };
+
+initialize by copy with packing = zeros { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__intvec_start__ { section .intvec };
+place in ROM_region     { readonly };
+place in RAM_region     { readwrite, block STACKHEAP };
+place in AHB_RAM_region { section USB_RAM };