david dicarlo / mbed-src-FLL48

mbed library sources: Modified to operate FRDM-KL25Z at 48MHz from internal 32kHz oscillator (nothing else changed).

Fork of mbed-src by mbed official

The only file that changed is: mbed-src-FLL48/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/system_MKL25Z4.h

targets/hal/TARGET_NXP/TARGET_LPC11CXX/spi_api.c@20:4263a77256ae, 2013-09-10 (annotated)

Committer:
bogdanm
Date:
Tue Sep 10 15:14:19 2013 +0300
Revision:
20:4263a77256ae
Sync with git revision 171dda705c947bf910926a0b73d6a4797802554d

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 20:4263a77256ae 1 /* mbed Microcontroller Library
bogdanm 20:4263a77256ae 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 20:4263a77256ae 3 *
bogdanm 20:4263a77256ae 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 20:4263a77256ae 5 * you may not use this file except in compliance with the License.
bogdanm 20:4263a77256ae 6 * You may obtain a copy of the License at
bogdanm 20:4263a77256ae 7 *
bogdanm 20:4263a77256ae 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 20:4263a77256ae 9 *
bogdanm 20:4263a77256ae 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 20:4263a77256ae 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 20:4263a77256ae 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 20:4263a77256ae 13 * See the License for the specific language governing permissions and
bogdanm 20:4263a77256ae 14 * limitations under the License.
bogdanm 20:4263a77256ae 15 */
bogdanm 20:4263a77256ae 16 #include <math.h>
bogdanm 20:4263a77256ae 17 #include "spi_api.h"
bogdanm 20:4263a77256ae 18 #include "cmsis.h"
bogdanm 20:4263a77256ae 19 #include "pinmap.h"
bogdanm 20:4263a77256ae 20 #include "error.h"
bogdanm 20:4263a77256ae 21
bogdanm 20:4263a77256ae 22 static const PinMap PinMap_SPI_SCLK[] = {
bogdanm 20:4263a77256ae 23 {P0_6 , SPI_0, 0x02},
bogdanm 20:4263a77256ae 24 {P0_10, SPI_0, 0x02},
bogdanm 20:4263a77256ae 25 {P2_11, SPI_0, 0x01},
bogdanm 20:4263a77256ae 26 {P2_1 , SPI_1, 0x02},
bogdanm 20:4263a77256ae 27 {NC , NC , 0}
bogdanm 20:4263a77256ae 28 };
bogdanm 20:4263a77256ae 29
bogdanm 20:4263a77256ae 30 static const PinMap PinMap_SPI_MOSI[] = {
bogdanm 20:4263a77256ae 31 {P0_9 , SPI_0, 0x01},
bogdanm 20:4263a77256ae 32 {P2_3 , SPI_1, 0x02},
bogdanm 20:4263a77256ae 33 {NC , NC , 0}
bogdanm 20:4263a77256ae 34 };
bogdanm 20:4263a77256ae 35
bogdanm 20:4263a77256ae 36 static const PinMap PinMap_SPI_MISO[] = {
bogdanm 20:4263a77256ae 37 {P0_8 , SPI_0, 0x01},
bogdanm 20:4263a77256ae 38 {P2_2 , SPI_1, 0x02},
bogdanm 20:4263a77256ae 39 {NC , NC , 0}
bogdanm 20:4263a77256ae 40 };
bogdanm 20:4263a77256ae 41
bogdanm 20:4263a77256ae 42 static const PinMap PinMap_SPI_SSEL[] = {
bogdanm 20:4263a77256ae 43 {P0_2 , SPI_0, 0x01},
bogdanm 20:4263a77256ae 44 {P2_0 , SPI_1, 0x02},
bogdanm 20:4263a77256ae 45 {NC , NC , 0}
bogdanm 20:4263a77256ae 46 };
bogdanm 20:4263a77256ae 47
bogdanm 20:4263a77256ae 48 static inline int ssp_disable(spi_t *obj);
bogdanm 20:4263a77256ae 49 static inline int ssp_enable(spi_t *obj);
bogdanm 20:4263a77256ae 50
bogdanm 20:4263a77256ae 51 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
bogdanm 20:4263a77256ae 52 // determine the SPI to use
bogdanm 20:4263a77256ae 53 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
bogdanm 20:4263a77256ae 54 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
bogdanm 20:4263a77256ae 55 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
bogdanm 20:4263a77256ae 56 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
bogdanm 20:4263a77256ae 57 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
bogdanm 20:4263a77256ae 58 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
bogdanm 20:4263a77256ae 59
bogdanm 20:4263a77256ae 60 obj->spi = (LPC_SSP_TypeDef*)pinmap_merge(spi_data, spi_cntl);
bogdanm 20:4263a77256ae 61
bogdanm 20:4263a77256ae 62 if ((int)obj->spi == NC) {
bogdanm 20:4263a77256ae 63 error("SPI pinout mapping failed");
bogdanm 20:4263a77256ae 64 }
bogdanm 20:4263a77256ae 65
bogdanm 20:4263a77256ae 66 // enable power and clocking
bogdanm 20:4263a77256ae 67 switch ((int)obj->spi) {
bogdanm 20:4263a77256ae 68 case SPI_0:
bogdanm 20:4263a77256ae 69 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 11;
bogdanm 20:4263a77256ae 70 LPC_SYSCON->SSP0CLKDIV = 0x01;
bogdanm 20:4263a77256ae 71 LPC_SYSCON->PRESETCTRL |= 1 << 0;
bogdanm 20:4263a77256ae 72 break;
bogdanm 20:4263a77256ae 73 case SPI_1:
bogdanm 20:4263a77256ae 74 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 18;
bogdanm 20:4263a77256ae 75 LPC_SYSCON->SSP1CLKDIV = 0x01;
bogdanm 20:4263a77256ae 76 LPC_SYSCON->PRESETCTRL |= 1 << 2;
bogdanm 20:4263a77256ae 77 break;
bogdanm 20:4263a77256ae 78 }
bogdanm 20:4263a77256ae 79
bogdanm 20:4263a77256ae 80 // set default format and frequency
bogdanm 20:4263a77256ae 81 if (ssel == NC) {
bogdanm 20:4263a77256ae 82 spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
bogdanm 20:4263a77256ae 83 } else {
bogdanm 20:4263a77256ae 84 spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
bogdanm 20:4263a77256ae 85 }
bogdanm 20:4263a77256ae 86 spi_frequency(obj, 1000000);
bogdanm 20:4263a77256ae 87
bogdanm 20:4263a77256ae 88 // enable the ssp channel
bogdanm 20:4263a77256ae 89 ssp_enable(obj);
bogdanm 20:4263a77256ae 90
bogdanm 20:4263a77256ae 91 // pin out the spi pins
bogdanm 20:4263a77256ae 92 pinmap_pinout(mosi, PinMap_SPI_MOSI);
bogdanm 20:4263a77256ae 93 pinmap_pinout(miso, PinMap_SPI_MISO);
bogdanm 20:4263a77256ae 94 pinmap_pinout(sclk, PinMap_SPI_SCLK);
bogdanm 20:4263a77256ae 95 if (ssel != NC) {
bogdanm 20:4263a77256ae 96 pinmap_pinout(ssel, PinMap_SPI_SSEL);
bogdanm 20:4263a77256ae 97 }
bogdanm 20:4263a77256ae 98 }
bogdanm 20:4263a77256ae 99
bogdanm 20:4263a77256ae 100 void spi_free(spi_t *obj) {}
bogdanm 20:4263a77256ae 101
bogdanm 20:4263a77256ae 102 void spi_format(spi_t *obj, int bits, int mode, int slave) {
bogdanm 20:4263a77256ae 103 ssp_disable(obj);
bogdanm 20:4263a77256ae 104
bogdanm 20:4263a77256ae 105 if (!(bits >= 4 && bits <= 16) || !(mode >= 0 && mode <= 3)) {
bogdanm 20:4263a77256ae 106 error("SPI format error");
bogdanm 20:4263a77256ae 107 }
bogdanm 20:4263a77256ae 108
bogdanm 20:4263a77256ae 109 int polarity = (mode & 0x2) ? 1 : 0;
bogdanm 20:4263a77256ae 110 int phase = (mode & 0x1) ? 1 : 0;
bogdanm 20:4263a77256ae 111
bogdanm 20:4263a77256ae 112 // set it up
bogdanm 20:4263a77256ae 113 int DSS = bits - 1; // DSS (data select size)
bogdanm 20:4263a77256ae 114 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
bogdanm 20:4263a77256ae 115 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
bogdanm 20:4263a77256ae 116
bogdanm 20:4263a77256ae 117 int FRF = 0; // FRF (frame format) = SPI
bogdanm 20:4263a77256ae 118 uint32_t tmp = obj->spi->CR0;
bogdanm 20:4263a77256ae 119 tmp &= ~(0xFFFF);
bogdanm 20:4263a77256ae 120 tmp |= DSS << 0
bogdanm 20:4263a77256ae 121 | FRF << 4
bogdanm 20:4263a77256ae 122 | SPO << 6
bogdanm 20:4263a77256ae 123 | SPH << 7;
bogdanm 20:4263a77256ae 124 obj->spi->CR0 = tmp;
bogdanm 20:4263a77256ae 125
bogdanm 20:4263a77256ae 126 tmp = obj->spi->CR1;
bogdanm 20:4263a77256ae 127 tmp &= ~(0xD);
bogdanm 20:4263a77256ae 128 tmp |= 0 << 0 // LBM - loop back mode - off
bogdanm 20:4263a77256ae 129 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
bogdanm 20:4263a77256ae 130 | 0 << 3; // SOD - slave output disable - na
bogdanm 20:4263a77256ae 131 obj->spi->CR1 = tmp;
bogdanm 20:4263a77256ae 132
bogdanm 20:4263a77256ae 133 ssp_enable(obj);
bogdanm 20:4263a77256ae 134 }
bogdanm 20:4263a77256ae 135
bogdanm 20:4263a77256ae 136 void spi_frequency(spi_t *obj, int hz) {
bogdanm 20:4263a77256ae 137 ssp_disable(obj);
bogdanm 20:4263a77256ae 138
bogdanm 20:4263a77256ae 139 uint32_t PCLK = SystemCoreClock;
bogdanm 20:4263a77256ae 140
bogdanm 20:4263a77256ae 141 int prescaler;
bogdanm 20:4263a77256ae 142
bogdanm 20:4263a77256ae 143 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
bogdanm 20:4263a77256ae 144 int prescale_hz = PCLK / prescaler;
bogdanm 20:4263a77256ae 145
bogdanm 20:4263a77256ae 146 // calculate the divider
bogdanm 20:4263a77256ae 147 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
bogdanm 20:4263a77256ae 148
bogdanm 20:4263a77256ae 149 // check we can support the divider
bogdanm 20:4263a77256ae 150 if (divider < 256) {
bogdanm 20:4263a77256ae 151 // prescaler
bogdanm 20:4263a77256ae 152 obj->spi->CPSR = prescaler;
bogdanm 20:4263a77256ae 153
bogdanm 20:4263a77256ae 154 // divider
bogdanm 20:4263a77256ae 155 obj->spi->CR0 &= ~(0xFFFF << 8);
bogdanm 20:4263a77256ae 156 obj->spi->CR0 |= (divider - 1) << 8;
bogdanm 20:4263a77256ae 157 ssp_enable(obj);
bogdanm 20:4263a77256ae 158 return;
bogdanm 20:4263a77256ae 159 }
bogdanm 20:4263a77256ae 160 }
bogdanm 20:4263a77256ae 161 error("Couldn't setup requested SPI frequency");
bogdanm 20:4263a77256ae 162 }
bogdanm 20:4263a77256ae 163
bogdanm 20:4263a77256ae 164 static inline int ssp_disable(spi_t *obj) {
bogdanm 20:4263a77256ae 165 return obj->spi->CR1 &= ~(1 << 1);
bogdanm 20:4263a77256ae 166 }
bogdanm 20:4263a77256ae 167
bogdanm 20:4263a77256ae 168 static inline int ssp_enable(spi_t *obj) {
bogdanm 20:4263a77256ae 169 return obj->spi->CR1 |= (1 << 1);
bogdanm 20:4263a77256ae 170 }
bogdanm 20:4263a77256ae 171
bogdanm 20:4263a77256ae 172 static inline int ssp_readable(spi_t *obj) {
bogdanm 20:4263a77256ae 173 return obj->spi->SR & (1 << 2);
bogdanm 20:4263a77256ae 174 }
bogdanm 20:4263a77256ae 175
bogdanm 20:4263a77256ae 176 static inline int ssp_writeable(spi_t *obj) {
bogdanm 20:4263a77256ae 177 return obj->spi->SR & (1 << 1);
bogdanm 20:4263a77256ae 178 }
bogdanm 20:4263a77256ae 179
bogdanm 20:4263a77256ae 180 static inline void ssp_write(spi_t *obj, int value) {
bogdanm 20:4263a77256ae 181 while (!ssp_writeable(obj));
bogdanm 20:4263a77256ae 182 obj->spi->DR = value;
bogdanm 20:4263a77256ae 183 }
bogdanm 20:4263a77256ae 184
bogdanm 20:4263a77256ae 185 static inline int ssp_read(spi_t *obj) {
bogdanm 20:4263a77256ae 186 while (!ssp_readable(obj));
bogdanm 20:4263a77256ae 187 return obj->spi->DR;
bogdanm 20:4263a77256ae 188 }
bogdanm 20:4263a77256ae 189
bogdanm 20:4263a77256ae 190 static inline int ssp_busy(spi_t *obj) {
bogdanm 20:4263a77256ae 191 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
bogdanm 20:4263a77256ae 192 }
bogdanm 20:4263a77256ae 193
bogdanm 20:4263a77256ae 194 int spi_master_write(spi_t *obj, int value) {
bogdanm 20:4263a77256ae 195 ssp_write(obj, value);
bogdanm 20:4263a77256ae 196 return ssp_read(obj);
bogdanm 20:4263a77256ae 197 }
bogdanm 20:4263a77256ae 198
bogdanm 20:4263a77256ae 199 int spi_slave_receive(spi_t *obj) {
bogdanm 20:4263a77256ae 200 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
bogdanm 20:4263a77256ae 201 };
bogdanm 20:4263a77256ae 202
bogdanm 20:4263a77256ae 203 int spi_slave_read(spi_t *obj) {
bogdanm 20:4263a77256ae 204 return obj->spi->DR;
bogdanm 20:4263a77256ae 205 }
bogdanm 20:4263a77256ae 206
bogdanm 20:4263a77256ae 207 void spi_slave_write(spi_t *obj, int value) {
bogdanm 20:4263a77256ae 208 while (ssp_writeable(obj) == 0) ;
bogdanm 20:4263a77256ae 209 obj->spi->DR = value;
bogdanm 20:4263a77256ae 210 }
bogdanm 20:4263a77256ae 211
bogdanm 20:4263a77256ae 212 int spi_busy(spi_t *obj) {
bogdanm 20:4263a77256ae 213 return ssp_busy(obj);
bogdanm 20:4263a77256ae 214 }