david dicarlo / mbed-src-FLL48

mbed library sources: Modified to operate FRDM-KL25Z at 48MHz from internal 32kHz oscillator (nothing else changed).

Fork of mbed-src by mbed official

The only file that changed is: mbed-src-FLL48/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/system_MKL25Z4.h

targets/hal/TARGET_NXP/TARGET_LPC11CXX/port_api.c@20:4263a77256ae, 2013-09-10 (annotated)

Committer:
bogdanm
Date:
Tue Sep 10 15:14:19 2013 +0300
Revision:
20:4263a77256ae
Sync with git revision 171dda705c947bf910926a0b73d6a4797802554d

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 20:4263a77256ae 1 /* mbed Microcontroller Library
bogdanm 20:4263a77256ae 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 20:4263a77256ae 3 *
bogdanm 20:4263a77256ae 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 20:4263a77256ae 5 * you may not use this file except in compliance with the License.
bogdanm 20:4263a77256ae 6 * You may obtain a copy of the License at
bogdanm 20:4263a77256ae 7 *
bogdanm 20:4263a77256ae 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 20:4263a77256ae 9 *
bogdanm 20:4263a77256ae 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 20:4263a77256ae 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 20:4263a77256ae 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 20:4263a77256ae 13 * See the License for the specific language governing permissions and
bogdanm 20:4263a77256ae 14 * limitations under the License.
bogdanm 20:4263a77256ae 15 */
bogdanm 20:4263a77256ae 16
bogdanm 20:4263a77256ae 17 #include "port_api.h"
bogdanm 20:4263a77256ae 18 #include "pinmap.h"
bogdanm 20:4263a77256ae 19 #include "gpio_api.h"
bogdanm 20:4263a77256ae 20
bogdanm 20:4263a77256ae 21 // LPC114 IOCON offset table [port][pin]
bogdanm 20:4263a77256ae 22
bogdanm 20:4263a77256ae 23 static uint8_t iocon_offset[4][12] = {
bogdanm 20:4263a77256ae 24 {0x0c,0x10,0x1c,0x2c,0x30,0x34,0x4c,0x50,0x60,0x64,0x68,0x74}, // PORT 0
bogdanm 20:4263a77256ae 25 {0x78,0x7c,0x80,0x90,0x94,0xa0,0xa4,0xa8,0x14,0x38,0x6c,0x98}, // PORT 1
bogdanm 20:4263a77256ae 26 {0x08,0x28,0x5c,0x8c,0x40,0x44,0x00,0x20,0x24,0x54,0x58,0x70}, // PORT 2
bogdanm 20:4263a77256ae 27 {0x84,0x88,0x9c,0xac,0x3c,0x48} // PORT 3
bogdanm 20:4263a77256ae 28 };
bogdanm 20:4263a77256ae 29
bogdanm 20:4263a77256ae 30 PinName port_pin(PortName port, int pin) {
bogdanm 20:4263a77256ae 31 return (PinName)((port << PORT_SHIFT) | (pin << PIN_SHIFT) | (uint32_t)iocon_offset[port][pin]);
bogdanm 20:4263a77256ae 32 }
bogdanm 20:4263a77256ae 33
bogdanm 20:4263a77256ae 34 void port_init(port_t *obj, PortName port, int mask, PinDirection dir) {
bogdanm 20:4263a77256ae 35 obj->port = port;
bogdanm 20:4263a77256ae 36 obj->mask = mask;
bogdanm 20:4263a77256ae 37
bogdanm 20:4263a77256ae 38 LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) (LPC_GPIO0_BASE + (port * 0x10000)));
bogdanm 20:4263a77256ae 39
bogdanm 20:4263a77256ae 40 obj->reg_data = &port_reg->DATA;
bogdanm 20:4263a77256ae 41 obj->reg_dir = &port_reg->DIR;
bogdanm 20:4263a77256ae 42
bogdanm 20:4263a77256ae 43 uint32_t i;
bogdanm 20:4263a77256ae 44 // The function is set per pin: reuse gpio logic
bogdanm 20:4263a77256ae 45 for (i=0; i<12; i++) {
bogdanm 20:4263a77256ae 46 if (obj->mask & (1<<i)) {
bogdanm 20:4263a77256ae 47 gpio_set(port_pin(obj->port, i));
bogdanm 20:4263a77256ae 48 }
bogdanm 20:4263a77256ae 49 }
bogdanm 20:4263a77256ae 50
bogdanm 20:4263a77256ae 51 port_dir(obj, dir);
bogdanm 20:4263a77256ae 52 }
bogdanm 20:4263a77256ae 53
bogdanm 20:4263a77256ae 54 void port_mode(port_t *obj, PinMode mode) {
bogdanm 20:4263a77256ae 55 uint32_t i;
bogdanm 20:4263a77256ae 56 // The mode is set per pin: reuse pinmap logic
bogdanm 20:4263a77256ae 57 for (i=0; i<12; i++) {
bogdanm 20:4263a77256ae 58 if (obj->mask & (1<<i)) {
bogdanm 20:4263a77256ae 59 pin_mode(port_pin(obj->port, i), mode);
bogdanm 20:4263a77256ae 60 }
bogdanm 20:4263a77256ae 61 }
bogdanm 20:4263a77256ae 62 }
bogdanm 20:4263a77256ae 63
bogdanm 20:4263a77256ae 64 void port_dir(port_t *obj, PinDirection dir) {
bogdanm 20:4263a77256ae 65 switch (dir) {
bogdanm 20:4263a77256ae 66 case PIN_INPUT : *obj->reg_dir &= ~obj->mask; break;
bogdanm 20:4263a77256ae 67 case PIN_OUTPUT: *obj->reg_dir |= obj->mask; break;
bogdanm 20:4263a77256ae 68 }
bogdanm 20:4263a77256ae 69 }
bogdanm 20:4263a77256ae 70
bogdanm 20:4263a77256ae 71 void port_write(port_t *obj, int value) {
bogdanm 20:4263a77256ae 72 *obj->reg_data = (value & obj->mask);
bogdanm 20:4263a77256ae 73 }
bogdanm 20:4263a77256ae 74
bogdanm 20:4263a77256ae 75 int port_read(port_t *obj) {
bogdanm 20:4263a77256ae 76 return (*obj->reg_data & obj->mask);
bogdanm 20:4263a77256ae 77 }
bogdanm 20:4263a77256ae 78