david dicarlo / mbed-src-FLL48

mbed library sources: Modified to operate FRDM-KL25Z at 48MHz from internal 32kHz oscillator (nothing else changed).

Fork of mbed-src by mbed official

The only file that changed is: mbed-src-FLL48/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/system_MKL25Z4.h

targets/hal/TARGET_NXP/TARGET_LPC11CXX/gpio_api.c@20:4263a77256ae, 2013-09-10 (annotated)

Committer:
bogdanm
Date:
Tue Sep 10 15:14:19 2013 +0300
Revision:
20:4263a77256ae
Sync with git revision 171dda705c947bf910926a0b73d6a4797802554d

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 20:4263a77256ae 1 /* mbed Microcontroller Library
bogdanm 20:4263a77256ae 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 20:4263a77256ae 3 *
bogdanm 20:4263a77256ae 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 20:4263a77256ae 5 * you may not use this file except in compliance with the License.
bogdanm 20:4263a77256ae 6 * You may obtain a copy of the License at
bogdanm 20:4263a77256ae 7 *
bogdanm 20:4263a77256ae 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 20:4263a77256ae 9 *
bogdanm 20:4263a77256ae 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 20:4263a77256ae 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 20:4263a77256ae 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 20:4263a77256ae 13 * See the License for the specific language governing permissions and
bogdanm 20:4263a77256ae 14 * limitations under the License.
bogdanm 20:4263a77256ae 15 */
bogdanm 20:4263a77256ae 16 #include "gpio_api.h"
bogdanm 20:4263a77256ae 17 #include "pinmap.h"
bogdanm 20:4263a77256ae 18
bogdanm 20:4263a77256ae 19 uint32_t gpio_set(PinName pin) {
bogdanm 20:4263a77256ae 20 // PIO default value of following ports are not same as others
bogdanm 20:4263a77256ae 21 int f = ((pin == P0_0 ) || // RESET
bogdanm 20:4263a77256ae 22 (pin == P0_10) || // SWCLK
bogdanm 20:4263a77256ae 23 (pin == P0_11) || // R
bogdanm 20:4263a77256ae 24 (pin == P1_0 ) || // R
bogdanm 20:4263a77256ae 25 (pin == P1_1 ) || // R
bogdanm 20:4263a77256ae 26 (pin == P1_2 ) || // R
bogdanm 20:4263a77256ae 27 (pin == P1_3 )) ? //
bogdanm 20:4263a77256ae 28 (1) : (0);
bogdanm 20:4263a77256ae 29
bogdanm 20:4263a77256ae 30 pin_function(pin, f);
bogdanm 20:4263a77256ae 31 return ((pin & 0x0F00) >> PIN_SHIFT);
bogdanm 20:4263a77256ae 32 }
bogdanm 20:4263a77256ae 33
bogdanm 20:4263a77256ae 34 void gpio_init(gpio_t *obj, PinName pin, PinDirection direction) {
bogdanm 20:4263a77256ae 35 if(pin == NC) return;
bogdanm 20:4263a77256ae 36
bogdanm 20:4263a77256ae 37 obj->pin = pin;
bogdanm 20:4263a77256ae 38 LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) (LPC_GPIO0_BASE + (((pin & 0xF000) >> PORT_SHIFT) * 0x10000)));
bogdanm 20:4263a77256ae 39
bogdanm 20:4263a77256ae 40 obj->reg_mask_read = &port_reg->MASKED_ACCESS[1 << gpio_set(pin)];
bogdanm 20:4263a77256ae 41 obj->reg_dir = &port_reg->DIR;
bogdanm 20:4263a77256ae 42 obj->reg_write = &port_reg->DATA;
bogdanm 20:4263a77256ae 43
bogdanm 20:4263a77256ae 44 gpio_dir(obj, direction);
bogdanm 20:4263a77256ae 45
bogdanm 20:4263a77256ae 46 switch (direction) {
bogdanm 20:4263a77256ae 47 case PIN_OUTPUT: pin_mode(pin, PullNone); break;
bogdanm 20:4263a77256ae 48 case PIN_INPUT : pin_mode(pin, PullDown); break;
bogdanm 20:4263a77256ae 49 }
bogdanm 20:4263a77256ae 50 }
bogdanm 20:4263a77256ae 51
bogdanm 20:4263a77256ae 52 void gpio_mode(gpio_t *obj, PinMode mode) {
bogdanm 20:4263a77256ae 53 pin_mode(obj->pin, mode);
bogdanm 20:4263a77256ae 54 }
bogdanm 20:4263a77256ae 55
bogdanm 20:4263a77256ae 56 void gpio_dir(gpio_t *obj, PinDirection direction) {
bogdanm 20:4263a77256ae 57 int pin_number = ((obj->pin & 0x0F00) >> 8);
bogdanm 20:4263a77256ae 58 switch (direction) {
bogdanm 20:4263a77256ae 59 case PIN_INPUT : *obj->reg_dir &= ~(1 << pin_number); break;
bogdanm 20:4263a77256ae 60 case PIN_OUTPUT: *obj->reg_dir |= (1 << pin_number); break;
bogdanm 20:4263a77256ae 61 }
bogdanm 20:4263a77256ae 62 }