david dicarlo / mbed-src-FLL48

mbed library sources: Modified to operate FRDM-KL25Z at 48MHz from internal 32kHz oscillator (nothing else changed).

Fork of mbed-src by mbed official

The only file that changed is: mbed-src-FLL48/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/system_MKL25Z4.h

targets/cmsis/TARGET_STM/TARGET_STM32F4XX/TOOLCHAIN_GCC_ARM/startup_STM32F40x.s@20:4263a77256ae, 2013-09-10 (annotated)

Committer:
bogdanm
Date:
Tue Sep 10 15:14:19 2013 +0300
Revision:
20:4263a77256ae
Sync with git revision 171dda705c947bf910926a0b73d6a4797802554d

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 20:4263a77256ae 1 /* File: startup_STM32F40x.S
bogdanm 20:4263a77256ae 2 * Purpose: startup file for Cortex-M4 devices. Should use with
bogdanm 20:4263a77256ae 3 * GCC for ARM Embedded Processors
bogdanm 20:4263a77256ae 4 * Version: V1.4
bogdanm 20:4263a77256ae 5 * Date: 09 July 2012
bogdanm 20:4263a77256ae 6 *
bogdanm 20:4263a77256ae 7 * Copyright (c) 2011, 2012, ARM Limited
bogdanm 20:4263a77256ae 8 * All rights reserved.
bogdanm 20:4263a77256ae 9 *
bogdanm 20:4263a77256ae 10 * Redistribution and use in source and binary forms, with or without
bogdanm 20:4263a77256ae 11 * modification, are permitted provided that the following conditions are met:
bogdanm 20:4263a77256ae 12 * Redistributions of source code must retain the above copyright
bogdanm 20:4263a77256ae 13 notice, this list of conditions and the following disclaimer.
bogdanm 20:4263a77256ae 14 * Redistributions in binary form must reproduce the above copyright
bogdanm 20:4263a77256ae 15 notice, this list of conditions and the following disclaimer in the
bogdanm 20:4263a77256ae 16 documentation and/or other materials provided with the distribution.
bogdanm 20:4263a77256ae 17 * Neither the name of the ARM Limited nor the
bogdanm 20:4263a77256ae 18 names of its contributors may be used to endorse or promote products
bogdanm 20:4263a77256ae 19 derived from this software without specific prior written permission.
bogdanm 20:4263a77256ae 20 *
bogdanm 20:4263a77256ae 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
bogdanm 20:4263a77256ae 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
bogdanm 20:4263a77256ae 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 20:4263a77256ae 24 * DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
bogdanm 20:4263a77256ae 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
bogdanm 20:4263a77256ae 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
bogdanm 20:4263a77256ae 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
bogdanm 20:4263a77256ae 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
bogdanm 20:4263a77256ae 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
bogdanm 20:4263a77256ae 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 20:4263a77256ae 31 */
bogdanm 20:4263a77256ae 32 .syntax unified
bogdanm 20:4263a77256ae 33 .arch armv7-m
bogdanm 20:4263a77256ae 34
bogdanm 20:4263a77256ae 35 .section .stack
bogdanm 20:4263a77256ae 36 .align 3
bogdanm 20:4263a77256ae 37 #ifdef __STACK_SIZE
bogdanm 20:4263a77256ae 38 .equ Stack_Size, __STACK_SIZE
bogdanm 20:4263a77256ae 39 #else
bogdanm 20:4263a77256ae 40 .equ Stack_Size, 0xc00
bogdanm 20:4263a77256ae 41 #endif
bogdanm 20:4263a77256ae 42 .globl __StackTop
bogdanm 20:4263a77256ae 43 .globl __StackLimit
bogdanm 20:4263a77256ae 44 __StackLimit:
bogdanm 20:4263a77256ae 45 .space Stack_Size
bogdanm 20:4263a77256ae 46 .size __StackLimit, . - __StackLimit
bogdanm 20:4263a77256ae 47 __StackTop:
bogdanm 20:4263a77256ae 48 .size __StackTop, . - __StackTop
bogdanm 20:4263a77256ae 49
bogdanm 20:4263a77256ae 50 .section .heap
bogdanm 20:4263a77256ae 51 .align 3
bogdanm 20:4263a77256ae 52 #ifdef __HEAP_SIZE
bogdanm 20:4263a77256ae 53 .equ Heap_Size, __HEAP_SIZE
bogdanm 20:4263a77256ae 54 #else
bogdanm 20:4263a77256ae 55 .equ Heap_Size, 0
bogdanm 20:4263a77256ae 56 #endif
bogdanm 20:4263a77256ae 57 .globl __HeapBase
bogdanm 20:4263a77256ae 58 .globl __HeapLimit
bogdanm 20:4263a77256ae 59 __HeapBase:
bogdanm 20:4263a77256ae 60 .if Heap_Size
bogdanm 20:4263a77256ae 61 .space Heap_Size
bogdanm 20:4263a77256ae 62 .endif
bogdanm 20:4263a77256ae 63 .size __HeapBase, . - __HeapBase
bogdanm 20:4263a77256ae 64 __HeapLimit:
bogdanm 20:4263a77256ae 65 .size __HeapLimit, . - __HeapLimit
bogdanm 20:4263a77256ae 66
bogdanm 20:4263a77256ae 67 .section .isr_vector
bogdanm 20:4263a77256ae 68 .align 2
bogdanm 20:4263a77256ae 69 .globl __isr_vector
bogdanm 20:4263a77256ae 70 __isr_vector:
bogdanm 20:4263a77256ae 71 .long __StackTop /* Top of Stack */
bogdanm 20:4263a77256ae 72 .long Reset_Handler /* Reset Handler */
bogdanm 20:4263a77256ae 73 .long NMI_Handler /* NMI Handler */
bogdanm 20:4263a77256ae 74 .long HardFault_Handler /* Hard Fault Handler */
bogdanm 20:4263a77256ae 75 .long MemManage_Handler /* MPU Fault Handler */
bogdanm 20:4263a77256ae 76 .long BusFault_Handler /* Bus Fault Handler */
bogdanm 20:4263a77256ae 77 .long UsageFault_Handler /* Usage Fault Handler */
bogdanm 20:4263a77256ae 78 .long 0 /* Reserved */
bogdanm 20:4263a77256ae 79 .long 0 /* Reserved */
bogdanm 20:4263a77256ae 80 .long 0 /* Reserved */
bogdanm 20:4263a77256ae 81 .long 0 /* Reserved */
bogdanm 20:4263a77256ae 82 .long SVC_Handler /* SVCall Handler */
bogdanm 20:4263a77256ae 83 .long DebugMon_Handler /* Debug Monitor Handler */
bogdanm 20:4263a77256ae 84 .long 0 /* Reserved */
bogdanm 20:4263a77256ae 85 .long PendSV_Handler /* PendSV Handler */
bogdanm 20:4263a77256ae 86 .long SysTick_Handler /* SysTick Handler */
bogdanm 20:4263a77256ae 87
bogdanm 20:4263a77256ae 88 /* External interrupts */
bogdanm 20:4263a77256ae 89 .long WWDG_IRQHandler /* Window WatchDog */
bogdanm 20:4263a77256ae 90 .long PVD_IRQHandler /* PVD through EXTI Line detection */
bogdanm 20:4263a77256ae 91 .long TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
bogdanm 20:4263a77256ae 92 .long RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
bogdanm 20:4263a77256ae 93 .long FLASH_IRQHandler /* FLASH */
bogdanm 20:4263a77256ae 94 .long RCC_IRQHandler /* RCC */
bogdanm 20:4263a77256ae 95 .long EXTI0_IRQHandler /* EXTI Line0 */
bogdanm 20:4263a77256ae 96 .long EXTI1_IRQHandler /* EXTI Line1 */
bogdanm 20:4263a77256ae 97 .long EXTI2_IRQHandler /* EXTI Line2 */
bogdanm 20:4263a77256ae 98 .long EXTI3_IRQHandler /* EXTI Line3 */
bogdanm 20:4263a77256ae 99 .long EXTI4_IRQHandler /* EXTI Line4 */
bogdanm 20:4263a77256ae 100 .long DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
bogdanm 20:4263a77256ae 101 .long DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
bogdanm 20:4263a77256ae 102 .long DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
bogdanm 20:4263a77256ae 103 .long DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
bogdanm 20:4263a77256ae 104 .long DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
bogdanm 20:4263a77256ae 105 .long DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
bogdanm 20:4263a77256ae 106 .long DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
bogdanm 20:4263a77256ae 107 .long ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
bogdanm 20:4263a77256ae 108 .long CAN1_TX_IRQHandler /* CAN1 TX */
bogdanm 20:4263a77256ae 109 .long CAN1_RX0_IRQHandler /* CAN1 RX0 */
bogdanm 20:4263a77256ae 110 .long CAN1_RX1_IRQHandler /* CAN1 RX1 */
bogdanm 20:4263a77256ae 111 .long CAN1_SCE_IRQHandler /* CAN1 SCE */
bogdanm 20:4263a77256ae 112 .long EXTI9_5_IRQHandler /* External Line[9:5]s */
bogdanm 20:4263a77256ae 113 .long TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
bogdanm 20:4263a77256ae 114 .long TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
bogdanm 20:4263a77256ae 115 .long TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
bogdanm 20:4263a77256ae 116 .long TIM1_CC_IRQHandler /* TIM1 Capture Compare */
bogdanm 20:4263a77256ae 117 .long TIM2_IRQHandler /* TIM2 */
bogdanm 20:4263a77256ae 118 .long TIM3_IRQHandler /* TIM3 */
bogdanm 20:4263a77256ae 119 .long TIM4_IRQHandler /* TIM4 */
bogdanm 20:4263a77256ae 120 .long I2C1_EV_IRQHandler /* I2C1 Event */
bogdanm 20:4263a77256ae 121 .long I2C1_ER_IRQHandler /* I2C1 Error */
bogdanm 20:4263a77256ae 122 .long I2C2_EV_IRQHandler /* I2C2 Event */
bogdanm 20:4263a77256ae 123 .long I2C2_ER_IRQHandler /* I2C2 Error */
bogdanm 20:4263a77256ae 124 .long SPI1_IRQHandler /* SPI1 */
bogdanm 20:4263a77256ae 125 .long SPI2_IRQHandler /* SPI2 */
bogdanm 20:4263a77256ae 126 .long USART1_IRQHandler /* USART1 */
bogdanm 20:4263a77256ae 127 .long USART2_IRQHandler /* USART2 */
bogdanm 20:4263a77256ae 128 .long USART3_IRQHandler /* USART3 */
bogdanm 20:4263a77256ae 129 .long EXTI15_10_IRQHandler /* External Line[15:10]s */
bogdanm 20:4263a77256ae 130 .long RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
bogdanm 20:4263a77256ae 131 .long OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
bogdanm 20:4263a77256ae 132 .long TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
bogdanm 20:4263a77256ae 133 .long TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
bogdanm 20:4263a77256ae 134 .long TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
bogdanm 20:4263a77256ae 135 .long TIM8_CC_IRQHandler /* TIM8 Capture Compare */
bogdanm 20:4263a77256ae 136 .long DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
bogdanm 20:4263a77256ae 137 .long FSMC_IRQHandler /* FSMC */
bogdanm 20:4263a77256ae 138 .long SDIO_IRQHandler /* SDIO */
bogdanm 20:4263a77256ae 139 .long TIM5_IRQHandler /* TIM5 */
bogdanm 20:4263a77256ae 140 .long SPI3_IRQHandler /* SPI3 */
bogdanm 20:4263a77256ae 141 .long UART4_IRQHandler /* UART4 */
bogdanm 20:4263a77256ae 142 .long UART5_IRQHandler /* UART5 */
bogdanm 20:4263a77256ae 143 .long TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
bogdanm 20:4263a77256ae 144 .long TIM7_IRQHandler /* TIM7 */
bogdanm 20:4263a77256ae 145 .long DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
bogdanm 20:4263a77256ae 146 .long DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
bogdanm 20:4263a77256ae 147 .long DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
bogdanm 20:4263a77256ae 148 .long DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
bogdanm 20:4263a77256ae 149 .long DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
bogdanm 20:4263a77256ae 150 .long ETH_IRQHandler /* Ethernet */
bogdanm 20:4263a77256ae 151 .long ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
bogdanm 20:4263a77256ae 152 .long CAN2_TX_IRQHandler /* CAN2 TX */
bogdanm 20:4263a77256ae 153 .long CAN2_RX0_IRQHandler /* CAN2 RX0 */
bogdanm 20:4263a77256ae 154 .long CAN2_RX1_IRQHandler /* CAN2 RX1 */
bogdanm 20:4263a77256ae 155 .long CAN2_SCE_IRQHandler /* CAN2 SCE */
bogdanm 20:4263a77256ae 156 .long OTG_FS_IRQHandler /* USB OTG FS */
bogdanm 20:4263a77256ae 157 .long DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
bogdanm 20:4263a77256ae 158 .long DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
bogdanm 20:4263a77256ae 159 .long DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
bogdanm 20:4263a77256ae 160 .long USART6_IRQHandler /* USART6 */
bogdanm 20:4263a77256ae 161 .long I2C3_EV_IRQHandler /* I2C3 event */
bogdanm 20:4263a77256ae 162 .long I2C3_ER_IRQHandler /* I2C3 error */
bogdanm 20:4263a77256ae 163 .long OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
bogdanm 20:4263a77256ae 164 .long OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
bogdanm 20:4263a77256ae 165 .long OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
bogdanm 20:4263a77256ae 166 .long OTG_HS_IRQHandler /* USB OTG HS */
bogdanm 20:4263a77256ae 167 .long DCMI_IRQHandler /* DCMI */
bogdanm 20:4263a77256ae 168 .long CRYP_IRQHandler /* CRYP crypto */
bogdanm 20:4263a77256ae 169 .long HASH_RNG_IRQHandler /* Hash and Rng */
bogdanm 20:4263a77256ae 170 .long FPU_IRQHandler /* FPU */
bogdanm 20:4263a77256ae 171
bogdanm 20:4263a77256ae 172 .size __isr_vector, . - __isr_vector
bogdanm 20:4263a77256ae 173
bogdanm 20:4263a77256ae 174 .text
bogdanm 20:4263a77256ae 175 .thumb
bogdanm 20:4263a77256ae 176 .thumb_func
bogdanm 20:4263a77256ae 177 .align 2
bogdanm 20:4263a77256ae 178 .globl Reset_Handler
bogdanm 20:4263a77256ae 179 .type Reset_Handler, %function
bogdanm 20:4263a77256ae 180 Reset_Handler:
bogdanm 20:4263a77256ae 181 /* Loop to copy data from read only memory to RAM. The ranges
bogdanm 20:4263a77256ae 182 * of copy from/to are specified by following symbols evaluated in
bogdanm 20:4263a77256ae 183 * linker script.
bogdanm 20:4263a77256ae 184 * __etext: End of code section, i.e., begin of data sections to copy from.
bogdanm 20:4263a77256ae 185 * __data_start__/__data_end__: RAM address range that data should be
bogdanm 20:4263a77256ae 186 * copied to. Both must be aligned to 4 bytes boundary. */
bogdanm 20:4263a77256ae 187
bogdanm 20:4263a77256ae 188 ldr r1, =__etext
bogdanm 20:4263a77256ae 189 ldr r2, =__data_start__
bogdanm 20:4263a77256ae 190 ldr r3, =__data_end__
bogdanm 20:4263a77256ae 191
bogdanm 20:4263a77256ae 192 .LC0:
bogdanm 20:4263a77256ae 193 cmp r2, r3
bogdanm 20:4263a77256ae 194 ittt lt
bogdanm 20:4263a77256ae 195 ldrlt r0, [r1], #4
bogdanm 20:4263a77256ae 196 strlt r0, [r2], #4
bogdanm 20:4263a77256ae 197 blt .LC0
bogdanm 20:4263a77256ae 198
bogdanm 20:4263a77256ae 199 /* This part of work usually is done in C library startup code. Otherwise,
bogdanm 20:4263a77256ae 200 * define this macro to enable it in this startup.
bogdanm 20:4263a77256ae 201 *
bogdanm 20:4263a77256ae 202 * Loop to zero out BSS section, which uses following symbols
bogdanm 20:4263a77256ae 203 * in linker script:
bogdanm 20:4263a77256ae 204 * __bss_start__: start of BSS section. Must align to 4
bogdanm 20:4263a77256ae 205 * __bss_end__: end of BSS section. Must align to 4
bogdanm 20:4263a77256ae 206 *
bogdanm 20:4263a77256ae 207 * Question - Why is this not in the mbed version?
bogdanm 20:4263a77256ae 208 */
bogdanm 20:4263a77256ae 209 ldr r1, =__bss_start__
bogdanm 20:4263a77256ae 210 ldr r2, =__bss_end__
bogdanm 20:4263a77256ae 211
bogdanm 20:4263a77256ae 212 movs r0, 0
bogdanm 20:4263a77256ae 213 .LC2:
bogdanm 20:4263a77256ae 214 cmp r1, r2
bogdanm 20:4263a77256ae 215 itt lt
bogdanm 20:4263a77256ae 216 strlt r0, [r1], #4
bogdanm 20:4263a77256ae 217 blt .LC2
bogdanm 20:4263a77256ae 218 # End clearing the BSS section
bogdanm 20:4263a77256ae 219
bogdanm 20:4263a77256ae 220 ldr r0, =SystemInit
bogdanm 20:4263a77256ae 221 blx r0
bogdanm 20:4263a77256ae 222 ldr r0, =_start
bogdanm 20:4263a77256ae 223 bx r0
bogdanm 20:4263a77256ae 224 .pool
bogdanm 20:4263a77256ae 225 .size Reset_Handler, . - Reset_Handler
bogdanm 20:4263a77256ae 226
bogdanm 20:4263a77256ae 227 /* Macro to define default handlers. Default handler
bogdanm 20:4263a77256ae 228 * will be weak symbol and just dead loops. They can be
bogdanm 20:4263a77256ae 229 * overwritten by other handlers */
bogdanm 20:4263a77256ae 230 .macro def_default_handler handler_name
bogdanm 20:4263a77256ae 231 .align 1
bogdanm 20:4263a77256ae 232 .thumb_func
bogdanm 20:4263a77256ae 233 .weak \handler_name
bogdanm 20:4263a77256ae 234 .type \handler_name, %function
bogdanm 20:4263a77256ae 235 \handler_name :
bogdanm 20:4263a77256ae 236 b .
bogdanm 20:4263a77256ae 237 .size \handler_name, . - \handler_name
bogdanm 20:4263a77256ae 238 .endm
bogdanm 20:4263a77256ae 239
bogdanm 20:4263a77256ae 240 def_default_handler NMI_Handler
bogdanm 20:4263a77256ae 241 def_default_handler HardFault_Handler
bogdanm 20:4263a77256ae 242 def_default_handler MemManage_Handler
bogdanm 20:4263a77256ae 243 def_default_handler BusFault_Handler
bogdanm 20:4263a77256ae 244 def_default_handler UsageFault_Handler
bogdanm 20:4263a77256ae 245 def_default_handler SVC_Handler
bogdanm 20:4263a77256ae 246 def_default_handler DebugMon_Handler
bogdanm 20:4263a77256ae 247 def_default_handler PendSV_Handler
bogdanm 20:4263a77256ae 248 def_default_handler SysTick_Handler
bogdanm 20:4263a77256ae 249 def_default_handler Default_Handler
bogdanm 20:4263a77256ae 250
bogdanm 20:4263a77256ae 251 def_default_handler WWDG_IRQHandler
bogdanm 20:4263a77256ae 252 def_default_handler PVD_IRQHandler
bogdanm 20:4263a77256ae 253 def_default_handler TAMP_STAMP_IRQHandler
bogdanm 20:4263a77256ae 254 def_default_handler RTC_WKUP_IRQHandler
bogdanm 20:4263a77256ae 255 def_default_handler FLASH_IRQHandler
bogdanm 20:4263a77256ae 256 def_default_handler RCC_IRQHandler
bogdanm 20:4263a77256ae 257 def_default_handler EXTI0_IRQHandler
bogdanm 20:4263a77256ae 258 def_default_handler EXTI1_IRQHandler
bogdanm 20:4263a77256ae 259 def_default_handler EXTI2_IRQHandler
bogdanm 20:4263a77256ae 260 def_default_handler EXTI3_IRQHandler
bogdanm 20:4263a77256ae 261 def_default_handler EXTI4_IRQHandler
bogdanm 20:4263a77256ae 262 def_default_handler DMA1_Stream0_IRQHandler
bogdanm 20:4263a77256ae 263 def_default_handler DMA1_Stream1_IRQHandler
bogdanm 20:4263a77256ae 264 def_default_handler DMA1_Stream2_IRQHandler
bogdanm 20:4263a77256ae 265 def_default_handler DMA1_Stream3_IRQHandler
bogdanm 20:4263a77256ae 266 def_default_handler DMA1_Stream4_IRQHandler
bogdanm 20:4263a77256ae 267 def_default_handler DMA1_Stream5_IRQHandler
bogdanm 20:4263a77256ae 268 def_default_handler DMA1_Stream6_IRQHandler
bogdanm 20:4263a77256ae 269 def_default_handler ADC_IRQHandler
bogdanm 20:4263a77256ae 270 def_default_handler CAN1_TX_IRQHandler
bogdanm 20:4263a77256ae 271 def_default_handler CAN1_RX0_IRQHandler
bogdanm 20:4263a77256ae 272 def_default_handler CAN1_RX1_IRQHandler
bogdanm 20:4263a77256ae 273 def_default_handler CAN1_SCE_IRQHandler
bogdanm 20:4263a77256ae 274 def_default_handler EXTI9_5_IRQHandler
bogdanm 20:4263a77256ae 275 def_default_handler TIM1_BRK_TIM9_IRQHandler
bogdanm 20:4263a77256ae 276 def_default_handler TIM1_UP_TIM10_IRQHandler
bogdanm 20:4263a77256ae 277 def_default_handler TIM1_TRG_COM_TIM11_IRQHandler
bogdanm 20:4263a77256ae 278 def_default_handler TIM1_CC_IRQHandler
bogdanm 20:4263a77256ae 279 def_default_handler TIM2_IRQHandler
bogdanm 20:4263a77256ae 280 def_default_handler TIM3_IRQHandler
bogdanm 20:4263a77256ae 281 def_default_handler TIM4_IRQHandler
bogdanm 20:4263a77256ae 282 def_default_handler I2C1_EV_IRQHandler
bogdanm 20:4263a77256ae 283 def_default_handler I2C1_ER_IRQHandler
bogdanm 20:4263a77256ae 284 def_default_handler I2C2_EV_IRQHandler
bogdanm 20:4263a77256ae 285 def_default_handler I2C2_ER_IRQHandler
bogdanm 20:4263a77256ae 286 def_default_handler SPI1_IRQHandler
bogdanm 20:4263a77256ae 287 def_default_handler SPI2_IRQHandler
bogdanm 20:4263a77256ae 288 def_default_handler USART1_IRQHandler
bogdanm 20:4263a77256ae 289 def_default_handler USART2_IRQHandler
bogdanm 20:4263a77256ae 290 def_default_handler USART3_IRQHandler
bogdanm 20:4263a77256ae 291 def_default_handler EXTI15_10_IRQHandler
bogdanm 20:4263a77256ae 292 def_default_handler RTC_Alarm_IRQHandler
bogdanm 20:4263a77256ae 293 def_default_handler OTG_FS_WKUP_IRQHandler
bogdanm 20:4263a77256ae 294 def_default_handler TIM8_BRK_TIM12_IRQHandler
bogdanm 20:4263a77256ae 295 def_default_handler TIM8_UP_TIM13_IRQHandler
bogdanm 20:4263a77256ae 296 def_default_handler TIM8_TRG_COM_TIM14_IRQHandler
bogdanm 20:4263a77256ae 297 def_default_handler TIM8_CC_IRQHandler
bogdanm 20:4263a77256ae 298 def_default_handler DMA1_Stream7_IRQHandler
bogdanm 20:4263a77256ae 299 def_default_handler FSMC_IRQHandler
bogdanm 20:4263a77256ae 300 def_default_handler SDIO_IRQHandler
bogdanm 20:4263a77256ae 301 def_default_handler TIM5_IRQHandler
bogdanm 20:4263a77256ae 302 def_default_handler SPI3_IRQHandler
bogdanm 20:4263a77256ae 303 def_default_handler UART4_IRQHandler
bogdanm 20:4263a77256ae 304 def_default_handler UART5_IRQHandler
bogdanm 20:4263a77256ae 305 def_default_handler TIM6_DAC_IRQHandler
bogdanm 20:4263a77256ae 306 def_default_handler TIM7_IRQHandler
bogdanm 20:4263a77256ae 307 def_default_handler DMA2_Stream0_IRQHandler
bogdanm 20:4263a77256ae 308 def_default_handler DMA2_Stream1_IRQHandler
bogdanm 20:4263a77256ae 309 def_default_handler DMA2_Stream2_IRQHandler
bogdanm 20:4263a77256ae 310 def_default_handler DMA2_Stream3_IRQHandler
bogdanm 20:4263a77256ae 311 def_default_handler DMA2_Stream4_IRQHandler
bogdanm 20:4263a77256ae 312 def_default_handler ETH_IRQHandler
bogdanm 20:4263a77256ae 313 def_default_handler ETH_WKUP_IRQHandler
bogdanm 20:4263a77256ae 314 def_default_handler CAN2_TX_IRQHandler
bogdanm 20:4263a77256ae 315 def_default_handler CAN2_RX0_IRQHandler
bogdanm 20:4263a77256ae 316 def_default_handler CAN2_RX1_IRQHandler
bogdanm 20:4263a77256ae 317 def_default_handler CAN2_SCE_IRQHandler
bogdanm 20:4263a77256ae 318 def_default_handler OTG_FS_IRQHandler
bogdanm 20:4263a77256ae 319 def_default_handler DMA2_Stream5_IRQHandler
bogdanm 20:4263a77256ae 320 def_default_handler DMA2_Stream6_IRQHandler
bogdanm 20:4263a77256ae 321 def_default_handler DMA2_Stream7_IRQHandler
bogdanm 20:4263a77256ae 322 def_default_handler USART6_IRQHandler
bogdanm 20:4263a77256ae 323 def_default_handler I2C3_EV_IRQHandler
bogdanm 20:4263a77256ae 324 def_default_handler I2C3_ER_IRQHandler
bogdanm 20:4263a77256ae 325 def_default_handler OTG_HS_EP1_OUT_IRQHandler
bogdanm 20:4263a77256ae 326 def_default_handler OTG_HS_EP1_IN_IRQHandler
bogdanm 20:4263a77256ae 327 def_default_handler OTG_HS_WKUP_IRQHandler
bogdanm 20:4263a77256ae 328 def_default_handler OTG_HS_IRQHandler
bogdanm 20:4263a77256ae 329 def_default_handler DCMI_IRQHandler
bogdanm 20:4263a77256ae 330 def_default_handler CRYP_IRQHandler
bogdanm 20:4263a77256ae 331 def_default_handler HASH_RNG_IRQHandler
bogdanm 20:4263a77256ae 332 def_default_handler FPU_IRQHandler
bogdanm 20:4263a77256ae 333
bogdanm 20:4263a77256ae 334
bogdanm 20:4263a77256ae 335 .weak DEF_IRQHandler
bogdanm 20:4263a77256ae 336 .set DEF_IRQHandler, Default_Handler
bogdanm 20:4263a77256ae 337
bogdanm 20:4263a77256ae 338 .end