david dicarlo / mbed-src-FLL48

mbed library sources: Modified to operate FRDM-KL25Z at 48MHz from internal 32kHz oscillator (nothing else changed).

Fork of mbed-src by mbed official

The only file that changed is: mbed-src-FLL48/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/system_MKL25Z4.h

targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/cmsis_nvic.c@20:4263a77256ae, 2013-09-10 (annotated)

Committer:
bogdanm
Date:
Tue Sep 10 15:14:19 2013 +0300
Revision:
20:4263a77256ae
Sync with git revision 171dda705c947bf910926a0b73d6a4797802554d

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 20:4263a77256ae 1 /* mbed Microcontroller Library - cmsis_nvic for LPC11U24
bogdanm 20:4263a77256ae 2 * Copyright (c) 2011 ARM Limited. All rights reserved.
bogdanm 20:4263a77256ae 3 *
bogdanm 20:4263a77256ae 4 * CMSIS-style functionality to support dynamic vectors
bogdanm 20:4263a77256ae 5 */
bogdanm 20:4263a77256ae 6
bogdanm 20:4263a77256ae 7 #include "cmsis_nvic.h"
bogdanm 20:4263a77256ae 8
bogdanm 20:4263a77256ae 9 /* In the M0, there is no VTOR. In the LPC range such as the LPC11U,
bogdanm 20:4263a77256ae 10 * whilst the vector table may only be something like 48 entries (192 bytes, 0xC0),
bogdanm 20:4263a77256ae 11 * the SYSMEMREMAP register actually remaps the memory from 0x10000000-0x100001FF
bogdanm 20:4263a77256ae 12 * to adress 0x0-0x1FF. In this case, RAM can be addressed at both 0x10000000 and 0x0
bogdanm 20:4263a77256ae 13 *
bogdanm 20:4263a77256ae 14 * If we just copy the vectors to RAM and switch the SYSMEMMAP, any accesses to FLASH
bogdanm 20:4263a77256ae 15 * above the vector table before 0x200 will actually go to RAM. So we need to provide
bogdanm 20:4263a77256ae 16 * a solution where the compiler gets the right results based on the memory map
bogdanm 20:4263a77256ae 17 *
bogdanm 20:4263a77256ae 18 * Option 1 - We allocate and copy 0x200 of RAM rather than just the table
bogdanm 20:4263a77256ae 19 * - const data and instructions before 0x200 will be copied to and fetched/exec from RAM
bogdanm 20:4263a77256ae 20 * - RAM overhead: 0x200 - 0xC0 = 320 bytes, FLASH overhead: 0
bogdanm 20:4263a77256ae 21 *
bogdanm 20:4263a77256ae 22 * Option 2 - We pad the flash to 0x200 to ensure the compiler doesn't allocate anything there
bogdanm 20:4263a77256ae 23 * - No flash accesses will go to ram, as there will be nothing there
bogdanm 20:4263a77256ae 24 * - RAM only needs to be allocated for the vectors, as all other ram addresses are normal
bogdanm 20:4263a77256ae 25 * - RAM overhead: 0, FLASH overhead: 320 bytes
bogdanm 20:4263a77256ae 26 *
bogdanm 20:4263a77256ae 27 * Option 2 is the one to go for, as RAM is the most valuable resource
bogdanm 20:4263a77256ae 28 */
bogdanm 20:4263a77256ae 29
bogdanm 20:4263a77256ae 30 #define NVIC_RAM_VECTOR_ADDRESS (0x10000000) // Vectors positioned at start of RAM
bogdanm 20:4263a77256ae 31
bogdanm 20:4263a77256ae 32 void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
bogdanm 20:4263a77256ae 33 int i;
bogdanm 20:4263a77256ae 34 // Space for dynamic vectors, initialised to allocate in R/W
bogdanm 20:4263a77256ae 35 static volatile uint32_t* vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
bogdanm 20:4263a77256ae 36
bogdanm 20:4263a77256ae 37 // Copy and switch to dynamic vectors if first time called
bogdanm 20:4263a77256ae 38 if((LPC_SYSCON->SYSMEMREMAP & 0x3) != 0x1) {
bogdanm 20:4263a77256ae 39 uint32_t *old_vectors = (uint32_t *)0; // FLASH vectors are at 0x0
bogdanm 20:4263a77256ae 40 for(i = 0; i < NVIC_NUM_VECTORS; i++) {
bogdanm 20:4263a77256ae 41 vectors[i] = old_vectors[i];
bogdanm 20:4263a77256ae 42 }
bogdanm 20:4263a77256ae 43 LPC_SYSCON->SYSMEMREMAP = 0x1; // Remaps 0x0-0x1FF FLASH block to RAM block
bogdanm 20:4263a77256ae 44 }
bogdanm 20:4263a77256ae 45
bogdanm 20:4263a77256ae 46 // Set the vector
bogdanm 20:4263a77256ae 47 vectors[IRQn + 16] = vector;
bogdanm 20:4263a77256ae 48 }
bogdanm 20:4263a77256ae 49
bogdanm 20:4263a77256ae 50 uint32_t NVIC_GetVector(IRQn_Type IRQn) {
bogdanm 20:4263a77256ae 51 // We can always read vectors at 0x0, as the addresses are remapped
bogdanm 20:4263a77256ae 52 uint32_t *vectors = (uint32_t*)0;
bogdanm 20:4263a77256ae 53
bogdanm 20:4263a77256ae 54 // Return the vector
bogdanm 20:4263a77256ae 55 return vectors[IRQn + 16];
bogdanm 20:4263a77256ae 56 }
bogdanm 20:4263a77256ae 57