cdcprolific.h

00001 /* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
00002 
00003 This software may be distributed and modified under the terms of the GNU
00004 General Public License version 2 (GPL2) as published by the Free Software
00005 Foundation and appearing in the file GPL2.TXT included in the packaging of
00006 this file. Please note that GPL2 Section 2[b] requires that all works based
00007 on this software must also be made publicly available under the terms of
00008 the GPL2 ("Copyleft").
00009 
00010 Contact information
00011 -------------------
00012 
00013 Circuits At Home, LTD
00014 Web      :  http://www.circuitsathome.com
00015 e-mail   :  support@circuitsathome.com
00016  */
00017 #if !defined(__CDCPROLIFIC_H__)
00018 #define __CDCPROLIFIC_H__
00019 
00020 #include "cdcacm.h"
00021 
00022 //#define PL2303_COMPAT // Uncomment it if you have compatibility problems
00023 
00024 #define PL_VID                                  0x067B
00025 #define CHECK_PID(pid)                          ( pid != 0x2303 && pid != 0x0609 )
00026 
00027 //#define PL_PID                                0x0609
00028 
00029 #define PROLIFIC_REV_H                          0x0202
00030 #define PROLIFIC_REV_X                          0x0300
00031 #define PROLIFIC_REV_HX_CHIP_D                  0x0400
00032 #define PROLIFIC_REV_1                          0x0001
00033 
00034 #define kXOnChar                                '\x11'
00035 #define kXOffChar                               '\x13'
00036 
00037 #define SPECIAL_SHIFT                           (5)
00038 #define SPECIAL_MASK                            ((1<<SPECIAL_SHIFT) - 1)
00039 #define STATE_ALL                               ( PD_RS232_S_MASK | PD_S_MASK )
00040 #define FLOW_RX_AUTO                            ( PD_RS232_A_RFR | PD_RS232_A_DTR | PD_RS232_A_RXO )
00041 #define FLOW_TX_AUTO                            ( PD_RS232_A_CTS | PD_RS232_A_DSR | PD_RS232_A_TXO | PD_RS232_A_DCD )
00042 #define CAN_BE_AUTO                             ( FLOW_RX_AUTO | FLOW_TX_AUTO )
00043 #define CAN_NOTIFY                              ( PD_RS232_N_MASK )
00044 #define EXTERNAL_MASK                           ( PD_S_MASK | (PD_RS232_S_MASK & ~PD_RS232_S_LOOP) )
00045 #define INTERNAL_DELAY                          ( PD_RS232_S_LOOP )
00046 #define DEFAULT_AUTO                            ( PD_RS232_A_DTR | PD_RS232_A_RFR | PD_RS232_A_CTS | PD_RS232_A_DSR )
00047 #define DEFAULT_NOTIFY                          0x00
00048 #define DEFAULT_STATE                           ( PD_S_TX_ENABLE | PD_S_RX_ENABLE | PD_RS232_A_TXO | PD_RS232_A_RXO )
00049 
00050 #define CONTINUE_SEND                           1
00051 #define PAUSE_SEND                              2
00052 
00053 #define kRxAutoFlow                             ((UInt32)( PD_RS232_A_RFR | PD_RS232_A_DTR | PD_RS232_A_RXO ))
00054 #define kTxAutoFlow                             ((UInt32)( PD_RS232_A_CTS | PD_RS232_A_DSR | PD_RS232_A_TXO | PD_RS232_A_DCD ))
00055 #define kControl_StateMask                      ((UInt32)( PD_RS232_S_CTS | PD_RS232_S_DSR | PD_RS232_S_CAR | PD_RS232_S_RI  ))
00056 #define kRxQueueState                           ((UInt32)( PD_S_RXQ_EMPTY | PD_S_RXQ_LOW_WATER | PD_S_RXQ_HIGH_WATER | PD_S_RXQ_FULL ))
00057 #define kTxQueueState                           ((UInt32)( PD_S_TXQ_EMPTY | PD_S_TXQ_LOW_WATER | PD_S_TXQ_HIGH_WATER | PD_S_TXQ_FULL ))
00058 
00059 #define kCONTROL_DTR                            0x01
00060 #define kCONTROL_RTS                            0x02
00061 
00062 #define kStateTransientMask                     0x74
00063 #define kBreakError                             0x04
00064 #define kFrameError                             0x10
00065 #define kParityError                            0x20
00066 #define kOverrunError                           0x40
00067 
00068 #define kCTS                                    0x80
00069 #define kDSR                                    0x02
00070 #define kRI                                     0x08
00071 #define kDCD                                    0x01
00072 #define kHandshakeInMask                        ((UInt32)( PD_RS232_S_CTS | PD_RS232_S_DSR | PD_RS232_S_CAR | PD_RS232_S_RI  ))
00073 
00074 #define VENDOR_WRITE_REQUEST_TYPE               0x40
00075 #define VENDOR_WRITE_REQUEST                    0x01
00076 
00077 #define VENDOR_READ_REQUEST_TYPE                0xc0
00078 #define VENDOR_READ_REQUEST                     0x01
00079 
00080 // Device Configuration Registers (DCR0, DCR1, DCR2)
00081 #define SET_DCR0                                0x00
00082 #define GET_DCR0                                0x80
00083 #define DCR0_INIT                               0x01
00084 #define DCR0_INIT_H                             0x41
00085 #define DCR0_INIT_X                             0x61
00086 
00087 #define SET_DCR1                                0x01
00088 #define GET_DCR1                                0x81
00089 #define DCR1_INIT_H                             0x80
00090 #define DCR1_INIT_X                             0x00
00091 
00092 #define SET_DCR2                                0x02
00093 #define GET_DCR2                                0x82
00094 #define DCR2_INIT_H                             0x24
00095 #define DCR2_INIT_X                             0x44
00096 
00097 // On-chip Data Buffers:
00098 #define RESET_DOWNSTREAM_DATA_PIPE              0x08
00099 #define RESET_UPSTREAM_DATA_PIPE                0x09
00100 
00101 
00102 #define PL_MAX_ENDPOINTS                        4
00103 
00104 enum tXO_State {
00105         kXOnSent = -2,
00106         kXOffSent = -1,
00107         kXO_Idle = 0,
00108         kXOffNeeded = 1,
00109         kXOnNeeded = 2
00110 };
00111 
00112 enum pl2303_type {
00113         unknown,
00114         type_0, /* don't know the difference between type 0 and */
00115         type_1, /* type 1, until someone from prolific tells us... */
00116         rev_X,
00117         rev_HX, /* HX version of the pl2303 chip */
00118         rev_H
00119 };
00120 
00121 
00122 class PL2303 : public ACM {
00123         uint16_t wPLType; // Type of chip
00124 
00125 public:
00126         PL2303(Usb *pusb, CDCAsyncOper *pasync);
00127 
00128         // USBDeviceConfig implementation
00129         uint8_t Init(uint8_t parent, uint8_t port, bool lowspeed);
00130         //virtual uint8_t Release();
00131         //virtual uint8_t Poll();
00132         //virtual uint8_t GetAddress() { return bAddress; };
00133 
00134         //// UsbConfigXtracter implementation
00135         //virtual void EndpointXtract(uint8_t conf, uint8_t iface, uint8_t alt, uint8_t proto, const USB_ENDPOINT_DESCRIPTOR *ep);
00136 
00137 #ifdef PL2303_COMPAT
00138 private:
00139         /* Prolific proprietary requests */
00140         uint8_t vendorRead( uint8_t val_lo, uint8_t val_hi, uint16_t index, uint8_t* buf );
00141         uint8_t vendorWrite( uint8_t val_lo, uint8_t val_hi, uint8_t index );
00142 #endif
00143 };
00144 
00145 #ifdef PL2303_COMPAT
00146 /* vendor read request */
00147 inline uint8_t PL2303::vendorRead( uint8_t val_lo, uint8_t val_hi, uint16_t index, uint8_t* buf )
00148 {
00149         return( pUsb->ctrlReq(bAddress, 0, VENDOR_READ_REQUEST_TYPE, VENDOR_READ_REQUEST, val_lo, val_hi, index, 1, 1, buf, NULL ));
00150 }
00151 
00152 /* vendor write request */
00153 inline uint8_t PL2303::vendorWrite( uint8_t val_lo, uint8_t val_hi, uint8_t index )
00154 {
00155         return( pUsb->ctrlReq(bAddress, 0, VENDOR_WRITE_REQUEST_TYPE, VENDOR_WRITE_REQUEST, val_lo, val_hi, index, 0, 0, NULL, NULL ));
00156 }
00157 #endif
00158 
00159 #endif // __CDCPROLIFIC_H__