MAX3421E.h

00001 /* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
00002 
00003 This program is free software; you can redistribute it and/or modify
00004 it under the terms of the GNU General Public License as published by
00005 the Free Software Foundation; either version 2 of the License, or
00006 (at your option) any later version.
00007 
00008 This program is distributed in the hope that it will be useful,
00009 but WITHOUT ANY WARRANTY; without even the implied warranty of
00010 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00011 GNU General Public License for more details.
00012 
00013 You should have received a copy of the GNU General Public License
00014 along with this program; if not, write to the Free Software
00015 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
00016 
00017 Contact information
00018 -------------------
00019 
00020 Circuits At Home, LTD
00021 Web      :  http://www.circuitsathome.com
00022 e-mail   :  support@circuitsathome.com
00023  */
00024 #ifndef _MAX3421E_H_
00025 #define _MAX3421E_H_
00026 
00027 #include "mbed.h"
00028 
00029 /* MAX3421E register/bit names and bitmasks */
00030 
00031 /* Arduino pin definitions */
00032 /* pin numbers to port numbers */
00033 
00034 #define SE0     0
00035 #define SE1     1
00036 #define FSHOST  2
00037 #define LSHOST  3
00038 
00039 /* MAX3421E command byte format: rrrrr0wa where 'r' is register number  */
00040 //
00041 // MAX3421E Registers in HOST mode.
00042 //
00043 #define rRCVFIFO    0x08    //1<<3
00044 #define rSNDFIFO    0x10    //2<<3
00045 #define rSUDFIFO    0x20    //4<<3
00046 #define rRCVBC      0x30    //6<<3
00047 #define rSNDBC      0x38    //7<<3
00048 
00049 #define rUSBIRQ     0x68    //13<<3
00050 /* USBIRQ Bits  */
00051 #define bmVBUSIRQ   0x40    //b6
00052 #define bmNOVBUSIRQ 0x20    //b5
00053 #define bmOSCOKIRQ  0x01    //b0
00054 
00055 #define rUSBIEN     0x70    //14<<3
00056 /* USBIEN Bits  */
00057 #define bmVBUSIE    0x40    //b6
00058 #define bmNOVBUSIE  0x20    //b5
00059 #define bmOSCOKIE   0x01    //b0
00060 
00061 #define rUSBCTL     0x78    //15<<3
00062 /* USBCTL Bits  */
00063 #define bmCHIPRES   0x20    //b5
00064 #define bmPWRDOWN   0x10    //b4
00065 
00066 #define rCPUCTL     0x80    //16<<3
00067 /* CPUCTL Bits  */
00068 #define bmPUSLEWID1 0x80    //b7
00069 #define bmPULSEWID0 0x40    //b6
00070 #define bmIE        0x01    //b0
00071 
00072 #define rPINCTL     0x88    //17<<3
00073 /* PINCTL Bits  */
00074 #define bmFDUPSPI   0x10    //b4
00075 #define bmINTLEVEL  0x08    //b3
00076 #define bmPOSINT    0x04    //b2
00077 #define bmGPXB      0x02    //b1
00078 #define bmGPXA      0x01    //b0
00079 // GPX pin selections
00080 #define GPX_OPERATE 0x00
00081 #define GPX_VBDET   0x01
00082 #define GPX_BUSACT  0x02
00083 #define GPX_SOF     0x03
00084 
00085 #define rREVISION   0x90    //18<<3
00086 
00087 #define rIOPINS1    0xa0    //20<<3
00088 
00089 /* IOPINS1 Bits */
00090 #define bmGPOUT0    0x01
00091 #define bmGPOUT1    0x02
00092 #define bmGPOUT2    0x04
00093 #define bmGPOUT3    0x08
00094 #define bmGPIN0     0x10
00095 #define bmGPIN1     0x20
00096 #define bmGPIN2     0x40
00097 #define bmGPIN3     0x80
00098 
00099 #define rIOPINS2    0xa8    //21<<3
00100 /* IOPINS2 Bits */
00101 #define bmGPOUT4    0x01
00102 #define bmGPOUT5    0x02
00103 #define bmGPOUT6    0x04
00104 #define bmGPOUT7    0x08
00105 #define bmGPIN4     0x10
00106 #define bmGPIN5     0x20
00107 #define bmGPIN6     0x40
00108 #define bmGPIN7     0x80
00109 
00110 #define rGPINIRQ    0xb0    //22<<3
00111 /* GPINIRQ Bits */
00112 #define bmGPINIRQ0 0x01
00113 #define bmGPINIRQ1 0x02
00114 #define bmGPINIRQ2 0x04
00115 #define bmGPINIRQ3 0x08
00116 #define bmGPINIRQ4 0x10
00117 #define bmGPINIRQ5 0x20
00118 #define bmGPINIRQ6 0x40
00119 #define bmGPINIRQ7 0x80
00120 
00121 #define rGPINIEN    0xb8    //23<<3
00122 /* GPINIEN Bits */
00123 #define bmGPINIEN0 0x01
00124 #define bmGPINIEN1 0x02
00125 #define bmGPINIEN2 0x04
00126 #define bmGPINIEN3 0x08
00127 #define bmGPINIEN4 0x10
00128 #define bmGPINIEN5 0x20
00129 #define bmGPINIEN6 0x40
00130 #define bmGPINIEN7 0x80
00131 
00132 #define rGPINPOL    0xc0    //24<<3
00133 /* GPINPOL Bits */
00134 #define bmGPINPOL0 0x01
00135 #define bmGPINPOL1 0x02
00136 #define bmGPINPOL2 0x04
00137 #define bmGPINPOL3 0x08
00138 #define bmGPINPOL4 0x10
00139 #define bmGPINPOL5 0x20
00140 #define bmGPINPOL6 0x40
00141 #define bmGPINPOL7 0x80
00142 
00143 #define rHIRQ       0xc8    //25<<3
00144 /* HIRQ Bits */
00145 #define bmBUSEVENTIRQ   0x01   // indicates BUS Reset Done or BUS Resume
00146 #define bmRWUIRQ        0x02
00147 #define bmRCVDAVIRQ     0x04
00148 #define bmSNDBAVIRQ     0x08
00149 #define bmSUSDNIRQ      0x10
00150 #define bmCONDETIRQ     0x20
00151 #define bmFRAMEIRQ      0x40
00152 #define bmHXFRDNIRQ     0x80
00153 
00154 #define rHIEN           0xd0    //26<<3
00155 
00156 /* HIEN Bits */
00157 #define bmBUSEVENTIE    0x01
00158 #define bmRWUIE         0x02
00159 #define bmRCVDAVIE      0x04
00160 #define bmSNDBAVIE      0x08
00161 #define bmSUSDNIE       0x10
00162 #define bmCONDETIE      0x20
00163 #define bmFRAMEIE       0x40
00164 #define bmHXFRDNIE      0x80
00165 
00166 #define rMODE           0xd8    //27<<3
00167 
00168 /* MODE Bits */
00169 #define bmHOST          0x01
00170 #define bmLOWSPEED      0x02
00171 #define bmHUBPRE        0x04
00172 #define bmSOFKAENAB     0x08
00173 #define bmSEPIRQ        0x10
00174 #define bmDELAYISO      0x20
00175 #define bmDMPULLDN      0x40
00176 #define bmDPPULLDN      0x80
00177 
00178 #define rPERADDR    0xe0    //28<<3
00179 
00180 #define rHCTL       0xe8    //29<<3
00181 /* HCTL Bits */
00182 #define bmBUSRST        0x01
00183 #define bmFRMRST        0x02
00184 #define bmSAMPLEBUS     0x04
00185 #define bmSIGRSM        0x08
00186 #define bmRCVTOG0       0x10
00187 #define bmRCVTOG1       0x20
00188 #define bmSNDTOG0       0x40
00189 #define bmSNDTOG1       0x80
00190 
00191 #define rHXFR       0xf0    //30<<3
00192 /* Host transfer token values for writing the HXFR register (R30)   */
00193 /* OR this bit field with the endpoint number in bits 3:0               */
00194 #define tokSETUP  0x10  // HS=0, ISO=0, OUTNIN=0, SETUP=1
00195 #define tokIN     0x00  // HS=0, ISO=0, OUTNIN=0, SETUP=0
00196 #define tokOUT    0x20  // HS=0, ISO=0, OUTNIN=1, SETUP=0
00197 #define tokINHS   0x80  // HS=1, ISO=0, OUTNIN=0, SETUP=0
00198 #define tokOUTHS  0xA0  // HS=1, ISO=0, OUTNIN=1, SETUP=0
00199 #define tokISOIN  0x40  // HS=0, ISO=1, OUTNIN=0, SETUP=0
00200 #define tokISOOUT 0x60  // HS=0, ISO=1, OUTNIN=1, SETUP=0
00201 
00202 #define rHRSL       0xf8    //31<<3
00203 
00204 /* HRSL Bits */
00205 #define bmRCVTOGRD  0x10
00206 #define bmSNDTOGRD  0x20
00207 #define bmKSTATUS   0x40
00208 #define bmJSTATUS   0x80
00209 #define bmSE0       0x00    //SE0 - disconnect state
00210 #define bmSE1       0xc0    //SE1 - illegal state
00211 
00212 /* Host error result codes, the 4 LSB's in the HRSL register */
00213 #define hrSUCCESS   0x00
00214 #define hrBUSY      0x01
00215 #define hrBADREQ    0x02
00216 #define hrUNDEF     0x03
00217 #define hrNAK       0x04
00218 #define hrSTALL     0x05
00219 #define hrTOGERR    0x06
00220 #define hrWRONGPID  0x07
00221 #define hrBADBC     0x08
00222 #define hrPIDERR    0x09
00223 #define hrPKTERR    0x0A
00224 #define hrCRCERR    0x0B
00225 #define hrKERR      0x0C
00226 #define hrJERR      0x0D
00227 #define hrTIMEOUT   0x0E
00228 #define hrBABBLE    0x0F
00229 
00230 #define MODE_FS_HOST    (bmDPPULLDN|bmDMPULLDN|bmHOST|bmSOFKAENAB)
00231 #define MODE_LS_HOST    (bmDPPULLDN|bmDMPULLDN|bmHOST|bmLOWSPEED|bmSOFKAENAB)
00232 
00233 typedef enum
00234 {
00235     vbus_on = 0,
00236     vbus_off= GPX_VBDET
00237 } VBUS_t;
00238 
00239 class MAX3421E
00240 {
00241     SPI                 _spi;
00242     DigitalOut          _ss;
00243     InterruptIn         _intr;
00244     static uint8_t      vbusState;
00245 public:
00246     MAX3421E(PinName mosi, PinName miso, PinName sck, PinName ss, PinName intr);
00247     void        regWr(uint8_t reg, uint8_t data);
00248     uint8_t*    bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* data_p);
00249     void        gpioWr(uint8_t data);
00250     uint8_t     regRd(uint8_t reg);
00251     uint8_t*    bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* data_p);
00252     uint8_t     gpioRd();
00253     uint8_t     gpioRdOutput();
00254     uint16_t    reset();
00255     int8_t      init();
00256     int8_t      init(int mseconds);
00257 
00258     void        vbusPower(VBUS_t state)     { regWr(rPINCTL, (bmFDUPSPI | bmINTLEVEL | state)); }
00259     uint8_t     getVbusState(void)          { return vbusState; }
00260     void        busprobe();
00261     uint8_t     GpxHandler();
00262     uint8_t     intHandler();
00263     uint8_t     task();
00264 };
00265 
00266 #endif //_MAX3421E_H_