Chen Huan
平衡车的MPU6050驱动 C.H.
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mpu6050.h
00001 #ifndef __MPU6050_H 00002 #define __MPU6050_H 00003 //#include "mpuiic.h" 00004 #include "mbed.h" 00005 00006 ////////////////////////////////////////////////////////////////////////////////// 00007 //MPU6050驱动程序 C.H. 00008 ////////////////////////////////////////////////////////////////////////////////// 00009 00010 //用来选择驱动程序用于哪个项目的电路板 00011 //define DRIVER_MODE_ROTOR //四旋翼 00012 #define DRIVER_MODE_BALANCE //平衡车 00013 00014 //兼容宏定义 00015 #define delay_us wait_us 00016 #define delay_ms wait_ms 00017 00018 00019 //IO口操作宏定义 00020 #define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2)) 00021 #define MEM_ADDR(addr) *((volatile unsigned long *)(addr)) 00022 #define BIT_ADDR(addr, bitnum) MEM_ADDR(BITBAND(addr, bitnum)) 00023 //IO口地址映射 00024 #define GPIOA_ODR_Addr (GPIOA_BASE+12) //0x4001080C 00025 #define GPIOB_ODR_Addr (GPIOB_BASE+12) //0x40010C0C 00026 #define GPIOC_ODR_Addr (GPIOC_BASE+12) //0x4001100C 00027 #define GPIOD_ODR_Addr (GPIOD_BASE+12) //0x4001140C 00028 #define GPIOE_ODR_Addr (GPIOE_BASE+12) //0x4001180C 00029 #define GPIOF_ODR_Addr (GPIOF_BASE+12) //0x40011A0C 00030 #define GPIOG_ODR_Addr (GPIOG_BASE+12) //0x40011E0C 00031 00032 #define GPIOA_IDR_Addr (GPIOA_BASE+8) //0x40010808 00033 #define GPIOB_IDR_Addr (GPIOB_BASE+8) //0x40010C08 00034 #define GPIOC_IDR_Addr (GPIOC_BASE+8) //0x40011008 00035 #define GPIOD_IDR_Addr (GPIOD_BASE+8) //0x40011408 00036 #define GPIOE_IDR_Addr (GPIOE_BASE+8) //0x40011808 00037 #define GPIOF_IDR_Addr (GPIOF_BASE+8) //0x40011A08 00038 #define GPIOG_IDR_Addr (GPIOG_BASE+8) //0x40011E08 00039 00040 //IO口操作,只对单一的IO口! 00041 //确保n的值小于16! 00042 #define PAout(n) BIT_ADDR(GPIOA_ODR_Addr,n) //输出 00043 #define PAin(n) BIT_ADDR(GPIOA_IDR_Addr,n) //输入 00044 00045 #define PBout(n) BIT_ADDR(GPIOB_ODR_Addr,n) //输出 00046 #define PBin(n) BIT_ADDR(GPIOB_IDR_Addr,n) //输入 00047 00048 #define PCout(n) BIT_ADDR(GPIOC_ODR_Addr,n) //输出 00049 #define PCin(n) BIT_ADDR(GPIOC_IDR_Addr,n) //输入 00050 00051 #define PDout(n) BIT_ADDR(GPIOD_ODR_Addr,n) //输出 00052 #define PDin(n) BIT_ADDR(GPIOD_IDR_Addr,n) //输入 00053 00054 #define PEout(n) BIT_ADDR(GPIOE_ODR_Addr,n) //输出 00055 #define PEin(n) BIT_ADDR(GPIOE_IDR_Addr,n) //输入 00056 00057 #define PFout(n) BIT_ADDR(GPIOF_ODR_Addr,n) //输出 00058 #define PFin(n) BIT_ADDR(GPIOF_IDR_Addr,n) //输入 00059 00060 #define PGout(n) BIT_ADDR(GPIOG_ODR_Addr,n) //输出 00061 #define PGin(n) BIT_ADDR(GPIOG_IDR_Addr,n) //输入 00062 ///////////////////////////////////////////////////////////////// 00063 00064 00065 00066 00067 //#define MPU_ACCEL_OFFS_REG 0X06 //accel_offs寄存器,可读取版本号,寄存器手册未提到 00068 //#define MPU_PROD_ID_REG 0X0C //prod id寄存器,在寄存器手册未提到 00069 #define MPU_SELF_TESTX_REG 0X0D //自检寄存器X 00070 #define MPU_SELF_TESTY_REG 0X0E //自检寄存器Y 00071 #define MPU_SELF_TESTZ_REG 0X0F //自检寄存器Z 00072 #define MPU_SELF_TESTA_REG 0X10 //自检寄存器A 00073 #define MPU_SAMPLE_RATE_REG 0X19 //采样频率分频器 00074 #define MPU_CFG_REG 0X1A //配置寄存器 00075 #define MPU_GYRO_CFG_REG 0X1B //陀螺仪配置寄存器 00076 #define MPU_ACCEL_CFG_REG 0X1C //加速度计配置寄存器 00077 #define MPU_MOTION_DET_REG 0X1F //运动检测阀值设置寄存器 00078 #define MPU_FIFO_EN_REG 0X23 //FIFO使能寄存器 00079 #define MPU_I2CMST_CTRL_REG 0X24 //IIC主机控制寄存器 00080 #define MPU_I2CSLV0_ADDR_REG 0X25 //IIC从机0器件地址寄存器 00081 #define MPU_I2CSLV0_REG 0X26 //IIC从机0数据地址寄存器 00082 #define MPU_I2CSLV0_CTRL_REG 0X27 //IIC从机0控制寄存器 00083 #define MPU_I2CSLV1_ADDR_REG 0X28 //IIC从机1器件地址寄存器 00084 #define MPU_I2CSLV1_REG 0X29 //IIC从机1数据地址寄存器 00085 #define MPU_I2CSLV1_CTRL_REG 0X2A //IIC从机1控制寄存器 00086 #define MPU_I2CSLV2_ADDR_REG 0X2B //IIC从机2器件地址寄存器 00087 #define MPU_I2CSLV2_REG 0X2C //IIC从机2数据地址寄存器 00088 #define MPU_I2CSLV2_CTRL_REG 0X2D //IIC从机2控制寄存器 00089 #define MPU_I2CSLV3_ADDR_REG 0X2E //IIC从机3器件地址寄存器 00090 #define MPU_I2CSLV3_REG 0X2F //IIC从机3数据地址寄存器 00091 #define MPU_I2CSLV3_CTRL_REG 0X30 //IIC从机3控制寄存器 00092 #define MPU_I2CSLV4_ADDR_REG 0X31 //IIC从机4器件地址寄存器 00093 #define MPU_I2CSLV4_REG 0X32 //IIC从机4数据地址寄存器 00094 #define MPU_I2CSLV4_DO_REG 0X33 //IIC从机4写数据寄存器 00095 #define MPU_I2CSLV4_CTRL_REG 0X34 //IIC从机4控制寄存器 00096 #define MPU_I2CSLV4_DI_REG 0X35 //IIC从机4读数据寄存器 00097 00098 #define MPU_I2CMST_STA_REG 0X36 //IIC主机状态寄存器 00099 #define MPU_INTBP_CFG_REG 0X37 //中断/旁路设置寄存器 00100 #define MPU_INT_EN_REG 0X38 //中断使能寄存器 00101 #define MPU_INT_STA_REG 0X3A //中断状态寄存器 00102 00103 #define MPU_ACCEL_XOUTH_REG 0X3B //加速度值,X轴高8位寄存器 00104 #define MPU_ACCEL_XOUTL_REG 0X3C //加速度值,X轴低8位寄存器 00105 #define MPU_ACCEL_YOUTH_REG 0X3D //加速度值,Y轴高8位寄存器 00106 #define MPU_ACCEL_YOUTL_REG 0X3E //加速度值,Y轴低8位寄存器 00107 #define MPU_ACCEL_ZOUTH_REG 0X3F //加速度值,Z轴高8位寄存器 00108 #define MPU_ACCEL_ZOUTL_REG 0X40 //加速度值,Z轴低8位寄存器 00109 00110 #define MPU_TEMP_OUTH_REG 0X41 //温度值高八位寄存器 00111 #define MPU_TEMP_OUTL_REG 0X42 //温度值低8位寄存器 00112 00113 #define MPU_GYRO_XOUTH_REG 0X43 //陀螺仪值,X轴高8位寄存器 00114 #define MPU_GYRO_XOUTL_REG 0X44 //陀螺仪值,X轴低8位寄存器 00115 #define MPU_GYRO_YOUTH_REG 0X45 //陀螺仪值,Y轴高8位寄存器 00116 #define MPU_GYRO_YOUTL_REG 0X46 //陀螺仪值,Y轴低8位寄存器 00117 #define MPU_GYRO_ZOUTH_REG 0X47 //陀螺仪值,Z轴高8位寄存器 00118 #define MPU_GYRO_ZOUTL_REG 0X48 //陀螺仪值,Z轴低8位寄存器 00119 00120 #define MPU_I2CSLV0_DO_REG 0X63 //IIC从机0数据寄存器 00121 #define MPU_I2CSLV1_DO_REG 0X64 //IIC从机1数据寄存器 00122 #define MPU_I2CSLV2_DO_REG 0X65 //IIC从机2数据寄存器 00123 #define MPU_I2CSLV3_DO_REG 0X66 //IIC从机3数据寄存器 00124 00125 #define MPU_I2CMST_DELAY_REG 0X67 //IIC主机延时管理寄存器 00126 #define MPU_SIGPATH_RST_REG 0X68 //信号通道复位寄存器 00127 #define MPU_MDETECT_CTRL_REG 0X69 //运动检测控制寄存器 00128 #define MPU_USER_CTRL_REG 0X6A //用户控制寄存器 00129 #define MPU_PWR_MGMT1_REG 0X6B //电源管理寄存器1 00130 #define MPU_PWR_MGMT2_REG 0X6C //电源管理寄存器2 00131 #define MPU_FIFO_CNTH_REG 0X72 //FIFO计数寄存器高八位 00132 #define MPU_FIFO_CNTL_REG 0X73 //FIFO计数寄存器低八位 00133 #define MPU_FIFO_RW_REG 0X74 //FIFO读写寄存器 00134 #define MPU_DEVICE_ID_REG 0X75 //器件ID寄存器 00135 00136 //如果AD0脚(9脚)接地,IIC地址为0X68(不包含最低位). 00137 //如果接V3.3,则IIC地址为0X69(不包含最低位). 00138 #define MPU_ADDR 0X68 00139 00140 00141 ////因为模块AD0默认接GND,所以转为读写地址后,为0XD1和0XD0(如果接VCC,则为0XD3和0XD2) 00142 //#define MPU_READ 0XD1 00143 //#define MPU_WRITE 0XD0 00144 00145 unsigned char MPU_Init(void); //初始化MPU6050 00146 unsigned char MPU_Write_Len(unsigned char addr,unsigned char reg,unsigned char len,unsigned char *buf);//IIC连续写 00147 unsigned char MPU_Read_Len(unsigned char addr,unsigned char reg,unsigned char len,unsigned char *buf); //IIC连续读 00148 unsigned char MPU_Write_Byte(unsigned char reg,unsigned char data); //IIC写一个字节 00149 unsigned char MPU_Read_Byte(unsigned char reg); //IIC读一个字节 00150 00151 unsigned char MPU_Set_Gyro_Fsr(unsigned char fsr); 00152 unsigned char MPU_Set_Accel_Fsr(unsigned char fsr); 00153 unsigned char MPU_Set_LPF(unsigned short lpf); 00154 unsigned char MPU_Set_Rate(unsigned short rate); 00155 unsigned char MPU_Set_Fifo(unsigned char sens); 00156 00157 00158 short MPU_Get_Temperature(void); 00159 unsigned char MPU_Get_Gyroscope(short *gx,short *gy,short *gz); 00160 unsigned char MPU_Get_Accelerometer(short *ax,short *ay,short *az); 00161 00162 #if defined DRIVER_MODE_BALANCE 00163 //IO方向设置 00164 #define MPU_SDA_IN() {GPIOB->CRL&=0X0FFFFFFF;GPIOB->CRL|=8<<28;} 00165 #define MPU_SDA_OUT() {GPIOB->CRL&=0X0FFFFFFF;GPIOB->CRL|=3<<28;} 00166 00167 //IO操作函数 00168 #define MPU_IIC_SCL PBout(6) //SCL 00169 #define MPU_IIC_SDA PBout(7) //SDA 00170 #define MPU_READ_SDA PBin(7) //输入SDA 00171 #elif defined DRIVER_MODE_ROTOR 00172 00173 #define MPU_SDA_IN() {GPIOB->CRH&=0XFFFF0FFF;GPIOB->CRH|=8<<12;} 00174 #define MPU_SDA_OUT() {GPIOB->CRH&=0XFFFF0FFF;GPIOB->CRH|=3<<12;} 00175 00176 #define MPU_IIC_SCL PBout(10) //SCL 00177 #define MPU_IIC_SDA PBout(11) //SDA 00178 #define MPU_READ_SDA PBin(11) //输入SDA 00179 #else 00180 #error Target Board is not specified. 00181 #endif 00182 00183 00184 //IIC所有操作函数 00185 void MPU_IIC_Delay(void); //MPU IIC延时函数 00186 void MPU_IIC_Init(void); //初始化IIC的IO口 00187 void MPU_IIC_Start(void); //发送IIC开始信号 00188 void MPU_IIC_Stop(void); //发送IIC停止信号 00189 void MPU_IIC_Send_Byte(unsigned char txd); //IIC发送一个字节 00190 unsigned char MPU_IIC_Read_Byte(unsigned char ack);//IIC读取一个字节 00191 unsigned char MPU_IIC_Wait_Ack(void); //IIC等待ACK信号 00192 void MPU_IIC_Ack(void); //IIC发送ACK信号 00193 void MPU_IIC_NAck(void); //IIC不发送ACK信号 00194 00195 void IMPU_IC_Write_One_Byte(unsigned char daddr,unsigned char addr,unsigned char data); 00196 unsigned char MPU_IIC_Read_One_Byte(unsigned char daddr,unsigned char addr); 00197 00198 #define KEY_CFG_25 (0) 00199 #define KEY_CFG_24 (KEY_CFG_25 + 1) 00200 #define KEY_CFG_26 (KEY_CFG_24 + 1) 00201 #define KEY_CFG_27 (KEY_CFG_26 + 1) 00202 #define KEY_CFG_21 (KEY_CFG_27 + 1) 00203 #define KEY_CFG_20 (KEY_CFG_21 + 1) 00204 #define KEY_CFG_TAP4 (KEY_CFG_20 + 1) 00205 #define KEY_CFG_TAP5 (KEY_CFG_TAP4 + 1) 00206 #define KEY_CFG_TAP6 (KEY_CFG_TAP5 + 1) 00207 #define KEY_CFG_TAP7 (KEY_CFG_TAP6 + 1) 00208 #define KEY_CFG_TAP0 (KEY_CFG_TAP7 + 1) 00209 #define KEY_CFG_TAP1 (KEY_CFG_TAP0 + 1) 00210 #define KEY_CFG_TAP2 (KEY_CFG_TAP1 + 1) 00211 #define KEY_CFG_TAP3 (KEY_CFG_TAP2 + 1) 00212 #define KEY_CFG_TAP_QUANTIZE (KEY_CFG_TAP3 + 1) 00213 #define KEY_CFG_TAP_JERK (KEY_CFG_TAP_QUANTIZE + 1) 00214 #define KEY_CFG_DR_INT (KEY_CFG_TAP_JERK + 1) 00215 #define KEY_CFG_AUTH (KEY_CFG_DR_INT + 1) 00216 #define KEY_CFG_TAP_SAVE_ACCB (KEY_CFG_AUTH + 1) 00217 #define KEY_CFG_TAP_CLEAR_STICKY (KEY_CFG_TAP_SAVE_ACCB + 1) 00218 #define KEY_CFG_FIFO_ON_EVENT (KEY_CFG_TAP_CLEAR_STICKY + 1) 00219 #define KEY_FCFG_ACCEL_INPUT (KEY_CFG_FIFO_ON_EVENT + 1) 00220 #define KEY_FCFG_ACCEL_INIT (KEY_FCFG_ACCEL_INPUT + 1) 00221 #define KEY_CFG_23 (KEY_FCFG_ACCEL_INIT + 1) 00222 #define KEY_FCFG_1 (KEY_CFG_23 + 1) 00223 #define KEY_FCFG_3 (KEY_FCFG_1 + 1) 00224 #define KEY_FCFG_2 (KEY_FCFG_3 + 1) 00225 #define KEY_CFG_3D (KEY_FCFG_2 + 1) 00226 #define KEY_CFG_3B (KEY_CFG_3D + 1) 00227 #define KEY_CFG_3C (KEY_CFG_3B + 1) 00228 #define KEY_FCFG_5 (KEY_CFG_3C + 1) 00229 #define KEY_FCFG_4 (KEY_FCFG_5 + 1) 00230 #define KEY_FCFG_7 (KEY_FCFG_4 + 1) 00231 #define KEY_FCFG_FSCALE (KEY_FCFG_7 + 1) 00232 #define KEY_FCFG_AZ (KEY_FCFG_FSCALE + 1) 00233 #define KEY_FCFG_6 (KEY_FCFG_AZ + 1) 00234 #define KEY_FCFG_LSB4 (KEY_FCFG_6 + 1) 00235 #define KEY_CFG_12 (KEY_FCFG_LSB4 + 1) 00236 #define KEY_CFG_14 (KEY_CFG_12 + 1) 00237 #define KEY_CFG_15 (KEY_CFG_14 + 1) 00238 #define KEY_CFG_16 (KEY_CFG_15 + 1) 00239 #define KEY_CFG_18 (KEY_CFG_16 + 1) 00240 #define KEY_CFG_6 (KEY_CFG_18 + 1) 00241 #define KEY_CFG_7 (KEY_CFG_6 + 1) 00242 #define KEY_CFG_4 (KEY_CFG_7 + 1) 00243 #define KEY_CFG_5 (KEY_CFG_4 + 1) 00244 #define KEY_CFG_2 (KEY_CFG_5 + 1) 00245 #define KEY_CFG_3 (KEY_CFG_2 + 1) 00246 #define KEY_CFG_1 (KEY_CFG_3 + 1) 00247 #define KEY_CFG_EXTERNAL (KEY_CFG_1 + 1) 00248 #define KEY_CFG_8 (KEY_CFG_EXTERNAL + 1) 00249 #define KEY_CFG_9 (KEY_CFG_8 + 1) 00250 #define KEY_CFG_ORIENT_3 (KEY_CFG_9 + 1) 00251 #define KEY_CFG_ORIENT_2 (KEY_CFG_ORIENT_3 + 1) 00252 #define KEY_CFG_ORIENT_1 (KEY_CFG_ORIENT_2 + 1) 00253 #define KEY_CFG_GYRO_SOURCE (KEY_CFG_ORIENT_1 + 1) 00254 #define KEY_CFG_ORIENT_IRQ_1 (KEY_CFG_GYRO_SOURCE + 1) 00255 #define KEY_CFG_ORIENT_IRQ_2 (KEY_CFG_ORIENT_IRQ_1 + 1) 00256 #define KEY_CFG_ORIENT_IRQ_3 (KEY_CFG_ORIENT_IRQ_2 + 1) 00257 #define KEY_FCFG_MAG_VAL (KEY_CFG_ORIENT_IRQ_3 + 1) 00258 #define KEY_FCFG_MAG_MOV (KEY_FCFG_MAG_VAL + 1) 00259 #define KEY_CFG_LP_QUAT (KEY_FCFG_MAG_MOV + 1) 00260 00261 /* MPU6050 keys */ 00262 #define KEY_CFG_ACCEL_FILTER (KEY_CFG_LP_QUAT + 1) 00263 #define KEY_CFG_MOTION_BIAS (KEY_CFG_ACCEL_FILTER + 1) 00264 #define KEY_TEMPLABEL (KEY_CFG_MOTION_BIAS + 1) 00265 00266 #define KEY_D_0_22 (KEY_TEMPLABEL + 1) 00267 #define KEY_D_0_24 (KEY_D_0_22 + 1) 00268 #define KEY_D_0_36 (KEY_D_0_24 + 1) 00269 #define KEY_D_0_52 (KEY_D_0_36 + 1) 00270 #define KEY_D_0_96 (KEY_D_0_52 + 1) 00271 #define KEY_D_0_104 (KEY_D_0_96 + 1) 00272 #define KEY_D_0_108 (KEY_D_0_104 + 1) 00273 #define KEY_D_0_163 (KEY_D_0_108 + 1) 00274 #define KEY_D_0_188 (KEY_D_0_163 + 1) 00275 #define KEY_D_0_192 (KEY_D_0_188 + 1) 00276 #define KEY_D_0_224 (KEY_D_0_192 + 1) 00277 #define KEY_D_0_228 (KEY_D_0_224 + 1) 00278 #define KEY_D_0_232 (KEY_D_0_228 + 1) 00279 #define KEY_D_0_236 (KEY_D_0_232 + 1) 00280 00281 #define KEY_DMP_PREVPTAT (KEY_D_0_236 + 1) 00282 #define KEY_D_1_2 (KEY_DMP_PREVPTAT + 1) 00283 #define KEY_D_1_4 (KEY_D_1_2 + 1) 00284 #define KEY_D_1_8 (KEY_D_1_4 + 1) 00285 #define KEY_D_1_10 (KEY_D_1_8 + 1) 00286 #define KEY_D_1_24 (KEY_D_1_10 + 1) 00287 #define KEY_D_1_28 (KEY_D_1_24 + 1) 00288 #define KEY_D_1_36 (KEY_D_1_28 + 1) 00289 #define KEY_D_1_40 (KEY_D_1_36 + 1) 00290 #define KEY_D_1_44 (KEY_D_1_40 + 1) 00291 #define KEY_D_1_72 (KEY_D_1_44 + 1) 00292 #define KEY_D_1_74 (KEY_D_1_72 + 1) 00293 #define KEY_D_1_79 (KEY_D_1_74 + 1) 00294 #define KEY_D_1_88 (KEY_D_1_79 + 1) 00295 #define KEY_D_1_90 (KEY_D_1_88 + 1) 00296 #define KEY_D_1_92 (KEY_D_1_90 + 1) 00297 #define KEY_D_1_96 (KEY_D_1_92 + 1) 00298 #define KEY_D_1_98 (KEY_D_1_96 + 1) 00299 #define KEY_D_1_100 (KEY_D_1_98 + 1) 00300 #define KEY_D_1_106 (KEY_D_1_100 + 1) 00301 #define KEY_D_1_108 (KEY_D_1_106 + 1) 00302 #define KEY_D_1_112 (KEY_D_1_108 + 1) 00303 #define KEY_D_1_128 (KEY_D_1_112 + 1) 00304 #define KEY_D_1_152 (KEY_D_1_128 + 1) 00305 #define KEY_D_1_160 (KEY_D_1_152 + 1) 00306 #define KEY_D_1_168 (KEY_D_1_160 + 1) 00307 #define KEY_D_1_175 (KEY_D_1_168 + 1) 00308 #define KEY_D_1_176 (KEY_D_1_175 + 1) 00309 #define KEY_D_1_178 (KEY_D_1_176 + 1) 00310 #define KEY_D_1_179 (KEY_D_1_178 + 1) 00311 #define KEY_D_1_218 (KEY_D_1_179 + 1) 00312 #define KEY_D_1_232 (KEY_D_1_218 + 1) 00313 #define KEY_D_1_236 (KEY_D_1_232 + 1) 00314 #define KEY_D_1_240 (KEY_D_1_236 + 1) 00315 #define KEY_D_1_244 (KEY_D_1_240 + 1) 00316 #define KEY_D_1_250 (KEY_D_1_244 + 1) 00317 #define KEY_D_1_252 (KEY_D_1_250 + 1) 00318 #define KEY_D_2_12 (KEY_D_1_252 + 1) 00319 #define KEY_D_2_96 (KEY_D_2_12 + 1) 00320 #define KEY_D_2_108 (KEY_D_2_96 + 1) 00321 #define KEY_D_2_208 (KEY_D_2_108 + 1) 00322 #define KEY_FLICK_MSG (KEY_D_2_208 + 1) 00323 #define KEY_FLICK_COUNTER (KEY_FLICK_MSG + 1) 00324 #define KEY_FLICK_LOWER (KEY_FLICK_COUNTER + 1) 00325 #define KEY_CFG_FLICK_IN (KEY_FLICK_LOWER + 1) 00326 #define KEY_FLICK_UPPER (KEY_CFG_FLICK_IN + 1) 00327 #define KEY_CGNOTICE_INTR (KEY_FLICK_UPPER + 1) 00328 #define KEY_D_2_224 (KEY_CGNOTICE_INTR + 1) 00329 #define KEY_D_2_244 (KEY_D_2_224 + 1) 00330 #define KEY_D_2_248 (KEY_D_2_244 + 1) 00331 #define KEY_D_2_252 (KEY_D_2_248 + 1) 00332 00333 #define KEY_D_GYRO_BIAS_X (KEY_D_2_252 + 1) 00334 #define KEY_D_GYRO_BIAS_Y (KEY_D_GYRO_BIAS_X + 1) 00335 #define KEY_D_GYRO_BIAS_Z (KEY_D_GYRO_BIAS_Y + 1) 00336 #define KEY_D_ACC_BIAS_X (KEY_D_GYRO_BIAS_Z + 1) 00337 #define KEY_D_ACC_BIAS_Y (KEY_D_ACC_BIAS_X + 1) 00338 #define KEY_D_ACC_BIAS_Z (KEY_D_ACC_BIAS_Y + 1) 00339 #define KEY_D_GYRO_ENABLE (KEY_D_ACC_BIAS_Z + 1) 00340 #define KEY_D_ACCEL_ENABLE (KEY_D_GYRO_ENABLE + 1) 00341 #define KEY_D_QUAT_ENABLE (KEY_D_ACCEL_ENABLE +1) 00342 #define KEY_D_OUTPUT_ENABLE (KEY_D_QUAT_ENABLE + 1) 00343 #define KEY_D_CR_TIME_G (KEY_D_OUTPUT_ENABLE + 1) 00344 #define KEY_D_CR_TIME_A (KEY_D_CR_TIME_G + 1) 00345 #define KEY_D_CR_TIME_Q (KEY_D_CR_TIME_A + 1) 00346 #define KEY_D_CS_TAX (KEY_D_CR_TIME_Q + 1) 00347 #define KEY_D_CS_TAY (KEY_D_CS_TAX + 1) 00348 #define KEY_D_CS_TAZ (KEY_D_CS_TAY + 1) 00349 #define KEY_D_CS_TGX (KEY_D_CS_TAZ + 1) 00350 #define KEY_D_CS_TGY (KEY_D_CS_TGX + 1) 00351 #define KEY_D_CS_TGZ (KEY_D_CS_TGY + 1) 00352 #define KEY_D_CS_TQ0 (KEY_D_CS_TGZ + 1) 00353 #define KEY_D_CS_TQ1 (KEY_D_CS_TQ0 + 1) 00354 #define KEY_D_CS_TQ2 (KEY_D_CS_TQ1 + 1) 00355 #define KEY_D_CS_TQ3 (KEY_D_CS_TQ2 + 1) 00356 00357 /* Compass keys */ 00358 #define KEY_CPASS_BIAS_X (KEY_D_CS_TQ3 + 1) 00359 #define KEY_CPASS_BIAS_Y (KEY_CPASS_BIAS_X + 1) 00360 #define KEY_CPASS_BIAS_Z (KEY_CPASS_BIAS_Y + 1) 00361 #define KEY_CPASS_MTX_00 (KEY_CPASS_BIAS_Z + 1) 00362 #define KEY_CPASS_MTX_01 (KEY_CPASS_MTX_00 + 1) 00363 #define KEY_CPASS_MTX_02 (KEY_CPASS_MTX_01 + 1) 00364 #define KEY_CPASS_MTX_10 (KEY_CPASS_MTX_02 + 1) 00365 #define KEY_CPASS_MTX_11 (KEY_CPASS_MTX_10 + 1) 00366 #define KEY_CPASS_MTX_12 (KEY_CPASS_MTX_11 + 1) 00367 #define KEY_CPASS_MTX_20 (KEY_CPASS_MTX_12 + 1) 00368 #define KEY_CPASS_MTX_21 (KEY_CPASS_MTX_20 + 1) 00369 #define KEY_CPASS_MTX_22 (KEY_CPASS_MTX_21 + 1) 00370 00371 /* Gesture Keys */ 00372 #define KEY_DMP_TAPW_MIN (KEY_CPASS_MTX_22 + 1) 00373 #define KEY_DMP_TAP_THR_X (KEY_DMP_TAPW_MIN + 1) 00374 #define KEY_DMP_TAP_THR_Y (KEY_DMP_TAP_THR_X + 1) 00375 #define KEY_DMP_TAP_THR_Z (KEY_DMP_TAP_THR_Y + 1) 00376 #define KEY_DMP_SH_TH_Y (KEY_DMP_TAP_THR_Z + 1) 00377 #define KEY_DMP_SH_TH_X (KEY_DMP_SH_TH_Y + 1) 00378 #define KEY_DMP_SH_TH_Z (KEY_DMP_SH_TH_X + 1) 00379 #define KEY_DMP_ORIENT (KEY_DMP_SH_TH_Z + 1) 00380 #define KEY_D_ACT0 (KEY_DMP_ORIENT + 1) 00381 #define KEY_D_ACSX (KEY_D_ACT0 + 1) 00382 #define KEY_D_ACSY (KEY_D_ACSX + 1) 00383 #define KEY_D_ACSZ (KEY_D_ACSY + 1) 00384 00385 #define KEY_X_GRT_Y_TMP (KEY_D_ACSZ + 1) 00386 #define KEY_SKIP_X_GRT_Y_TMP (KEY_X_GRT_Y_TMP + 1) 00387 #define KEY_SKIP_END_COMPARE (KEY_SKIP_X_GRT_Y_TMP + 1) 00388 #define KEY_END_COMPARE_Y_X_TMP2 (KEY_SKIP_END_COMPARE + 1) 00389 #define KEY_CFG_ANDROID_ORIENT_INT (KEY_END_COMPARE_Y_X_TMP2 + 1) 00390 #define KEY_NO_ORIENT_INTERRUPT (KEY_CFG_ANDROID_ORIENT_INT + 1) 00391 #define KEY_END_COMPARE_Y_X_TMP (KEY_NO_ORIENT_INTERRUPT + 1) 00392 #define KEY_END_ORIENT_1 (KEY_END_COMPARE_Y_X_TMP + 1) 00393 #define KEY_END_COMPARE_Y_X (KEY_END_ORIENT_1 + 1) 00394 #define KEY_END_ORIENT (KEY_END_COMPARE_Y_X + 1) 00395 #define KEY_X_GRT_Y (KEY_END_ORIENT + 1) 00396 #define KEY_NOT_TIME_MINUS_1 (KEY_X_GRT_Y + 1) 00397 #define KEY_END_COMPARE_Y_X_TMP3 (KEY_NOT_TIME_MINUS_1 + 1) 00398 #define KEY_X_GRT_Y_TMP2 (KEY_END_COMPARE_Y_X_TMP3 + 1) 00399 00400 /* Authenticate Keys */ 00401 #define KEY_D_AUTH_OUT (KEY_X_GRT_Y_TMP2 + 1) 00402 #define KEY_D_AUTH_IN (KEY_D_AUTH_OUT + 1) 00403 #define KEY_D_AUTH_A (KEY_D_AUTH_IN + 1) 00404 #define KEY_D_AUTH_B (KEY_D_AUTH_A + 1) 00405 00406 /* Pedometer standalone only keys */ 00407 #define KEY_D_PEDSTD_BP_B (KEY_D_AUTH_B + 1) 00408 #define KEY_D_PEDSTD_HP_A (KEY_D_PEDSTD_BP_B + 1) 00409 #define KEY_D_PEDSTD_HP_B (KEY_D_PEDSTD_HP_A + 1) 00410 #define KEY_D_PEDSTD_BP_A4 (KEY_D_PEDSTD_HP_B + 1) 00411 #define KEY_D_PEDSTD_BP_A3 (KEY_D_PEDSTD_BP_A4 + 1) 00412 #define KEY_D_PEDSTD_BP_A2 (KEY_D_PEDSTD_BP_A3 + 1) 00413 #define KEY_D_PEDSTD_BP_A1 (KEY_D_PEDSTD_BP_A2 + 1) 00414 #define KEY_D_PEDSTD_INT_THRSH (KEY_D_PEDSTD_BP_A1 + 1) 00415 #define KEY_D_PEDSTD_CLIP (KEY_D_PEDSTD_INT_THRSH + 1) 00416 #define KEY_D_PEDSTD_SB (KEY_D_PEDSTD_CLIP + 1) 00417 #define KEY_D_PEDSTD_SB_TIME (KEY_D_PEDSTD_SB + 1) 00418 #define KEY_D_PEDSTD_PEAKTHRSH (KEY_D_PEDSTD_SB_TIME + 1) 00419 #define KEY_D_PEDSTD_TIML (KEY_D_PEDSTD_PEAKTHRSH + 1) 00420 #define KEY_D_PEDSTD_TIMH (KEY_D_PEDSTD_TIML + 1) 00421 #define KEY_D_PEDSTD_PEAK (KEY_D_PEDSTD_TIMH + 1) 00422 #define KEY_D_PEDSTD_TIMECTR (KEY_D_PEDSTD_PEAK + 1) 00423 #define KEY_D_PEDSTD_STEPCTR (KEY_D_PEDSTD_TIMECTR + 1) 00424 #define KEY_D_PEDSTD_WALKTIME (KEY_D_PEDSTD_STEPCTR + 1) 00425 #define KEY_D_PEDSTD_DECI (KEY_D_PEDSTD_WALKTIME + 1) 00426 00427 /*Host Based No Motion*/ 00428 #define KEY_D_HOST_NO_MOT (KEY_D_PEDSTD_DECI + 1) 00429 00430 /* EIS keys */ 00431 #define KEY_P_EIS_FIFO_FOOTER (KEY_D_HOST_NO_MOT + 1) 00432 #define KEY_P_EIS_FIFO_YSHIFT (KEY_P_EIS_FIFO_FOOTER + 1) 00433 #define KEY_P_EIS_DATA_RATE (KEY_P_EIS_FIFO_YSHIFT + 1) 00434 #define KEY_P_EIS_FIFO_XSHIFT (KEY_P_EIS_DATA_RATE + 1) 00435 #define KEY_P_EIS_FIFO_SYNC (KEY_P_EIS_FIFO_XSHIFT + 1) 00436 #define KEY_P_EIS_FIFO_ZSHIFT (KEY_P_EIS_FIFO_SYNC + 1) 00437 #define KEY_P_EIS_FIFO_READY (KEY_P_EIS_FIFO_ZSHIFT + 1) 00438 #define KEY_DMP_FOOTER (KEY_P_EIS_FIFO_READY + 1) 00439 #define KEY_DMP_INTX_HC (KEY_DMP_FOOTER + 1) 00440 #define KEY_DMP_INTX_PH (KEY_DMP_INTX_HC + 1) 00441 #define KEY_DMP_INTX_SH (KEY_DMP_INTX_PH + 1) 00442 #define KEY_DMP_AINV_SH (KEY_DMP_INTX_SH + 1) 00443 #define KEY_DMP_A_INV_XH (KEY_DMP_AINV_SH + 1) 00444 #define KEY_DMP_AINV_PH (KEY_DMP_A_INV_XH + 1) 00445 #define KEY_DMP_CTHX_H (KEY_DMP_AINV_PH + 1) 00446 #define KEY_DMP_CTHY_H (KEY_DMP_CTHX_H + 1) 00447 #define KEY_DMP_CTHZ_H (KEY_DMP_CTHY_H + 1) 00448 #define KEY_DMP_NCTHX_H (KEY_DMP_CTHZ_H + 1) 00449 #define KEY_DMP_NCTHY_H (KEY_DMP_NCTHX_H + 1) 00450 #define KEY_DMP_NCTHZ_H (KEY_DMP_NCTHY_H + 1) 00451 #define KEY_DMP_CTSQ_XH (KEY_DMP_NCTHZ_H + 1) 00452 #define KEY_DMP_CTSQ_YH (KEY_DMP_CTSQ_XH + 1) 00453 #define KEY_DMP_CTSQ_ZH (KEY_DMP_CTSQ_YH + 1) 00454 #define KEY_DMP_INTX_H (KEY_DMP_CTSQ_ZH + 1) 00455 #define KEY_DMP_INTY_H (KEY_DMP_INTX_H + 1) 00456 #define KEY_DMP_INTZ_H (KEY_DMP_INTY_H + 1) 00457 //#define KEY_DMP_HPX_H (KEY_DMP_INTZ_H + 1) 00458 //#define KEY_DMP_HPY_H (KEY_DMP_HPX_H + 1) 00459 //#define KEY_DMP_HPZ_H (KEY_DMP_HPY_H + 1) 00460 00461 /* Stream keys */ 00462 #define KEY_STREAM_P_GYRO_Z (KEY_DMP_INTZ_H + 1) 00463 #define KEY_STREAM_P_GYRO_Y (KEY_STREAM_P_GYRO_Z + 1) 00464 #define KEY_STREAM_P_GYRO_X (KEY_STREAM_P_GYRO_Y + 1) 00465 #define KEY_STREAM_P_TEMP (KEY_STREAM_P_GYRO_X + 1) 00466 #define KEY_STREAM_P_AUX_Y (KEY_STREAM_P_TEMP + 1) 00467 #define KEY_STREAM_P_AUX_X (KEY_STREAM_P_AUX_Y + 1) 00468 #define KEY_STREAM_P_AUX_Z (KEY_STREAM_P_AUX_X + 1) 00469 #define KEY_STREAM_P_ACCEL_Y (KEY_STREAM_P_AUX_Z + 1) 00470 #define KEY_STREAM_P_ACCEL_X (KEY_STREAM_P_ACCEL_Y + 1) 00471 #define KEY_STREAM_P_FOOTER (KEY_STREAM_P_ACCEL_X + 1) 00472 #define KEY_STREAM_P_ACCEL_Z (KEY_STREAM_P_FOOTER + 1) 00473 00474 #define NUM_KEYS (KEY_STREAM_P_ACCEL_Z + 1) 00475 00476 typedef struct { 00477 unsigned short key; 00478 unsigned short addr; 00479 } tKeyLabel; 00480 00481 #define DINA0A 0x0a 00482 #define DINA22 0x22 00483 #define DINA42 0x42 00484 #define DINA5A 0x5a 00485 00486 #define DINA06 0x06 00487 #define DINA0E 0x0e 00488 #define DINA16 0x16 00489 #define DINA1E 0x1e 00490 #define DINA26 0x26 00491 #define DINA2E 0x2e 00492 #define DINA36 0x36 00493 #define DINA3E 0x3e 00494 #define DINA46 0x46 00495 #define DINA4E 0x4e 00496 #define DINA56 0x56 00497 #define DINA5E 0x5e 00498 #define DINA66 0x66 00499 #define DINA6E 0x6e 00500 #define DINA76 0x76 00501 #define DINA7E 0x7e 00502 00503 #define DINA00 0x00 00504 #define DINA08 0x08 00505 #define DINA10 0x10 00506 #define DINA18 0x18 00507 #define DINA20 0x20 00508 #define DINA28 0x28 00509 #define DINA30 0x30 00510 #define DINA38 0x38 00511 #define DINA40 0x40 00512 #define DINA48 0x48 00513 #define DINA50 0x50 00514 #define DINA58 0x58 00515 #define DINA60 0x60 00516 #define DINA68 0x68 00517 #define DINA70 0x70 00518 #define DINA78 0x78 00519 00520 #define DINA04 0x04 00521 #define DINA0C 0x0c 00522 #define DINA14 0x14 00523 #define DINA1C 0x1C 00524 #define DINA24 0x24 00525 #define DINA2C 0x2c 00526 #define DINA34 0x34 00527 #define DINA3C 0x3c 00528 #define DINA44 0x44 00529 #define DINA4C 0x4c 00530 #define DINA54 0x54 00531 #define DINA5C 0x5c 00532 #define DINA64 0x64 00533 #define DINA6C 0x6c 00534 #define DINA74 0x74 00535 #define DINA7C 0x7c 00536 00537 #define DINA01 0x01 00538 #define DINA09 0x09 00539 #define DINA11 0x11 00540 #define DINA19 0x19 00541 #define DINA21 0x21 00542 #define DINA29 0x29 00543 #define DINA31 0x31 00544 #define DINA39 0x39 00545 #define DINA41 0x41 00546 #define DINA49 0x49 00547 #define DINA51 0x51 00548 #define DINA59 0x59 00549 #define DINA61 0x61 00550 #define DINA69 0x69 00551 #define DINA71 0x71 00552 #define DINA79 0x79 00553 00554 #define DINA25 0x25 00555 #define DINA2D 0x2d 00556 #define DINA35 0x35 00557 #define DINA3D 0x3d 00558 #define DINA4D 0x4d 00559 #define DINA55 0x55 00560 #define DINA5D 0x5D 00561 #define DINA6D 0x6d 00562 #define DINA75 0x75 00563 #define DINA7D 0x7d 00564 00565 #define DINADC 0xdc 00566 #define DINAF2 0xf2 00567 #define DINAAB 0xab 00568 #define DINAAA 0xaa 00569 #define DINAF1 0xf1 00570 #define DINADF 0xdf 00571 #define DINADA 0xda 00572 #define DINAB1 0xb1 00573 #define DINAB9 0xb9 00574 #define DINAF3 0xf3 00575 #define DINA8B 0x8b 00576 #define DINAA3 0xa3 00577 #define DINA91 0x91 00578 #define DINAB6 0xb6 00579 #define DINAB4 0xb4 00580 00581 00582 #define DINC00 0x00 00583 #define DINC01 0x01 00584 #define DINC02 0x02 00585 #define DINC03 0x03 00586 #define DINC08 0x08 00587 #define DINC09 0x09 00588 #define DINC0A 0x0a 00589 #define DINC0B 0x0b 00590 #define DINC10 0x10 00591 #define DINC11 0x11 00592 #define DINC12 0x12 00593 #define DINC13 0x13 00594 #define DINC18 0x18 00595 #define DINC19 0x19 00596 #define DINC1A 0x1a 00597 #define DINC1B 0x1b 00598 00599 #define DINC20 0x20 00600 #define DINC21 0x21 00601 #define DINC22 0x22 00602 #define DINC23 0x23 00603 #define DINC28 0x28 00604 #define DINC29 0x29 00605 #define DINC2A 0x2a 00606 #define DINC2B 0x2b 00607 #define DINC30 0x30 00608 #define DINC31 0x31 00609 #define DINC32 0x32 00610 #define DINC33 0x33 00611 #define DINC38 0x38 00612 #define DINC39 0x39 00613 #define DINC3A 0x3a 00614 #define DINC3B 0x3b 00615 00616 #define DINC40 0x40 00617 #define DINC41 0x41 00618 #define DINC42 0x42 00619 #define DINC43 0x43 00620 #define DINC48 0x48 00621 #define DINC49 0x49 00622 #define DINC4A 0x4a 00623 #define DINC4B 0x4b 00624 #define DINC50 0x50 00625 #define DINC51 0x51 00626 #define DINC52 0x52 00627 #define DINC53 0x53 00628 #define DINC58 0x58 00629 #define DINC59 0x59 00630 #define DINC5A 0x5a 00631 #define DINC5B 0x5b 00632 00633 #define DINC60 0x60 00634 #define DINC61 0x61 00635 #define DINC62 0x62 00636 #define DINC63 0x63 00637 #define DINC68 0x68 00638 #define DINC69 0x69 00639 #define DINC6A 0x6a 00640 #define DINC6B 0x6b 00641 #define DINC70 0x70 00642 #define DINC71 0x71 00643 #define DINC72 0x72 00644 #define DINC73 0x73 00645 #define DINC78 0x78 00646 #define DINC79 0x79 00647 #define DINC7A 0x7a 00648 #define DINC7B 0x7b 00649 00650 #define DIND40 0x40 00651 00652 00653 #define DINA80 0x80 00654 #define DINA90 0x90 00655 #define DINAA0 0xa0 00656 #define DINAC9 0xc9 00657 #define DINACB 0xcb 00658 #define DINACD 0xcd 00659 #define DINACF 0xcf 00660 #define DINAC8 0xc8 00661 #define DINACA 0xca 00662 #define DINACC 0xcc 00663 #define DINACE 0xce 00664 #define DINAD8 0xd8 00665 #define DINADD 0xdd 00666 #define DINAF8 0xf0 00667 #define DINAFE 0xfe 00668 00669 #define DINBF8 0xf8 00670 #define DINAC0 0xb0 00671 #define DINAC1 0xb1 00672 #define DINAC2 0xb4 00673 #define DINAC3 0xb5 00674 #define DINAC4 0xb8 00675 #define DINAC5 0xb9 00676 #define DINBC0 0xc0 00677 #define DINBC2 0xc2 00678 #define DINBC4 0xc4 00679 #define DINBC6 0xc6 00680 00681 #ifdef __cplusplus 00682 extern "C" 00683 { 00684 #endif 00685 00686 #define DMP_PTAT 0 00687 #define DMP_XGYR 2 00688 #define DMP_YGYR 4 00689 #define DMP_ZGYR 6 00690 #define DMP_XACC 8 00691 #define DMP_YACC 10 00692 #define DMP_ZACC 12 00693 #define DMP_ADC1 14 00694 #define DMP_ADC2 16 00695 #define DMP_ADC3 18 00696 #define DMP_BIASUNC 20 00697 #define DMP_FIFORT 22 00698 #define DMP_INVGSFH 24 00699 #define DMP_INVGSFL 26 00700 #define DMP_1H 28 00701 #define DMP_1L 30 00702 #define DMP_BLPFSTCH 32 00703 #define DMP_BLPFSTCL 34 00704 #define DMP_BLPFSXH 36 00705 #define DMP_BLPFSXL 38 00706 #define DMP_BLPFSYH 40 00707 #define DMP_BLPFSYL 42 00708 #define DMP_BLPFSZH 44 00709 #define DMP_BLPFSZL 46 00710 #define DMP_BLPFMTC 48 00711 #define DMP_SMC 50 00712 #define DMP_BLPFMXH 52 00713 #define DMP_BLPFMXL 54 00714 #define DMP_BLPFMYH 56 00715 #define DMP_BLPFMYL 58 00716 #define DMP_BLPFMZH 60 00717 #define DMP_BLPFMZL 62 00718 #define DMP_BLPFC 64 00719 #define DMP_SMCTH 66 00720 #define DMP_0H2 68 00721 #define DMP_0L2 70 00722 #define DMP_BERR2H 72 00723 #define DMP_BERR2L 74 00724 #define DMP_BERR2NH 76 00725 #define DMP_SMCINC 78 00726 #define DMP_ANGVBXH 80 00727 #define DMP_ANGVBXL 82 00728 #define DMP_ANGVBYH 84 00729 #define DMP_ANGVBYL 86 00730 #define DMP_ANGVBZH 88 00731 #define DMP_ANGVBZL 90 00732 #define DMP_BERR1H 92 00733 #define DMP_BERR1L 94 00734 #define DMP_ATCH 96 00735 #define DMP_BIASUNCSF 98 00736 #define DMP_ACT2H 100 00737 #define DMP_ACT2L 102 00738 #define DMP_GSFH 104 00739 #define DMP_GSFL 106 00740 #define DMP_GH 108 00741 #define DMP_GL 110 00742 #define DMP_0_5H 112 00743 #define DMP_0_5L 114 00744 #define DMP_0_0H 116 00745 #define DMP_0_0L 118 00746 #define DMP_1_0H 120 00747 #define DMP_1_0L 122 00748 #define DMP_1_5H 124 00749 #define DMP_1_5L 126 00750 #define DMP_TMP1AH 128 00751 #define DMP_TMP1AL 130 00752 #define DMP_TMP2AH 132 00753 #define DMP_TMP2AL 134 00754 #define DMP_TMP3AH 136 00755 #define DMP_TMP3AL 138 00756 #define DMP_TMP4AH 140 00757 #define DMP_TMP4AL 142 00758 #define DMP_XACCW 144 00759 #define DMP_TMP5 146 00760 #define DMP_XACCB 148 00761 #define DMP_TMP8 150 00762 #define DMP_YACCB 152 00763 #define DMP_TMP9 154 00764 #define DMP_ZACCB 156 00765 #define DMP_TMP10 158 00766 #define DMP_DZH 160 00767 #define DMP_DZL 162 00768 #define DMP_XGCH 164 00769 #define DMP_XGCL 166 00770 #define DMP_YGCH 168 00771 #define DMP_YGCL 170 00772 #define DMP_ZGCH 172 00773 #define DMP_ZGCL 174 00774 #define DMP_YACCW 176 00775 #define DMP_TMP7 178 00776 #define DMP_AFB1H 180 00777 #define DMP_AFB1L 182 00778 #define DMP_AFB2H 184 00779 #define DMP_AFB2L 186 00780 #define DMP_MAGFBH 188 00781 #define DMP_MAGFBL 190 00782 #define DMP_QT1H 192 00783 #define DMP_QT1L 194 00784 #define DMP_QT2H 196 00785 #define DMP_QT2L 198 00786 #define DMP_QT3H 200 00787 #define DMP_QT3L 202 00788 #define DMP_QT4H 204 00789 #define DMP_QT4L 206 00790 #define DMP_CTRL1H 208 00791 #define DMP_CTRL1L 210 00792 #define DMP_CTRL2H 212 00793 #define DMP_CTRL2L 214 00794 #define DMP_CTRL3H 216 00795 #define DMP_CTRL3L 218 00796 #define DMP_CTRL4H 220 00797 #define DMP_CTRL4L 222 00798 #define DMP_CTRLS1 224 00799 #define DMP_CTRLSF1 226 00800 #define DMP_CTRLS2 228 00801 #define DMP_CTRLSF2 230 00802 #define DMP_CTRLS3 232 00803 #define DMP_CTRLSFNLL 234 00804 #define DMP_CTRLS4 236 00805 #define DMP_CTRLSFNL2 238 00806 #define DMP_CTRLSFNL 240 00807 #define DMP_TMP30 242 00808 #define DMP_CTRLSFJT 244 00809 #define DMP_TMP31 246 00810 #define DMP_TMP11 248 00811 #define DMP_CTRLSF2_2 250 00812 #define DMP_TMP12 252 00813 #define DMP_CTRLSF1_2 254 00814 #define DMP_PREVPTAT 256 00815 #define DMP_ACCZB 258 00816 #define DMP_ACCXB 264 00817 #define DMP_ACCYB 266 00818 #define DMP_1HB 272 00819 #define DMP_1LB 274 00820 #define DMP_0H 276 00821 #define DMP_0L 278 00822 #define DMP_ASR22H 280 00823 #define DMP_ASR22L 282 00824 #define DMP_ASR6H 284 00825 #define DMP_ASR6L 286 00826 #define DMP_TMP13 288 00827 #define DMP_TMP14 290 00828 #define DMP_FINTXH 292 00829 #define DMP_FINTXL 294 00830 #define DMP_FINTYH 296 00831 #define DMP_FINTYL 298 00832 #define DMP_FINTZH 300 00833 #define DMP_FINTZL 302 00834 #define DMP_TMP1BH 304 00835 #define DMP_TMP1BL 306 00836 #define DMP_TMP2BH 308 00837 #define DMP_TMP2BL 310 00838 #define DMP_TMP3BH 312 00839 #define DMP_TMP3BL 314 00840 #define DMP_TMP4BH 316 00841 #define DMP_TMP4BL 318 00842 #define DMP_STXG 320 00843 #define DMP_ZCTXG 322 00844 #define DMP_STYG 324 00845 #define DMP_ZCTYG 326 00846 #define DMP_STZG 328 00847 #define DMP_ZCTZG 330 00848 #define DMP_CTRLSFJT2 332 00849 #define DMP_CTRLSFJTCNT 334 00850 #define DMP_PVXG 336 00851 #define DMP_TMP15 338 00852 #define DMP_PVYG 340 00853 #define DMP_TMP16 342 00854 #define DMP_PVZG 344 00855 #define DMP_TMP17 346 00856 #define DMP_MNMFLAGH 352 00857 #define DMP_MNMFLAGL 354 00858 #define DMP_MNMTMH 356 00859 #define DMP_MNMTML 358 00860 #define DMP_MNMTMTHRH 360 00861 #define DMP_MNMTMTHRL 362 00862 #define DMP_MNMTHRH 364 00863 #define DMP_MNMTHRL 366 00864 #define DMP_ACCQD4H 368 00865 #define DMP_ACCQD4L 370 00866 #define DMP_ACCQD5H 372 00867 #define DMP_ACCQD5L 374 00868 #define DMP_ACCQD6H 376 00869 #define DMP_ACCQD6L 378 00870 #define DMP_ACCQD7H 380 00871 #define DMP_ACCQD7L 382 00872 #define DMP_ACCQD0H 384 00873 #define DMP_ACCQD0L 386 00874 #define DMP_ACCQD1H 388 00875 #define DMP_ACCQD1L 390 00876 #define DMP_ACCQD2H 392 00877 #define DMP_ACCQD2L 394 00878 #define DMP_ACCQD3H 396 00879 #define DMP_ACCQD3L 398 00880 #define DMP_XN2H 400 00881 #define DMP_XN2L 402 00882 #define DMP_XN1H 404 00883 #define DMP_XN1L 406 00884 #define DMP_YN2H 408 00885 #define DMP_YN2L 410 00886 #define DMP_YN1H 412 00887 #define DMP_YN1L 414 00888 #define DMP_YH 416 00889 #define DMP_YL 418 00890 #define DMP_B0H 420 00891 #define DMP_B0L 422 00892 #define DMP_A1H 424 00893 #define DMP_A1L 426 00894 #define DMP_A2H 428 00895 #define DMP_A2L 430 00896 #define DMP_SEM1 432 00897 #define DMP_FIFOCNT 434 00898 #define DMP_SH_TH_X 436 00899 #define DMP_PACKET 438 00900 #define DMP_SH_TH_Y 440 00901 #define DMP_FOOTER 442 00902 #define DMP_SH_TH_Z 444 00903 #define DMP_TEMP29 448 00904 #define DMP_TEMP30 450 00905 #define DMP_XACCB_PRE 452 00906 #define DMP_XACCB_PREL 454 00907 #define DMP_YACCB_PRE 456 00908 #define DMP_YACCB_PREL 458 00909 #define DMP_ZACCB_PRE 460 00910 #define DMP_ZACCB_PREL 462 00911 #define DMP_TMP22 464 00912 #define DMP_TAP_TIMER 466 00913 #define DMP_TAP_THX 468 00914 #define DMP_TAP_THY 472 00915 #define DMP_TAP_THZ 476 00916 #define DMP_TAPW_MIN 478 00917 #define DMP_TMP25 480 00918 #define DMP_TMP26 482 00919 #define DMP_TMP27 484 00920 #define DMP_TMP28 486 00921 #define DMP_ORIENT 488 00922 #define DMP_THRSH 490 00923 #define DMP_ENDIANH 492 00924 #define DMP_ENDIANL 494 00925 #define DMP_BLPFNMTCH 496 00926 #define DMP_BLPFNMTCL 498 00927 #define DMP_BLPFNMXH 500 00928 #define DMP_BLPFNMXL 502 00929 #define DMP_BLPFNMYH 504 00930 #define DMP_BLPFNMYL 506 00931 #define DMP_BLPFNMZH 508 00932 #define DMP_BLPFNMZL 510 00933 #ifdef __cplusplus 00934 } 00935 #endif 00936 00937 //定义输出速度 00938 #define DEFAULT_MPU_HZ (100) //100Hz 00939 00940 #define INV_X_GYRO (0x40) 00941 #define INV_Y_GYRO (0x20) 00942 #define INV_Z_GYRO (0x10) 00943 #define INV_XYZ_GYRO (INV_X_GYRO | INV_Y_GYRO | INV_Z_GYRO) 00944 #define INV_XYZ_ACCEL (0x08) 00945 #define INV_XYZ_COMPASS (0x01) 00946 00947 //移植官方MSP430 DMP驱动过来 00948 struct int_param_s { 00949 //#if defined EMPL_TARGET_MSP430 || defined MOTION_DRIVER_TARGET_MSP430 00950 void (*cb)(void); 00951 unsigned short pin; 00952 unsigned char lp_exit; 00953 unsigned char active_low; 00954 //#elif defined EMPL_TARGET_UC3L0 00955 // unsigned long pin; 00956 // void (*cb)(volatile void*); 00957 // void *arg; 00958 //#endif 00959 }; 00960 00961 #define MPU_INT_STATUS_DATA_READY (0x0001) 00962 #define MPU_INT_STATUS_DMP (0x0002) 00963 #define MPU_INT_STATUS_PLL_READY (0x0004) 00964 #define MPU_INT_STATUS_I2C_MST (0x0008) 00965 #define MPU_INT_STATUS_FIFO_OVERFLOW (0x0010) 00966 #define MPU_INT_STATUS_ZMOT (0x0020) 00967 #define MPU_INT_STATUS_MOT (0x0040) 00968 #define MPU_INT_STATUS_FREE_FALL (0x0080) 00969 #define MPU_INT_STATUS_DMP_0 (0x0100) 00970 #define MPU_INT_STATUS_DMP_1 (0x0200) 00971 #define MPU_INT_STATUS_DMP_2 (0x0400) 00972 #define MPU_INT_STATUS_DMP_3 (0x0800) 00973 #define MPU_INT_STATUS_DMP_4 (0x1000) 00974 #define MPU_INT_STATUS_DMP_5 (0x2000) 00975 00976 /* Set up APIs */ 00977 int mpu_init(void); 00978 int mpu_init_slave(void); 00979 int mpu_set_bypass(unsigned char bypass_on); 00980 00981 /* Configuration APIs */ 00982 int mpu_lp_accel_mode(unsigned char rate); 00983 int mpu_lp_motion_interrupt(unsigned short thresh, unsigned char time, 00984 unsigned char lpa_freq); 00985 int mpu_set_int_level(unsigned char active_low); 00986 int mpu_set_int_latched(unsigned char enable); 00987 00988 int mpu_set_dmp_state(unsigned char enable); 00989 int mpu_get_dmp_state(unsigned char *enabled); 00990 00991 int mpu_get_lpf(unsigned short *lpf); 00992 int mpu_set_lpf(unsigned short lpf); 00993 00994 int mpu_get_gyro_fsr(unsigned short *fsr); 00995 int mpu_set_gyro_fsr(unsigned short fsr); 00996 00997 int mpu_get_accel_fsr(unsigned char *fsr); 00998 int mpu_set_accel_fsr(unsigned char fsr); 00999 01000 int mpu_get_compass_fsr(unsigned short *fsr); 01001 01002 int mpu_get_gyro_sens(float *sens); 01003 int mpu_get_accel_sens(unsigned short *sens); 01004 01005 int mpu_get_sample_rate(unsigned short *rate); 01006 int mpu_set_sample_rate(unsigned short rate); 01007 int mpu_get_compass_sample_rate(unsigned short *rate); 01008 int mpu_set_compass_sample_rate(unsigned short rate); 01009 01010 int mpu_get_fifo_config(unsigned char *sensors); 01011 int mpu_configure_fifo(unsigned char sensors); 01012 01013 int mpu_get_power_state(unsigned char *power_on); 01014 int mpu_set_sensors(unsigned char sensors); 01015 01016 int mpu_set_accel_bias(const long *accel_bias); 01017 01018 /* Data getter/setter APIs */ 01019 int mpu_get_gyro_reg(short *data, unsigned long *timestamp); 01020 int mpu_get_accel_reg(short *data, unsigned long *timestamp); 01021 int mpu_get_compass_reg(short *data, unsigned long *timestamp); 01022 int mpu_get_temperature(long *data, unsigned long *timestamp); 01023 01024 int mpu_get_int_status(short *status); 01025 int mpu_read_fifo(short *gyro, short *accel, unsigned long *timestamp, 01026 unsigned char *sensors, unsigned char *more); 01027 int mpu_read_fifo_stream(unsigned short length, unsigned char *data, 01028 unsigned char *more); 01029 int mpu_reset_fifo(void); 01030 01031 int mpu_write_mem(unsigned short mem_addr, unsigned short length, 01032 unsigned char *data); 01033 int mpu_read_mem(unsigned short mem_addr, unsigned short length, 01034 unsigned char *data); 01035 int mpu_load_firmware(unsigned short length, const unsigned char *firmware, 01036 unsigned short start_addr, unsigned short sample_rate); 01037 01038 int mpu_reg_dump(void); 01039 int mpu_read_reg(unsigned char reg, unsigned char *data); 01040 int mpu_run_self_test(long *gyro, long *accel); 01041 int mpu_register_tap_cb(void (*func)(unsigned char, unsigned char)); 01042 //自行添加的一些函数 01043 void mget_ms(unsigned long *time); 01044 unsigned short inv_row_2_scale(const signed char *row); 01045 unsigned short inv_orientation_matrix_to_scalar(const signed char *mtx); 01046 unsigned char run_self_test(void); 01047 unsigned char mpu_dmp_init(void); 01048 unsigned char mpu_dmp_get_data(float *pitch,float *roll,float *yaw); 01049 01050 #define TAP_X (0x01) 01051 #define TAP_Y (0x02) 01052 #define TAP_Z (0x04) 01053 #define TAP_XYZ (0x07) 01054 01055 #define TAP_X_UP (0x01) 01056 #define TAP_X_DOWN (0x02) 01057 #define TAP_Y_UP (0x03) 01058 #define TAP_Y_DOWN (0x04) 01059 #define TAP_Z_UP (0x05) 01060 #define TAP_Z_DOWN (0x06) 01061 01062 #define ANDROID_ORIENT_PORTRAIT (0x00) 01063 #define ANDROID_ORIENT_LANDSCAPE (0x01) 01064 #define ANDROID_ORIENT_REVERSE_PORTRAIT (0x02) 01065 #define ANDROID_ORIENT_REVERSE_LANDSCAPE (0x03) 01066 01067 #define DMP_INT_GESTURE (0x01) 01068 #define DMP_INT_CONTINUOUS (0x02) 01069 01070 #define DMP_FEATURE_TAP (0x001) 01071 #define DMP_FEATURE_ANDROID_ORIENT (0x002) 01072 #define DMP_FEATURE_LP_QUAT (0x004) 01073 #define DMP_FEATURE_PEDOMETER (0x008) 01074 #define DMP_FEATURE_6X_LP_QUAT (0x010) 01075 #define DMP_FEATURE_GYRO_CAL (0x020) 01076 #define DMP_FEATURE_SEND_RAW_ACCEL (0x040) 01077 #define DMP_FEATURE_SEND_RAW_GYRO (0x080) 01078 #define DMP_FEATURE_SEND_CAL_GYRO (0x100) 01079 01080 #define INV_WXYZ_QUAT (0x100) 01081 01082 /* Set up functions. */ 01083 int dmp_load_motion_driver_firmware(void); 01084 int dmp_set_fifo_rate(unsigned short rate); 01085 int dmp_get_fifo_rate(unsigned short *rate); 01086 int dmp_enable_feature(unsigned short mask); 01087 int dmp_get_enabled_features(unsigned short *mask); 01088 int dmp_set_interrupt_mode(unsigned char mode); 01089 int dmp_set_orientation(unsigned short orient); 01090 int dmp_set_gyro_bias(long *bias); 01091 int dmp_set_accel_bias(long *bias); 01092 01093 /* Tap functions. */ 01094 int dmp_register_tap_cb(void (*func)(unsigned char, unsigned char)); 01095 int dmp_set_tap_thresh(unsigned char axis, unsigned short thresh); 01096 int dmp_set_tap_axes(unsigned char axis); 01097 int dmp_set_tap_count(unsigned char min_taps); 01098 int dmp_set_tap_time(unsigned short time); 01099 int dmp_set_tap_time_multi(unsigned short time); 01100 int dmp_set_shake_reject_thresh(long sf, unsigned short thresh); 01101 int dmp_set_shake_reject_time(unsigned short time); 01102 int dmp_set_shake_reject_timeout(unsigned short time); 01103 01104 /* Android orientation functions. */ 01105 int dmp_register_android_orient_cb(void (*func)(unsigned char)); 01106 01107 /* LP quaternion functions. */ 01108 int dmp_enable_lp_quat(unsigned char enable); 01109 int dmp_enable_6x_lp_quat(unsigned char enable); 01110 01111 /* Pedometer functions. */ 01112 int dmp_get_pedometer_step_count(unsigned long *count); 01113 int dmp_set_pedometer_step_count(unsigned long count); 01114 int dmp_get_pedometer_walk_time(unsigned long *time); 01115 int dmp_set_pedometer_walk_time(unsigned long time); 01116 01117 /* DMP gyro calibration functions. */ 01118 int dmp_enable_gyro_cal(unsigned char enable); 01119 01120 /* Read function. This function should be called whenever the MPU interrupt is 01121 * detected. 01122 */ 01123 int dmp_read_fifo(short *gyro, short *accel, long *quat, 01124 unsigned long *timestamp, short *sensors, unsigned char *more); 01125 01126 #endif 01127 01128 01129 01130 01131 01132 01133 01134 01135 01136 01137 01138 01139 01140 01141 01142 01143 01144 01145 01146 01147 01148 01149 01150 01151 01152 01153 01154 01155 01156 01157 01158 01159 01160 01161 01162
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