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Dependencies:   NTPClient_NetServices mbed

NetServices/drv/usb/UsbInc.h@0:05ccbd4f84f1, 2013-12-02 (annotated)

Committer:
hendrikvincent
Date:
Mon Dec 02 09:01:23 2013 +0000
Revision:
0:05ccbd4f84f1
eerste programma;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
hendrikvincent 0:05ccbd4f84f1 1
hendrikvincent 0:05ccbd4f84f1 2 /*
hendrikvincent 0:05ccbd4f84f1 3 Copyright (c) 2010 Donatien Garnier (donatiengar [at] gmail [dot] com)
hendrikvincent 0:05ccbd4f84f1 4
hendrikvincent 0:05ccbd4f84f1 5 Permission is hereby granted, free of charge, to any person obtaining a copy
hendrikvincent 0:05ccbd4f84f1 6 of this software and associated documentation files (the "Software"), to deal
hendrikvincent 0:05ccbd4f84f1 7 in the Software without restriction, including without limitation the rights
hendrikvincent 0:05ccbd4f84f1 8 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
hendrikvincent 0:05ccbd4f84f1 9 copies of the Software, and to permit persons to whom the Software is
hendrikvincent 0:05ccbd4f84f1 10 furnished to do so, subject to the following conditions:
hendrikvincent 0:05ccbd4f84f1 11
hendrikvincent 0:05ccbd4f84f1 12 The above copyright notice and this permission notice shall be included in
hendrikvincent 0:05ccbd4f84f1 13 all copies or substantial portions of the Software.
hendrikvincent 0:05ccbd4f84f1 14
hendrikvincent 0:05ccbd4f84f1 15 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
hendrikvincent 0:05ccbd4f84f1 16 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
hendrikvincent 0:05ccbd4f84f1 17 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
hendrikvincent 0:05ccbd4f84f1 18 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
hendrikvincent 0:05ccbd4f84f1 19 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
hendrikvincent 0:05ccbd4f84f1 20 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
hendrikvincent 0:05ccbd4f84f1 21 THE SOFTWARE.
hendrikvincent 0:05ccbd4f84f1 22 */
hendrikvincent 0:05ccbd4f84f1 23
hendrikvincent 0:05ccbd4f84f1 24 #ifndef USB_INC_H
hendrikvincent 0:05ccbd4f84f1 25 #define USB_INC_H
hendrikvincent 0:05ccbd4f84f1 26
hendrikvincent 0:05ccbd4f84f1 27 #include "mbed.h"
hendrikvincent 0:05ccbd4f84f1 28
hendrikvincent 0:05ccbd4f84f1 29 #define MIN(a,b) ((a)<(b)?(a):(b))
hendrikvincent 0:05ccbd4f84f1 30 #define MAX(a,b) ((a)>(b)?(a):(b))
hendrikvincent 0:05ccbd4f84f1 31
hendrikvincent 0:05ccbd4f84f1 32 //typedef int32_t RC;
hendrikvincent 0:05ccbd4f84f1 33
hendrikvincent 0:05ccbd4f84f1 34 typedef uint8_t byte;
hendrikvincent 0:05ccbd4f84f1 35 typedef uint16_t word;
hendrikvincent 0:05ccbd4f84f1 36
hendrikvincent 0:05ccbd4f84f1 37 enum UsbErr
hendrikvincent 0:05ccbd4f84f1 38 {
hendrikvincent 0:05ccbd4f84f1 39 __USBERR_MIN = -0xFFFF,
hendrikvincent 0:05ccbd4f84f1 40 USBERR_DISCONNECTED,
hendrikvincent 0:05ccbd4f84f1 41 USBERR_NOTFOUND,
hendrikvincent 0:05ccbd4f84f1 42 USBERR_BADCONFIG,
hendrikvincent 0:05ccbd4f84f1 43 USBERR_PROCESSING,
hendrikvincent 0:05ccbd4f84f1 44 USBERR_HALTED, //Transfer on an ep is stalled
hendrikvincent 0:05ccbd4f84f1 45 USBERR_BUSY,
hendrikvincent 0:05ccbd4f84f1 46 USBERR_TDFAIL,
hendrikvincent 0:05ccbd4f84f1 47 USBERR_ERROR,
hendrikvincent 0:05ccbd4f84f1 48 USBERR_OK = 0
hendrikvincent 0:05ccbd4f84f1 49 };
hendrikvincent 0:05ccbd4f84f1 50
hendrikvincent 0:05ccbd4f84f1 51
hendrikvincent 0:05ccbd4f84f1 52 /* From NXP's USBHostLite stack's usbhost_lpc17xx.h */
hendrikvincent 0:05ccbd4f84f1 53 /* Only the types names have been changed to avoid unecessary typedefs */
hendrikvincent 0:05ccbd4f84f1 54
hendrikvincent 0:05ccbd4f84f1 55
hendrikvincent 0:05ccbd4f84f1 56 /*
hendrikvincent 0:05ccbd4f84f1 57 **************************************************************************************************************
hendrikvincent 0:05ccbd4f84f1 58 * NXP USB Host Stack
hendrikvincent 0:05ccbd4f84f1 59 *
hendrikvincent 0:05ccbd4f84f1 60 * (c) Copyright 2008, NXP SemiConductors
hendrikvincent 0:05ccbd4f84f1 61 * (c) Copyright 2008, OnChip Technologies LLC
hendrikvincent 0:05ccbd4f84f1 62 * All Rights Reserved
hendrikvincent 0:05ccbd4f84f1 63 *
hendrikvincent 0:05ccbd4f84f1 64 * www.nxp.com
hendrikvincent 0:05ccbd4f84f1 65 * www.onchiptech.com
hendrikvincent 0:05ccbd4f84f1 66 *
hendrikvincent 0:05ccbd4f84f1 67 * File : usbhost_lpc17xx.h
hendrikvincent 0:05ccbd4f84f1 68 * Programmer(s) : Ravikanth.P
hendrikvincent 0:05ccbd4f84f1 69 * Version :
hendrikvincent 0:05ccbd4f84f1 70 *
hendrikvincent 0:05ccbd4f84f1 71 **************************************************************************************************************
hendrikvincent 0:05ccbd4f84f1 72 */
hendrikvincent 0:05ccbd4f84f1 73
hendrikvincent 0:05ccbd4f84f1 74
hendrikvincent 0:05ccbd4f84f1 75
hendrikvincent 0:05ccbd4f84f1 76 /*
hendrikvincent 0:05ccbd4f84f1 77 **************************************************************************************************************
hendrikvincent 0:05ccbd4f84f1 78 * OHCI OPERATIONAL REGISTER FIELD DEFINITIONS
hendrikvincent 0:05ccbd4f84f1 79 **************************************************************************************************************
hendrikvincent 0:05ccbd4f84f1 80 */
hendrikvincent 0:05ccbd4f84f1 81
hendrikvincent 0:05ccbd4f84f1 82 /* ------------------ HcControl Register --------------------- */
hendrikvincent 0:05ccbd4f84f1 83 #define OR_CONTROL_CLE 0x00000010
hendrikvincent 0:05ccbd4f84f1 84 #define OR_CONTROL_BLE 0x00000020
hendrikvincent 0:05ccbd4f84f1 85 #define OR_CONTROL_HCFS 0x000000C0
hendrikvincent 0:05ccbd4f84f1 86 #define OR_CONTROL_HC_OPER 0x00000080
hendrikvincent 0:05ccbd4f84f1 87 /* ----------------- HcCommandStatus Register ----------------- */
hendrikvincent 0:05ccbd4f84f1 88 #define OR_CMD_STATUS_HCR 0x00000001
hendrikvincent 0:05ccbd4f84f1 89 #define OR_CMD_STATUS_CLF 0x00000002
hendrikvincent 0:05ccbd4f84f1 90 #define OR_CMD_STATUS_BLF 0x00000004
hendrikvincent 0:05ccbd4f84f1 91 /* --------------- HcInterruptStatus Register ----------------- */
hendrikvincent 0:05ccbd4f84f1 92 #define OR_INTR_STATUS_WDH 0x00000002
hendrikvincent 0:05ccbd4f84f1 93 #define OR_INTR_STATUS_RHSC 0x00000040
hendrikvincent 0:05ccbd4f84f1 94 #define OR_INTR_STATUS_UE 0x00000010
hendrikvincent 0:05ccbd4f84f1 95 /* --------------- HcInterruptEnable Register ----------------- */
hendrikvincent 0:05ccbd4f84f1 96 #define OR_INTR_ENABLE_WDH 0x00000002
hendrikvincent 0:05ccbd4f84f1 97 #define OR_INTR_ENABLE_RHSC 0x00000040
hendrikvincent 0:05ccbd4f84f1 98 #define OR_INTR_ENABLE_MIE 0x80000000
hendrikvincent 0:05ccbd4f84f1 99 /* ---------------- HcRhDescriptorA Register ------------------ */
hendrikvincent 0:05ccbd4f84f1 100 #define OR_RH_STATUS_LPSC 0x00010000
hendrikvincent 0:05ccbd4f84f1 101 #define OR_RH_STATUS_DRWE 0x00008000
hendrikvincent 0:05ccbd4f84f1 102 /* -------------- HcRhPortStatus[1:NDP] Register -------------- */
hendrikvincent 0:05ccbd4f84f1 103 #define OR_RH_PORT_CCS 0x00000001
hendrikvincent 0:05ccbd4f84f1 104 #define OR_RH_PORT_PRS 0x00000010
hendrikvincent 0:05ccbd4f84f1 105 #define OR_RH_PORT_CSC 0x00010000
hendrikvincent 0:05ccbd4f84f1 106 #define OR_RH_PORT_PRSC 0x00100000
hendrikvincent 0:05ccbd4f84f1 107
hendrikvincent 0:05ccbd4f84f1 108
hendrikvincent 0:05ccbd4f84f1 109 /*
hendrikvincent 0:05ccbd4f84f1 110 **************************************************************************************************************
hendrikvincent 0:05ccbd4f84f1 111 * FRAME INTERVAL
hendrikvincent 0:05ccbd4f84f1 112 **************************************************************************************************************
hendrikvincent 0:05ccbd4f84f1 113 */
hendrikvincent 0:05ccbd4f84f1 114
hendrikvincent 0:05ccbd4f84f1 115 #define FI 0x2EDF /* 12000 bits per frame (-1) */
hendrikvincent 0:05ccbd4f84f1 116 #define DEFAULT_FMINTERVAL ((((6 * (FI - 210)) / 7) << 16) | FI)
hendrikvincent 0:05ccbd4f84f1 117
hendrikvincent 0:05ccbd4f84f1 118 /*
hendrikvincent 0:05ccbd4f84f1 119 **************************************************************************************************************
hendrikvincent 0:05ccbd4f84f1 120 * ENDPOINT DESCRIPTOR CONTROL FIELDS
hendrikvincent 0:05ccbd4f84f1 121 **************************************************************************************************************
hendrikvincent 0:05ccbd4f84f1 122 */
hendrikvincent 0:05ccbd4f84f1 123
hendrikvincent 0:05ccbd4f84f1 124 #define ED_SKIP (uint32_t) (0x00001000) /* Skip this ep in queue */
hendrikvincent 0:05ccbd4f84f1 125
hendrikvincent 0:05ccbd4f84f1 126 /*
hendrikvincent 0:05ccbd4f84f1 127 **************************************************************************************************************
hendrikvincent 0:05ccbd4f84f1 128 * TRANSFER DESCRIPTOR CONTROL FIELDS
hendrikvincent 0:05ccbd4f84f1 129 **************************************************************************************************************
hendrikvincent 0:05ccbd4f84f1 130 */
hendrikvincent 0:05ccbd4f84f1 131
hendrikvincent 0:05ccbd4f84f1 132 #define TD_ROUNDING (uint32_t) (0x00040000) /* Buffer Rounding */
hendrikvincent 0:05ccbd4f84f1 133 #define TD_SETUP (uint32_t)(0) /* Direction of Setup Packet */
hendrikvincent 0:05ccbd4f84f1 134 #define TD_IN (uint32_t)(0x00100000) /* Direction In */
hendrikvincent 0:05ccbd4f84f1 135 #define TD_OUT (uint32_t)(0x00080000) /* Direction Out */
hendrikvincent 0:05ccbd4f84f1 136 #define TD_DELAY_INT(x) (uint32_t)((x) << 21) /* Delay Interrupt */
hendrikvincent 0:05ccbd4f84f1 137 #define TD_TOGGLE_0 (uint32_t)(0x02000000) /* Toggle 0 */
hendrikvincent 0:05ccbd4f84f1 138 #define TD_TOGGLE_1 (uint32_t)(0x03000000) /* Toggle 1 */
hendrikvincent 0:05ccbd4f84f1 139 #define TD_CC (uint32_t)(0xF0000000) /* Completion Code */
hendrikvincent 0:05ccbd4f84f1 140
hendrikvincent 0:05ccbd4f84f1 141 /*
hendrikvincent 0:05ccbd4f84f1 142 **************************************************************************************************************
hendrikvincent 0:05ccbd4f84f1 143 * USB STANDARD REQUEST DEFINITIONS
hendrikvincent 0:05ccbd4f84f1 144 **************************************************************************************************************
hendrikvincent 0:05ccbd4f84f1 145 */
hendrikvincent 0:05ccbd4f84f1 146
hendrikvincent 0:05ccbd4f84f1 147 #define USB_DESCRIPTOR_TYPE_DEVICE 1
hendrikvincent 0:05ccbd4f84f1 148 #define USB_DESCRIPTOR_TYPE_CONFIGURATION 2
hendrikvincent 0:05ccbd4f84f1 149 #define USB_DESCRIPTOR_TYPE_INTERFACE 4
hendrikvincent 0:05ccbd4f84f1 150 #define USB_DESCRIPTOR_TYPE_ENDPOINT 5
hendrikvincent 0:05ccbd4f84f1 151 /* ----------- Control RequestType Fields ----------- */
hendrikvincent 0:05ccbd4f84f1 152 #define USB_DEVICE_TO_HOST 0x80
hendrikvincent 0:05ccbd4f84f1 153 #define USB_HOST_TO_DEVICE 0x00
hendrikvincent 0:05ccbd4f84f1 154 #define USB_REQUEST_TYPE_CLASS 0x20
hendrikvincent 0:05ccbd4f84f1 155 #define USB_RECIPIENT_DEVICE 0x00
hendrikvincent 0:05ccbd4f84f1 156 #define USB_RECIPIENT_INTERFACE 0x01
hendrikvincent 0:05ccbd4f84f1 157 /* -------------- USB Standard Requests -------------- */
hendrikvincent 0:05ccbd4f84f1 158 #define SET_ADDRESS 5
hendrikvincent 0:05ccbd4f84f1 159 #define GET_DESCRIPTOR 6
hendrikvincent 0:05ccbd4f84f1 160 #define SET_CONFIGURATION 9
hendrikvincent 0:05ccbd4f84f1 161 #define SET_INTERFACE 11
hendrikvincent 0:05ccbd4f84f1 162
hendrikvincent 0:05ccbd4f84f1 163 /*
hendrikvincent 0:05ccbd4f84f1 164 **************************************************************************************************************
hendrikvincent 0:05ccbd4f84f1 165 * TYPE DEFINITIONS
hendrikvincent 0:05ccbd4f84f1 166 **************************************************************************************************************
hendrikvincent 0:05ccbd4f84f1 167 */
hendrikvincent 0:05ccbd4f84f1 168
hendrikvincent 0:05ccbd4f84f1 169 typedef struct hcEd { /* ----------- HostController EndPoint Descriptor ------------- */
hendrikvincent 0:05ccbd4f84f1 170 volatile uint32_t Control; /* Endpoint descriptor control */
hendrikvincent 0:05ccbd4f84f1 171 volatile uint32_t TailTd; /* Physical address of tail in Transfer descriptor list */
hendrikvincent 0:05ccbd4f84f1 172 volatile uint32_t HeadTd; /* Physcial address of head in Transfer descriptor list */
hendrikvincent 0:05ccbd4f84f1 173 volatile uint32_t Next; /* Physical address of next Endpoint descriptor */
hendrikvincent 0:05ccbd4f84f1 174 } HCED;
hendrikvincent 0:05ccbd4f84f1 175
hendrikvincent 0:05ccbd4f84f1 176 typedef struct hcTd { /* ------------ HostController Transfer Descriptor ------------ */
hendrikvincent 0:05ccbd4f84f1 177 volatile uint32_t Control; /* Transfer descriptor control */
hendrikvincent 0:05ccbd4f84f1 178 volatile uint32_t CurrBufPtr; /* Physical address of current buffer pointer */
hendrikvincent 0:05ccbd4f84f1 179 volatile uint32_t Next; /* Physical pointer to next Transfer Descriptor */
hendrikvincent 0:05ccbd4f84f1 180 volatile uint32_t BufEnd; /* Physical address of end of buffer */
hendrikvincent 0:05ccbd4f84f1 181 } HCTD;
hendrikvincent 0:05ccbd4f84f1 182
hendrikvincent 0:05ccbd4f84f1 183 typedef struct hcca { /* ----------- Host Controller Communication Area ------------ */
hendrikvincent 0:05ccbd4f84f1 184 volatile uint32_t IntTable[32]; /* Interrupt Table */
hendrikvincent 0:05ccbd4f84f1 185 volatile uint32_t FrameNumber; /* Frame Number */
hendrikvincent 0:05ccbd4f84f1 186 volatile uint32_t DoneHead; /* Done Head */
hendrikvincent 0:05ccbd4f84f1 187 volatile uint8_t Reserved[116]; /* Reserved for future use */
hendrikvincent 0:05ccbd4f84f1 188 volatile uint8_t Unknown[4]; /* Unused */
hendrikvincent 0:05ccbd4f84f1 189 } HCCA;
hendrikvincent 0:05ccbd4f84f1 190
hendrikvincent 0:05ccbd4f84f1 191
hendrikvincent 0:05ccbd4f84f1 192
hendrikvincent 0:05ccbd4f84f1 193 #endif