Kiyoteru Hayama / mbedRobotracer_Edu

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mbed/LPC1768/core_cmFunc.h@0:da22b0b4395a, 2013-06-19 (annotated)

Committer:
hayama
Date:
Wed Jun 19 10:00:41 2013 +0000
Revision:
0:da22b0b4395a
mbed robotracer for education ver 1.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
hayama 0:da22b0b4395a 1 /**************************************************************************//**
hayama 0:da22b0b4395a 2 * @file core_cmFunc.h
hayama 0:da22b0b4395a 3 * @brief CMSIS Cortex-M Core Function Access Header File
hayama 0:da22b0b4395a 4 * @version V3.02
hayama 0:da22b0b4395a 5 * @date 24. May 2012
hayama 0:da22b0b4395a 6 *
hayama 0:da22b0b4395a 7 * @note
hayama 0:da22b0b4395a 8 * Copyright (C) 2009-2012 ARM Limited. All rights reserved.
hayama 0:da22b0b4395a 9 *
hayama 0:da22b0b4395a 10 * @par
hayama 0:da22b0b4395a 11 * ARM Limited (ARM) is supplying this software for use with Cortex-M
hayama 0:da22b0b4395a 12 * processor based microcontrollers. This file can be freely distributed
hayama 0:da22b0b4395a 13 * within development tools that are supporting such ARM based processors.
hayama 0:da22b0b4395a 14 *
hayama 0:da22b0b4395a 15 * @par
hayama 0:da22b0b4395a 16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
hayama 0:da22b0b4395a 17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
hayama 0:da22b0b4395a 18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
hayama 0:da22b0b4395a 19 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
hayama 0:da22b0b4395a 20 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
hayama 0:da22b0b4395a 21 *
hayama 0:da22b0b4395a 22 ******************************************************************************/
hayama 0:da22b0b4395a 23
hayama 0:da22b0b4395a 24 #ifndef __CORE_CMFUNC_H
hayama 0:da22b0b4395a 25 #define __CORE_CMFUNC_H
hayama 0:da22b0b4395a 26
hayama 0:da22b0b4395a 27
hayama 0:da22b0b4395a 28 /* ########################### Core Function Access ########################### */
hayama 0:da22b0b4395a 29 /** \ingroup CMSIS_Core_FunctionInterface
hayama 0:da22b0b4395a 30 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
hayama 0:da22b0b4395a 31 @{
hayama 0:da22b0b4395a 32 */
hayama 0:da22b0b4395a 33
hayama 0:da22b0b4395a 34 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
hayama 0:da22b0b4395a 35 /* ARM armcc specific functions */
hayama 0:da22b0b4395a 36
hayama 0:da22b0b4395a 37 #if (__ARMCC_VERSION < 400677)
hayama 0:da22b0b4395a 38 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
hayama 0:da22b0b4395a 39 #endif
hayama 0:da22b0b4395a 40
hayama 0:da22b0b4395a 41 /* intrinsic void __enable_irq(); */
hayama 0:da22b0b4395a 42 /* intrinsic void __disable_irq(); */
hayama 0:da22b0b4395a 43
hayama 0:da22b0b4395a 44 /** \brief Get Control Register
hayama 0:da22b0b4395a 45
hayama 0:da22b0b4395a 46 This function returns the content of the Control Register.
hayama 0:da22b0b4395a 47
hayama 0:da22b0b4395a 48 \return Control Register value
hayama 0:da22b0b4395a 49 */
hayama 0:da22b0b4395a 50 __STATIC_INLINE uint32_t __get_CONTROL(void)
hayama 0:da22b0b4395a 51 {
hayama 0:da22b0b4395a 52 register uint32_t __regControl __ASM("control");
hayama 0:da22b0b4395a 53 return(__regControl);
hayama 0:da22b0b4395a 54 }
hayama 0:da22b0b4395a 55
hayama 0:da22b0b4395a 56
hayama 0:da22b0b4395a 57 /** \brief Set Control Register
hayama 0:da22b0b4395a 58
hayama 0:da22b0b4395a 59 This function writes the given value to the Control Register.
hayama 0:da22b0b4395a 60
hayama 0:da22b0b4395a 61 \param [in] control Control Register value to set
hayama 0:da22b0b4395a 62 */
hayama 0:da22b0b4395a 63 __STATIC_INLINE void __set_CONTROL(uint32_t control)
hayama 0:da22b0b4395a 64 {
hayama 0:da22b0b4395a 65 register uint32_t __regControl __ASM("control");
hayama 0:da22b0b4395a 66 __regControl = control;
hayama 0:da22b0b4395a 67 }
hayama 0:da22b0b4395a 68
hayama 0:da22b0b4395a 69
hayama 0:da22b0b4395a 70 /** \brief Get IPSR Register
hayama 0:da22b0b4395a 71
hayama 0:da22b0b4395a 72 This function returns the content of the IPSR Register.
hayama 0:da22b0b4395a 73
hayama 0:da22b0b4395a 74 \return IPSR Register value
hayama 0:da22b0b4395a 75 */
hayama 0:da22b0b4395a 76 __STATIC_INLINE uint32_t __get_IPSR(void)
hayama 0:da22b0b4395a 77 {
hayama 0:da22b0b4395a 78 register uint32_t __regIPSR __ASM("ipsr");
hayama 0:da22b0b4395a 79 return(__regIPSR);
hayama 0:da22b0b4395a 80 }
hayama 0:da22b0b4395a 81
hayama 0:da22b0b4395a 82
hayama 0:da22b0b4395a 83 /** \brief Get APSR Register
hayama 0:da22b0b4395a 84
hayama 0:da22b0b4395a 85 This function returns the content of the APSR Register.
hayama 0:da22b0b4395a 86
hayama 0:da22b0b4395a 87 \return APSR Register value
hayama 0:da22b0b4395a 88 */
hayama 0:da22b0b4395a 89 __STATIC_INLINE uint32_t __get_APSR(void)
hayama 0:da22b0b4395a 90 {
hayama 0:da22b0b4395a 91 register uint32_t __regAPSR __ASM("apsr");
hayama 0:da22b0b4395a 92 return(__regAPSR);
hayama 0:da22b0b4395a 93 }
hayama 0:da22b0b4395a 94
hayama 0:da22b0b4395a 95
hayama 0:da22b0b4395a 96 /** \brief Get xPSR Register
hayama 0:da22b0b4395a 97
hayama 0:da22b0b4395a 98 This function returns the content of the xPSR Register.
hayama 0:da22b0b4395a 99
hayama 0:da22b0b4395a 100 \return xPSR Register value
hayama 0:da22b0b4395a 101 */
hayama 0:da22b0b4395a 102 __STATIC_INLINE uint32_t __get_xPSR(void)
hayama 0:da22b0b4395a 103 {
hayama 0:da22b0b4395a 104 register uint32_t __regXPSR __ASM("xpsr");
hayama 0:da22b0b4395a 105 return(__regXPSR);
hayama 0:da22b0b4395a 106 }
hayama 0:da22b0b4395a 107
hayama 0:da22b0b4395a 108
hayama 0:da22b0b4395a 109 /** \brief Get Process Stack Pointer
hayama 0:da22b0b4395a 110
hayama 0:da22b0b4395a 111 This function returns the current value of the Process Stack Pointer (PSP).
hayama 0:da22b0b4395a 112
hayama 0:da22b0b4395a 113 \return PSP Register value
hayama 0:da22b0b4395a 114 */
hayama 0:da22b0b4395a 115 __STATIC_INLINE uint32_t __get_PSP(void)
hayama 0:da22b0b4395a 116 {
hayama 0:da22b0b4395a 117 register uint32_t __regProcessStackPointer __ASM("psp");
hayama 0:da22b0b4395a 118 return(__regProcessStackPointer);
hayama 0:da22b0b4395a 119 }
hayama 0:da22b0b4395a 120
hayama 0:da22b0b4395a 121
hayama 0:da22b0b4395a 122 /** \brief Set Process Stack Pointer
hayama 0:da22b0b4395a 123
hayama 0:da22b0b4395a 124 This function assigns the given value to the Process Stack Pointer (PSP).
hayama 0:da22b0b4395a 125
hayama 0:da22b0b4395a 126 \param [in] topOfProcStack Process Stack Pointer value to set
hayama 0:da22b0b4395a 127 */
hayama 0:da22b0b4395a 128 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
hayama 0:da22b0b4395a 129 {
hayama 0:da22b0b4395a 130 register uint32_t __regProcessStackPointer __ASM("psp");
hayama 0:da22b0b4395a 131 __regProcessStackPointer = topOfProcStack;
hayama 0:da22b0b4395a 132 }
hayama 0:da22b0b4395a 133
hayama 0:da22b0b4395a 134
hayama 0:da22b0b4395a 135 /** \brief Get Main Stack Pointer
hayama 0:da22b0b4395a 136
hayama 0:da22b0b4395a 137 This function returns the current value of the Main Stack Pointer (MSP).
hayama 0:da22b0b4395a 138
hayama 0:da22b0b4395a 139 \return MSP Register value
hayama 0:da22b0b4395a 140 */
hayama 0:da22b0b4395a 141 __STATIC_INLINE uint32_t __get_MSP(void)
hayama 0:da22b0b4395a 142 {
hayama 0:da22b0b4395a 143 register uint32_t __regMainStackPointer __ASM("msp");
hayama 0:da22b0b4395a 144 return(__regMainStackPointer);
hayama 0:da22b0b4395a 145 }
hayama 0:da22b0b4395a 146
hayama 0:da22b0b4395a 147
hayama 0:da22b0b4395a 148 /** \brief Set Main Stack Pointer
hayama 0:da22b0b4395a 149
hayama 0:da22b0b4395a 150 This function assigns the given value to the Main Stack Pointer (MSP).
hayama 0:da22b0b4395a 151
hayama 0:da22b0b4395a 152 \param [in] topOfMainStack Main Stack Pointer value to set
hayama 0:da22b0b4395a 153 */
hayama 0:da22b0b4395a 154 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
hayama 0:da22b0b4395a 155 {
hayama 0:da22b0b4395a 156 register uint32_t __regMainStackPointer __ASM("msp");
hayama 0:da22b0b4395a 157 __regMainStackPointer = topOfMainStack;
hayama 0:da22b0b4395a 158 }
hayama 0:da22b0b4395a 159
hayama 0:da22b0b4395a 160
hayama 0:da22b0b4395a 161 /** \brief Get Priority Mask
hayama 0:da22b0b4395a 162
hayama 0:da22b0b4395a 163 This function returns the current state of the priority mask bit from the Priority Mask Register.
hayama 0:da22b0b4395a 164
hayama 0:da22b0b4395a 165 \return Priority Mask value
hayama 0:da22b0b4395a 166 */
hayama 0:da22b0b4395a 167 __STATIC_INLINE uint32_t __get_PRIMASK(void)
hayama 0:da22b0b4395a 168 {
hayama 0:da22b0b4395a 169 register uint32_t __regPriMask __ASM("primask");
hayama 0:da22b0b4395a 170 return(__regPriMask);
hayama 0:da22b0b4395a 171 }
hayama 0:da22b0b4395a 172
hayama 0:da22b0b4395a 173
hayama 0:da22b0b4395a 174 /** \brief Set Priority Mask
hayama 0:da22b0b4395a 175
hayama 0:da22b0b4395a 176 This function assigns the given value to the Priority Mask Register.
hayama 0:da22b0b4395a 177
hayama 0:da22b0b4395a 178 \param [in] priMask Priority Mask
hayama 0:da22b0b4395a 179 */
hayama 0:da22b0b4395a 180 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
hayama 0:da22b0b4395a 181 {
hayama 0:da22b0b4395a 182 register uint32_t __regPriMask __ASM("primask");
hayama 0:da22b0b4395a 183 __regPriMask = (priMask);
hayama 0:da22b0b4395a 184 }
hayama 0:da22b0b4395a 185
hayama 0:da22b0b4395a 186
hayama 0:da22b0b4395a 187 #if (__CORTEX_M >= 0x03)
hayama 0:da22b0b4395a 188
hayama 0:da22b0b4395a 189 /** \brief Enable FIQ
hayama 0:da22b0b4395a 190
hayama 0:da22b0b4395a 191 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
hayama 0:da22b0b4395a 192 Can only be executed in Privileged modes.
hayama 0:da22b0b4395a 193 */
hayama 0:da22b0b4395a 194 #define __enable_fault_irq __enable_fiq
hayama 0:da22b0b4395a 195
hayama 0:da22b0b4395a 196
hayama 0:da22b0b4395a 197 /** \brief Disable FIQ
hayama 0:da22b0b4395a 198
hayama 0:da22b0b4395a 199 This function disables FIQ interrupts by setting the F-bit in the CPSR.
hayama 0:da22b0b4395a 200 Can only be executed in Privileged modes.
hayama 0:da22b0b4395a 201 */
hayama 0:da22b0b4395a 202 #define __disable_fault_irq __disable_fiq
hayama 0:da22b0b4395a 203
hayama 0:da22b0b4395a 204
hayama 0:da22b0b4395a 205 /** \brief Get Base Priority
hayama 0:da22b0b4395a 206
hayama 0:da22b0b4395a 207 This function returns the current value of the Base Priority register.
hayama 0:da22b0b4395a 208
hayama 0:da22b0b4395a 209 \return Base Priority register value
hayama 0:da22b0b4395a 210 */
hayama 0:da22b0b4395a 211 __STATIC_INLINE uint32_t __get_BASEPRI(void)
hayama 0:da22b0b4395a 212 {
hayama 0:da22b0b4395a 213 register uint32_t __regBasePri __ASM("basepri");
hayama 0:da22b0b4395a 214 return(__regBasePri);
hayama 0:da22b0b4395a 215 }
hayama 0:da22b0b4395a 216
hayama 0:da22b0b4395a 217
hayama 0:da22b0b4395a 218 /** \brief Set Base Priority
hayama 0:da22b0b4395a 219
hayama 0:da22b0b4395a 220 This function assigns the given value to the Base Priority register.
hayama 0:da22b0b4395a 221
hayama 0:da22b0b4395a 222 \param [in] basePri Base Priority value to set
hayama 0:da22b0b4395a 223 */
hayama 0:da22b0b4395a 224 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
hayama 0:da22b0b4395a 225 {
hayama 0:da22b0b4395a 226 register uint32_t __regBasePri __ASM("basepri");
hayama 0:da22b0b4395a 227 __regBasePri = (basePri & 0xff);
hayama 0:da22b0b4395a 228 }
hayama 0:da22b0b4395a 229
hayama 0:da22b0b4395a 230
hayama 0:da22b0b4395a 231 /** \brief Get Fault Mask
hayama 0:da22b0b4395a 232
hayama 0:da22b0b4395a 233 This function returns the current value of the Fault Mask register.
hayama 0:da22b0b4395a 234
hayama 0:da22b0b4395a 235 \return Fault Mask register value
hayama 0:da22b0b4395a 236 */
hayama 0:da22b0b4395a 237 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
hayama 0:da22b0b4395a 238 {
hayama 0:da22b0b4395a 239 register uint32_t __regFaultMask __ASM("faultmask");
hayama 0:da22b0b4395a 240 return(__regFaultMask);
hayama 0:da22b0b4395a 241 }
hayama 0:da22b0b4395a 242
hayama 0:da22b0b4395a 243
hayama 0:da22b0b4395a 244 /** \brief Set Fault Mask
hayama 0:da22b0b4395a 245
hayama 0:da22b0b4395a 246 This function assigns the given value to the Fault Mask register.
hayama 0:da22b0b4395a 247
hayama 0:da22b0b4395a 248 \param [in] faultMask Fault Mask value to set
hayama 0:da22b0b4395a 249 */
hayama 0:da22b0b4395a 250 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
hayama 0:da22b0b4395a 251 {
hayama 0:da22b0b4395a 252 register uint32_t __regFaultMask __ASM("faultmask");
hayama 0:da22b0b4395a 253 __regFaultMask = (faultMask & (uint32_t)1);
hayama 0:da22b0b4395a 254 }
hayama 0:da22b0b4395a 255
hayama 0:da22b0b4395a 256 #endif /* (__CORTEX_M >= 0x03) */
hayama 0:da22b0b4395a 257
hayama 0:da22b0b4395a 258
hayama 0:da22b0b4395a 259 #if (__CORTEX_M == 0x04)
hayama 0:da22b0b4395a 260
hayama 0:da22b0b4395a 261 /** \brief Get FPSCR
hayama 0:da22b0b4395a 262
hayama 0:da22b0b4395a 263 This function returns the current value of the Floating Point Status/Control register.
hayama 0:da22b0b4395a 264
hayama 0:da22b0b4395a 265 \return Floating Point Status/Control register value
hayama 0:da22b0b4395a 266 */
hayama 0:da22b0b4395a 267 __STATIC_INLINE uint32_t __get_FPSCR(void)
hayama 0:da22b0b4395a 268 {
hayama 0:da22b0b4395a 269 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
hayama 0:da22b0b4395a 270 register uint32_t __regfpscr __ASM("fpscr");
hayama 0:da22b0b4395a 271 return(__regfpscr);
hayama 0:da22b0b4395a 272 #else
hayama 0:da22b0b4395a 273 return(0);
hayama 0:da22b0b4395a 274 #endif
hayama 0:da22b0b4395a 275 }
hayama 0:da22b0b4395a 276
hayama 0:da22b0b4395a 277
hayama 0:da22b0b4395a 278 /** \brief Set FPSCR
hayama 0:da22b0b4395a 279
hayama 0:da22b0b4395a 280 This function assigns the given value to the Floating Point Status/Control register.
hayama 0:da22b0b4395a 281
hayama 0:da22b0b4395a 282 \param [in] fpscr Floating Point Status/Control value to set
hayama 0:da22b0b4395a 283 */
hayama 0:da22b0b4395a 284 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
hayama 0:da22b0b4395a 285 {
hayama 0:da22b0b4395a 286 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
hayama 0:da22b0b4395a 287 register uint32_t __regfpscr __ASM("fpscr");
hayama 0:da22b0b4395a 288 __regfpscr = (fpscr);
hayama 0:da22b0b4395a 289 #endif
hayama 0:da22b0b4395a 290 }
hayama 0:da22b0b4395a 291
hayama 0:da22b0b4395a 292 #endif /* (__CORTEX_M == 0x04) */
hayama 0:da22b0b4395a 293
hayama 0:da22b0b4395a 294
hayama 0:da22b0b4395a 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
hayama 0:da22b0b4395a 296 /* IAR iccarm specific functions */
hayama 0:da22b0b4395a 297
hayama 0:da22b0b4395a 298 #include <cmsis_iar.h>
hayama 0:da22b0b4395a 299
hayama 0:da22b0b4395a 300
hayama 0:da22b0b4395a 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
hayama 0:da22b0b4395a 302 /* TI CCS specific functions */
hayama 0:da22b0b4395a 303
hayama 0:da22b0b4395a 304 #include <cmsis_ccs.h>
hayama 0:da22b0b4395a 305
hayama 0:da22b0b4395a 306
hayama 0:da22b0b4395a 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
hayama 0:da22b0b4395a 308 /* GNU gcc specific functions */
hayama 0:da22b0b4395a 309
hayama 0:da22b0b4395a 310 /** \brief Enable IRQ Interrupts
hayama 0:da22b0b4395a 311
hayama 0:da22b0b4395a 312 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
hayama 0:da22b0b4395a 313 Can only be executed in Privileged modes.
hayama 0:da22b0b4395a 314 */
hayama 0:da22b0b4395a 315 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
hayama 0:da22b0b4395a 316 {
hayama 0:da22b0b4395a 317 __ASM volatile ("cpsie i" : : : "memory");
hayama 0:da22b0b4395a 318 }
hayama 0:da22b0b4395a 319
hayama 0:da22b0b4395a 320
hayama 0:da22b0b4395a 321 /** \brief Disable IRQ Interrupts
hayama 0:da22b0b4395a 322
hayama 0:da22b0b4395a 323 This function disables IRQ interrupts by setting the I-bit in the CPSR.
hayama 0:da22b0b4395a 324 Can only be executed in Privileged modes.
hayama 0:da22b0b4395a 325 */
hayama 0:da22b0b4395a 326 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
hayama 0:da22b0b4395a 327 {
hayama 0:da22b0b4395a 328 __ASM volatile ("cpsid i" : : : "memory");
hayama 0:da22b0b4395a 329 }
hayama 0:da22b0b4395a 330
hayama 0:da22b0b4395a 331
hayama 0:da22b0b4395a 332 /** \brief Get Control Register
hayama 0:da22b0b4395a 333
hayama 0:da22b0b4395a 334 This function returns the content of the Control Register.
hayama 0:da22b0b4395a 335
hayama 0:da22b0b4395a 336 \return Control Register value
hayama 0:da22b0b4395a 337 */
hayama 0:da22b0b4395a 338 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
hayama 0:da22b0b4395a 339 {
hayama 0:da22b0b4395a 340 uint32_t result;
hayama 0:da22b0b4395a 341
hayama 0:da22b0b4395a 342 __ASM volatile ("MRS %0, control" : "=r" (result) );
hayama 0:da22b0b4395a 343 return(result);
hayama 0:da22b0b4395a 344 }
hayama 0:da22b0b4395a 345
hayama 0:da22b0b4395a 346
hayama 0:da22b0b4395a 347 /** \brief Set Control Register
hayama 0:da22b0b4395a 348
hayama 0:da22b0b4395a 349 This function writes the given value to the Control Register.
hayama 0:da22b0b4395a 350
hayama 0:da22b0b4395a 351 \param [in] control Control Register value to set
hayama 0:da22b0b4395a 352 */
hayama 0:da22b0b4395a 353 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
hayama 0:da22b0b4395a 354 {
hayama 0:da22b0b4395a 355 __ASM volatile ("MSR control, %0" : : "r" (control) );
hayama 0:da22b0b4395a 356 }
hayama 0:da22b0b4395a 357
hayama 0:da22b0b4395a 358
hayama 0:da22b0b4395a 359 /** \brief Get IPSR Register
hayama 0:da22b0b4395a 360
hayama 0:da22b0b4395a 361 This function returns the content of the IPSR Register.
hayama 0:da22b0b4395a 362
hayama 0:da22b0b4395a 363 \return IPSR Register value
hayama 0:da22b0b4395a 364 */
hayama 0:da22b0b4395a 365 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
hayama 0:da22b0b4395a 366 {
hayama 0:da22b0b4395a 367 uint32_t result;
hayama 0:da22b0b4395a 368
hayama 0:da22b0b4395a 369 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
hayama 0:da22b0b4395a 370 return(result);
hayama 0:da22b0b4395a 371 }
hayama 0:da22b0b4395a 372
hayama 0:da22b0b4395a 373
hayama 0:da22b0b4395a 374 /** \brief Get APSR Register
hayama 0:da22b0b4395a 375
hayama 0:da22b0b4395a 376 This function returns the content of the APSR Register.
hayama 0:da22b0b4395a 377
hayama 0:da22b0b4395a 378 \return APSR Register value
hayama 0:da22b0b4395a 379 */
hayama 0:da22b0b4395a 380 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
hayama 0:da22b0b4395a 381 {
hayama 0:da22b0b4395a 382 uint32_t result;
hayama 0:da22b0b4395a 383
hayama 0:da22b0b4395a 384 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
hayama 0:da22b0b4395a 385 return(result);
hayama 0:da22b0b4395a 386 }
hayama 0:da22b0b4395a 387
hayama 0:da22b0b4395a 388
hayama 0:da22b0b4395a 389 /** \brief Get xPSR Register
hayama 0:da22b0b4395a 390
hayama 0:da22b0b4395a 391 This function returns the content of the xPSR Register.
hayama 0:da22b0b4395a 392
hayama 0:da22b0b4395a 393 \return xPSR Register value
hayama 0:da22b0b4395a 394 */
hayama 0:da22b0b4395a 395 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
hayama 0:da22b0b4395a 396 {
hayama 0:da22b0b4395a 397 uint32_t result;
hayama 0:da22b0b4395a 398
hayama 0:da22b0b4395a 399 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
hayama 0:da22b0b4395a 400 return(result);
hayama 0:da22b0b4395a 401 }
hayama 0:da22b0b4395a 402
hayama 0:da22b0b4395a 403
hayama 0:da22b0b4395a 404 /** \brief Get Process Stack Pointer
hayama 0:da22b0b4395a 405
hayama 0:da22b0b4395a 406 This function returns the current value of the Process Stack Pointer (PSP).
hayama 0:da22b0b4395a 407
hayama 0:da22b0b4395a 408 \return PSP Register value
hayama 0:da22b0b4395a 409 */
hayama 0:da22b0b4395a 410 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
hayama 0:da22b0b4395a 411 {
hayama 0:da22b0b4395a 412 register uint32_t result;
hayama 0:da22b0b4395a 413
hayama 0:da22b0b4395a 414 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
hayama 0:da22b0b4395a 415 return(result);
hayama 0:da22b0b4395a 416 }
hayama 0:da22b0b4395a 417
hayama 0:da22b0b4395a 418
hayama 0:da22b0b4395a 419 /** \brief Set Process Stack Pointer
hayama 0:da22b0b4395a 420
hayama 0:da22b0b4395a 421 This function assigns the given value to the Process Stack Pointer (PSP).
hayama 0:da22b0b4395a 422
hayama 0:da22b0b4395a 423 \param [in] topOfProcStack Process Stack Pointer value to set
hayama 0:da22b0b4395a 424 */
hayama 0:da22b0b4395a 425 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
hayama 0:da22b0b4395a 426 {
hayama 0:da22b0b4395a 427 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) );
hayama 0:da22b0b4395a 428 }
hayama 0:da22b0b4395a 429
hayama 0:da22b0b4395a 430
hayama 0:da22b0b4395a 431 /** \brief Get Main Stack Pointer
hayama 0:da22b0b4395a 432
hayama 0:da22b0b4395a 433 This function returns the current value of the Main Stack Pointer (MSP).
hayama 0:da22b0b4395a 434
hayama 0:da22b0b4395a 435 \return MSP Register value
hayama 0:da22b0b4395a 436 */
hayama 0:da22b0b4395a 437 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
hayama 0:da22b0b4395a 438 {
hayama 0:da22b0b4395a 439 register uint32_t result;
hayama 0:da22b0b4395a 440
hayama 0:da22b0b4395a 441 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
hayama 0:da22b0b4395a 442 return(result);
hayama 0:da22b0b4395a 443 }
hayama 0:da22b0b4395a 444
hayama 0:da22b0b4395a 445
hayama 0:da22b0b4395a 446 /** \brief Set Main Stack Pointer
hayama 0:da22b0b4395a 447
hayama 0:da22b0b4395a 448 This function assigns the given value to the Main Stack Pointer (MSP).
hayama 0:da22b0b4395a 449
hayama 0:da22b0b4395a 450 \param [in] topOfMainStack Main Stack Pointer value to set
hayama 0:da22b0b4395a 451 */
hayama 0:da22b0b4395a 452 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
hayama 0:da22b0b4395a 453 {
hayama 0:da22b0b4395a 454 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) );
hayama 0:da22b0b4395a 455 }
hayama 0:da22b0b4395a 456
hayama 0:da22b0b4395a 457
hayama 0:da22b0b4395a 458 /** \brief Get Priority Mask
hayama 0:da22b0b4395a 459
hayama 0:da22b0b4395a 460 This function returns the current state of the priority mask bit from the Priority Mask Register.
hayama 0:da22b0b4395a 461
hayama 0:da22b0b4395a 462 \return Priority Mask value
hayama 0:da22b0b4395a 463 */
hayama 0:da22b0b4395a 464 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
hayama 0:da22b0b4395a 465 {
hayama 0:da22b0b4395a 466 uint32_t result;
hayama 0:da22b0b4395a 467
hayama 0:da22b0b4395a 468 __ASM volatile ("MRS %0, primask" : "=r" (result) );
hayama 0:da22b0b4395a 469 return(result);
hayama 0:da22b0b4395a 470 }
hayama 0:da22b0b4395a 471
hayama 0:da22b0b4395a 472
hayama 0:da22b0b4395a 473 /** \brief Set Priority Mask
hayama 0:da22b0b4395a 474
hayama 0:da22b0b4395a 475 This function assigns the given value to the Priority Mask Register.
hayama 0:da22b0b4395a 476
hayama 0:da22b0b4395a 477 \param [in] priMask Priority Mask
hayama 0:da22b0b4395a 478 */
hayama 0:da22b0b4395a 479 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
hayama 0:da22b0b4395a 480 {
hayama 0:da22b0b4395a 481 __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
hayama 0:da22b0b4395a 482 }
hayama 0:da22b0b4395a 483
hayama 0:da22b0b4395a 484
hayama 0:da22b0b4395a 485 #if (__CORTEX_M >= 0x03)
hayama 0:da22b0b4395a 486
hayama 0:da22b0b4395a 487 /** \brief Enable FIQ
hayama 0:da22b0b4395a 488
hayama 0:da22b0b4395a 489 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
hayama 0:da22b0b4395a 490 Can only be executed in Privileged modes.
hayama 0:da22b0b4395a 491 */
hayama 0:da22b0b4395a 492 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
hayama 0:da22b0b4395a 493 {
hayama 0:da22b0b4395a 494 __ASM volatile ("cpsie f" : : : "memory");
hayama 0:da22b0b4395a 495 }
hayama 0:da22b0b4395a 496
hayama 0:da22b0b4395a 497
hayama 0:da22b0b4395a 498 /** \brief Disable FIQ
hayama 0:da22b0b4395a 499
hayama 0:da22b0b4395a 500 This function disables FIQ interrupts by setting the F-bit in the CPSR.
hayama 0:da22b0b4395a 501 Can only be executed in Privileged modes.
hayama 0:da22b0b4395a 502 */
hayama 0:da22b0b4395a 503 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
hayama 0:da22b0b4395a 504 {
hayama 0:da22b0b4395a 505 __ASM volatile ("cpsid f" : : : "memory");
hayama 0:da22b0b4395a 506 }
hayama 0:da22b0b4395a 507
hayama 0:da22b0b4395a 508
hayama 0:da22b0b4395a 509 /** \brief Get Base Priority
hayama 0:da22b0b4395a 510
hayama 0:da22b0b4395a 511 This function returns the current value of the Base Priority register.
hayama 0:da22b0b4395a 512
hayama 0:da22b0b4395a 513 \return Base Priority register value
hayama 0:da22b0b4395a 514 */
hayama 0:da22b0b4395a 515 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
hayama 0:da22b0b4395a 516 {
hayama 0:da22b0b4395a 517 uint32_t result;
hayama 0:da22b0b4395a 518
hayama 0:da22b0b4395a 519 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
hayama 0:da22b0b4395a 520 return(result);
hayama 0:da22b0b4395a 521 }
hayama 0:da22b0b4395a 522
hayama 0:da22b0b4395a 523
hayama 0:da22b0b4395a 524 /** \brief Set Base Priority
hayama 0:da22b0b4395a 525
hayama 0:da22b0b4395a 526 This function assigns the given value to the Base Priority register.
hayama 0:da22b0b4395a 527
hayama 0:da22b0b4395a 528 \param [in] basePri Base Priority value to set
hayama 0:da22b0b4395a 529 */
hayama 0:da22b0b4395a 530 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
hayama 0:da22b0b4395a 531 {
hayama 0:da22b0b4395a 532 __ASM volatile ("MSR basepri, %0" : : "r" (value) );
hayama 0:da22b0b4395a 533 }
hayama 0:da22b0b4395a 534
hayama 0:da22b0b4395a 535
hayama 0:da22b0b4395a 536 /** \brief Get Fault Mask
hayama 0:da22b0b4395a 537
hayama 0:da22b0b4395a 538 This function returns the current value of the Fault Mask register.
hayama 0:da22b0b4395a 539
hayama 0:da22b0b4395a 540 \return Fault Mask register value
hayama 0:da22b0b4395a 541 */
hayama 0:da22b0b4395a 542 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
hayama 0:da22b0b4395a 543 {
hayama 0:da22b0b4395a 544 uint32_t result;
hayama 0:da22b0b4395a 545
hayama 0:da22b0b4395a 546 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
hayama 0:da22b0b4395a 547 return(result);
hayama 0:da22b0b4395a 548 }
hayama 0:da22b0b4395a 549
hayama 0:da22b0b4395a 550
hayama 0:da22b0b4395a 551 /** \brief Set Fault Mask
hayama 0:da22b0b4395a 552
hayama 0:da22b0b4395a 553 This function assigns the given value to the Fault Mask register.
hayama 0:da22b0b4395a 554
hayama 0:da22b0b4395a 555 \param [in] faultMask Fault Mask value to set
hayama 0:da22b0b4395a 556 */
hayama 0:da22b0b4395a 557 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
hayama 0:da22b0b4395a 558 {
hayama 0:da22b0b4395a 559 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
hayama 0:da22b0b4395a 560 }
hayama 0:da22b0b4395a 561
hayama 0:da22b0b4395a 562 #endif /* (__CORTEX_M >= 0x03) */
hayama 0:da22b0b4395a 563
hayama 0:da22b0b4395a 564
hayama 0:da22b0b4395a 565 #if (__CORTEX_M == 0x04)
hayama 0:da22b0b4395a 566
hayama 0:da22b0b4395a 567 /** \brief Get FPSCR
hayama 0:da22b0b4395a 568
hayama 0:da22b0b4395a 569 This function returns the current value of the Floating Point Status/Control register.
hayama 0:da22b0b4395a 570
hayama 0:da22b0b4395a 571 \return Floating Point Status/Control register value
hayama 0:da22b0b4395a 572 */
hayama 0:da22b0b4395a 573 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
hayama 0:da22b0b4395a 574 {
hayama 0:da22b0b4395a 575 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
hayama 0:da22b0b4395a 576 uint32_t result;
hayama 0:da22b0b4395a 577
hayama 0:da22b0b4395a 578 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
hayama 0:da22b0b4395a 579 return(result);
hayama 0:da22b0b4395a 580 #else
hayama 0:da22b0b4395a 581 return(0);
hayama 0:da22b0b4395a 582 #endif
hayama 0:da22b0b4395a 583 }
hayama 0:da22b0b4395a 584
hayama 0:da22b0b4395a 585
hayama 0:da22b0b4395a 586 /** \brief Set FPSCR
hayama 0:da22b0b4395a 587
hayama 0:da22b0b4395a 588 This function assigns the given value to the Floating Point Status/Control register.
hayama 0:da22b0b4395a 589
hayama 0:da22b0b4395a 590 \param [in] fpscr Floating Point Status/Control value to set
hayama 0:da22b0b4395a 591 */
hayama 0:da22b0b4395a 592 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
hayama 0:da22b0b4395a 593 {
hayama 0:da22b0b4395a 594 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
hayama 0:da22b0b4395a 595 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) );
hayama 0:da22b0b4395a 596 #endif
hayama 0:da22b0b4395a 597 }
hayama 0:da22b0b4395a 598
hayama 0:da22b0b4395a 599 #endif /* (__CORTEX_M == 0x04) */
hayama 0:da22b0b4395a 600
hayama 0:da22b0b4395a 601
hayama 0:da22b0b4395a 602 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
hayama 0:da22b0b4395a 603 /* TASKING carm specific functions */
hayama 0:da22b0b4395a 604
hayama 0:da22b0b4395a 605 /*
hayama 0:da22b0b4395a 606 * The CMSIS functions have been implemented as intrinsics in the compiler.
hayama 0:da22b0b4395a 607 * Please use "carm -?i" to get an up to date list of all instrinsics,
hayama 0:da22b0b4395a 608 * Including the CMSIS ones.
hayama 0:da22b0b4395a 609 */
hayama 0:da22b0b4395a 610
hayama 0:da22b0b4395a 611 #endif
hayama 0:da22b0b4395a 612
hayama 0:da22b0b4395a 613 /*@} end of CMSIS_Core_RegAccFunctions */
hayama 0:da22b0b4395a 614
hayama 0:da22b0b4395a 615
hayama 0:da22b0b4395a 616 #endif /* __CORE_CMFUNC_H */