micro SD Card module, Normal SPI CS mode. detail : http://wizard.nestegg.jp/sd.html http://wizard.nestegg.jp/spisetting.html

Dependencies:   mbed

Committer:
halfpitch
Date:
Mon Jul 25 08:06:37 2011 +0000
Revision:
0:e7f811d99fdb
Rev.A

Who changed what in which revision?

UserRevisionLine numberNew contents of line
halfpitch 0:e7f811d99fdb 1 /* mbed Microcontroller Library - SDFileSystem
halfpitch 0:e7f811d99fdb 2 * Copyright (c) 2008-2009, sford
halfpitch 0:e7f811d99fdb 3 */
halfpitch 0:e7f811d99fdb 4
halfpitch 0:e7f811d99fdb 5 // VERY DRAFT CODE! Needs serious rework/refactoring
halfpitch 0:e7f811d99fdb 6
halfpitch 0:e7f811d99fdb 7 /* Introduction
halfpitch 0:e7f811d99fdb 8 * ------------
halfpitch 0:e7f811d99fdb 9 * SD and MMC cards support a number of interfaces, but common to them all
halfpitch 0:e7f811d99fdb 10 * is one based on SPI. This is the one I'm implmenting because it means
halfpitch 0:e7f811d99fdb 11 * it is much more portable even though not so performant, and we already
halfpitch 0:e7f811d99fdb 12 * have the mbed SPI Interface!
halfpitch 0:e7f811d99fdb 13 *
halfpitch 0:e7f811d99fdb 14 * The main reference I'm using is Chapter 7, "SPI Mode" of:
halfpitch 0:e7f811d99fdb 15 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
halfpitch 0:e7f811d99fdb 16 *
halfpitch 0:e7f811d99fdb 17 * SPI Startup
halfpitch 0:e7f811d99fdb 18 * -----------
halfpitch 0:e7f811d99fdb 19 * The SD card powers up in SD mode. The SPI interface mode is selected by
halfpitch 0:e7f811d99fdb 20 * asserting CS low and sending the reset command (CMD0). The card will
halfpitch 0:e7f811d99fdb 21 * respond with a (R1) response.
halfpitch 0:e7f811d99fdb 22 *
halfpitch 0:e7f811d99fdb 23 * CMD8 is optionally sent to determine the voltage range supported, and
halfpitch 0:e7f811d99fdb 24 * indirectly determine whether it is a version 1.x SD/non-SD card or
halfpitch 0:e7f811d99fdb 25 * version 2.x. I'll just ignore this for now.
halfpitch 0:e7f811d99fdb 26 *
halfpitch 0:e7f811d99fdb 27 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
halfpitch 0:e7f811d99fdb 28 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
halfpitch 0:e7f811d99fdb 29 *
halfpitch 0:e7f811d99fdb 30 * You should also indicate whether the host supports High Capicity cards,
halfpitch 0:e7f811d99fdb 31 * and check whether the card is high capacity - i'll also ignore this
halfpitch 0:e7f811d99fdb 32 *
halfpitch 0:e7f811d99fdb 33 * SPI Protocol
halfpitch 0:e7f811d99fdb 34 * ------------
halfpitch 0:e7f811d99fdb 35 * The SD SPI protocol is based on transactions made up of 8-bit words, with
halfpitch 0:e7f811d99fdb 36 * the host starting every bus transaction by asserting the CS signal low. The
halfpitch 0:e7f811d99fdb 37 * card always responds to commands, data blocks and errors.
halfpitch 0:e7f811d99fdb 38 *
halfpitch 0:e7f811d99fdb 39 * The protocol supports a CRC, but by default it is off (except for the
halfpitch 0:e7f811d99fdb 40 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
halfpitch 0:e7f811d99fdb 41 * I'll leave the CRC off I think!
halfpitch 0:e7f811d99fdb 42 *
halfpitch 0:e7f811d99fdb 43 * Standard capacity cards have variable data block sizes, whereas High
halfpitch 0:e7f811d99fdb 44 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
halfpitch 0:e7f811d99fdb 45 * just always use the Standard Capacity cards with a block size of 512 bytes.
halfpitch 0:e7f811d99fdb 46 * This is set with CMD16.
halfpitch 0:e7f811d99fdb 47 *
halfpitch 0:e7f811d99fdb 48 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
halfpitch 0:e7f811d99fdb 49 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
halfpitch 0:e7f811d99fdb 50 * the card gets a read command, it responds with a response token, and then
halfpitch 0:e7f811d99fdb 51 * a data token or an error.
halfpitch 0:e7f811d99fdb 52 *
halfpitch 0:e7f811d99fdb 53 * SPI Command Format
halfpitch 0:e7f811d99fdb 54 * ------------------
halfpitch 0:e7f811d99fdb 55 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
halfpitch 0:e7f811d99fdb 56 *
halfpitch 0:e7f811d99fdb 57 * +---------------+------------+------------+-----------+----------+--------------+
halfpitch 0:e7f811d99fdb 58 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
halfpitch 0:e7f811d99fdb 59 * +---------------+------------+------------+-----------+----------+--------------+
halfpitch 0:e7f811d99fdb 60 *
halfpitch 0:e7f811d99fdb 61 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
halfpitch 0:e7f811d99fdb 62 *
halfpitch 0:e7f811d99fdb 63 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
halfpitch 0:e7f811d99fdb 64 *
halfpitch 0:e7f811d99fdb 65 * SPI Response Format
halfpitch 0:e7f811d99fdb 66 * -------------------
halfpitch 0:e7f811d99fdb 67 * The main response format (R1) is a status byte (normally zero). Key flags:
halfpitch 0:e7f811d99fdb 68 * idle - 1 if the card is in an idle state/initialising
halfpitch 0:e7f811d99fdb 69 * cmd - 1 if an illegal command code was detected
halfpitch 0:e7f811d99fdb 70 *
halfpitch 0:e7f811d99fdb 71 * +-------------------------------------------------+
halfpitch 0:e7f811d99fdb 72 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
halfpitch 0:e7f811d99fdb 73 * +-------------------------------------------------+
halfpitch 0:e7f811d99fdb 74 *
halfpitch 0:e7f811d99fdb 75 * R1b is the same, except it is followed by a busy signal (zeros) until
halfpitch 0:e7f811d99fdb 76 * the first non-zero byte when it is ready again.
halfpitch 0:e7f811d99fdb 77 *
halfpitch 0:e7f811d99fdb 78 * Data Response Token
halfpitch 0:e7f811d99fdb 79 * -------------------
halfpitch 0:e7f811d99fdb 80 * Every data block written to the card is acknowledged by a byte
halfpitch 0:e7f811d99fdb 81 * response token
halfpitch 0:e7f811d99fdb 82 *
halfpitch 0:e7f811d99fdb 83 * +----------------------+
halfpitch 0:e7f811d99fdb 84 * | xxx | 0 | status | 1 |
halfpitch 0:e7f811d99fdb 85 * +----------------------+
halfpitch 0:e7f811d99fdb 86 * 010 - OK!
halfpitch 0:e7f811d99fdb 87 * 101 - CRC Error
halfpitch 0:e7f811d99fdb 88 * 110 - Write Error
halfpitch 0:e7f811d99fdb 89 *
halfpitch 0:e7f811d99fdb 90 * Single Block Read and Write
halfpitch 0:e7f811d99fdb 91 * ---------------------------
halfpitch 0:e7f811d99fdb 92 *
halfpitch 0:e7f811d99fdb 93 * Block transfers have a byte header, followed by the data, followed
halfpitch 0:e7f811d99fdb 94 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
halfpitch 0:e7f811d99fdb 95 *
halfpitch 0:e7f811d99fdb 96 * +------+---------+---------+- - - -+---------+-----------+----------+
halfpitch 0:e7f811d99fdb 97 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
halfpitch 0:e7f811d99fdb 98 * +------+---------+---------+- - - -+---------+-----------+----------+
halfpitch 0:e7f811d99fdb 99 */
halfpitch 0:e7f811d99fdb 100
halfpitch 0:e7f811d99fdb 101 #include "SDFileSystem.h"
halfpitch 0:e7f811d99fdb 102
halfpitch 0:e7f811d99fdb 103 #define SD_COMMAND_TIMEOUT 5000
halfpitch 0:e7f811d99fdb 104
halfpitch 0:e7f811d99fdb 105 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
halfpitch 0:e7f811d99fdb 106 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
halfpitch 0:e7f811d99fdb 107 _cs = 1;
halfpitch 0:e7f811d99fdb 108 }
halfpitch 0:e7f811d99fdb 109
halfpitch 0:e7f811d99fdb 110 #define R1_IDLE_STATE (1 << 0)
halfpitch 0:e7f811d99fdb 111 #define R1_ERASE_RESET (1 << 1)
halfpitch 0:e7f811d99fdb 112 #define R1_ILLEGAL_COMMAND (1 << 2)
halfpitch 0:e7f811d99fdb 113 #define R1_COM_CRC_ERROR (1 << 3)
halfpitch 0:e7f811d99fdb 114 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
halfpitch 0:e7f811d99fdb 115 #define R1_ADDRESS_ERROR (1 << 5)
halfpitch 0:e7f811d99fdb 116 #define R1_PARAMETER_ERROR (1 << 6)
halfpitch 0:e7f811d99fdb 117
halfpitch 0:e7f811d99fdb 118 // Types
halfpitch 0:e7f811d99fdb 119 // - v1.x Standard Capacity
halfpitch 0:e7f811d99fdb 120 // - v2.x Standard Capacity
halfpitch 0:e7f811d99fdb 121 // - v2.x High Capacity
halfpitch 0:e7f811d99fdb 122 // - Not recognised as an SD Card
halfpitch 0:e7f811d99fdb 123
halfpitch 0:e7f811d99fdb 124 #define SDCARD_FAIL 0
halfpitch 0:e7f811d99fdb 125 #define SDCARD_V1 1
halfpitch 0:e7f811d99fdb 126 #define SDCARD_V2 2
halfpitch 0:e7f811d99fdb 127 #define SDCARD_V2HC 3
halfpitch 0:e7f811d99fdb 128
halfpitch 0:e7f811d99fdb 129 int SDFileSystem::initialise_card() {
halfpitch 0:e7f811d99fdb 130 // Set to 100kHz for initialisation, and clock card with cs = 1
halfpitch 0:e7f811d99fdb 131 _spi.frequency(100000);
halfpitch 0:e7f811d99fdb 132 _cs = 1;
halfpitch 0:e7f811d99fdb 133 for(int i=0; i<16; i++) {
halfpitch 0:e7f811d99fdb 134 _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 135 }
halfpitch 0:e7f811d99fdb 136
halfpitch 0:e7f811d99fdb 137 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
halfpitch 0:e7f811d99fdb 138 if(_cmd(0, 0) != R1_IDLE_STATE) {
halfpitch 0:e7f811d99fdb 139 fprintf(stderr, "No disk, or could not put SD card in to SPI idle state\n");
halfpitch 0:e7f811d99fdb 140 return SDCARD_FAIL;
halfpitch 0:e7f811d99fdb 141 }
halfpitch 0:e7f811d99fdb 142
halfpitch 0:e7f811d99fdb 143 // send CMD8 to determine whther it is ver 2.x
halfpitch 0:e7f811d99fdb 144 int r = _cmd8();
halfpitch 0:e7f811d99fdb 145 if(r == R1_IDLE_STATE) {
halfpitch 0:e7f811d99fdb 146 return initialise_card_v2();
halfpitch 0:e7f811d99fdb 147 } else if(r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
halfpitch 0:e7f811d99fdb 148 return initialise_card_v1();
halfpitch 0:e7f811d99fdb 149 } else {
halfpitch 0:e7f811d99fdb 150 fprintf(stderr, "Not in idle state after sending CMD8 (not an SD card?)\n");
halfpitch 0:e7f811d99fdb 151 return SDCARD_FAIL;
halfpitch 0:e7f811d99fdb 152 }
halfpitch 0:e7f811d99fdb 153 }
halfpitch 0:e7f811d99fdb 154
halfpitch 0:e7f811d99fdb 155 int SDFileSystem::initialise_card_v1() {
halfpitch 0:e7f811d99fdb 156 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
halfpitch 0:e7f811d99fdb 157 _cmd(55, 0);
halfpitch 0:e7f811d99fdb 158 if(_cmd(41, 0) == 0) {
halfpitch 0:e7f811d99fdb 159 return SDCARD_V1;
halfpitch 0:e7f811d99fdb 160 }
halfpitch 0:e7f811d99fdb 161 }
halfpitch 0:e7f811d99fdb 162
halfpitch 0:e7f811d99fdb 163 fprintf(stderr, "Timeout waiting for v1.x card\n");
halfpitch 0:e7f811d99fdb 164 return SDCARD_FAIL;
halfpitch 0:e7f811d99fdb 165 }
halfpitch 0:e7f811d99fdb 166
halfpitch 0:e7f811d99fdb 167 int SDFileSystem::initialise_card_v2() {
halfpitch 0:e7f811d99fdb 168
halfpitch 0:e7f811d99fdb 169 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
halfpitch 0:e7f811d99fdb 170 _cmd(55, 0);
halfpitch 0:e7f811d99fdb 171 if(_cmd(41, 0) == 0) {
halfpitch 0:e7f811d99fdb 172 _cmd58();
halfpitch 0:e7f811d99fdb 173 return SDCARD_V2;
halfpitch 0:e7f811d99fdb 174 }
halfpitch 0:e7f811d99fdb 175 }
halfpitch 0:e7f811d99fdb 176
halfpitch 0:e7f811d99fdb 177 fprintf(stderr, "Timeout waiting for v2.x card\n");
halfpitch 0:e7f811d99fdb 178 return SDCARD_FAIL;
halfpitch 0:e7f811d99fdb 179 }
halfpitch 0:e7f811d99fdb 180
halfpitch 0:e7f811d99fdb 181 int SDFileSystem::disk_initialize() {
halfpitch 0:e7f811d99fdb 182
halfpitch 0:e7f811d99fdb 183 int i = initialise_card();
halfpitch 0:e7f811d99fdb 184 // printf("init card = %d\n", i);
halfpitch 0:e7f811d99fdb 185 // printf("OK\n");
halfpitch 0:e7f811d99fdb 186
halfpitch 0:e7f811d99fdb 187 _sectors = _sd_sectors();
halfpitch 0:e7f811d99fdb 188
halfpitch 0:e7f811d99fdb 189 // Set block length to 512 (CMD16)
halfpitch 0:e7f811d99fdb 190 if(_cmd(16, 512) != 0) {
halfpitch 0:e7f811d99fdb 191 fprintf(stderr, "Set 512-byte block timed out\n");
halfpitch 0:e7f811d99fdb 192 return 1;
halfpitch 0:e7f811d99fdb 193 }
halfpitch 0:e7f811d99fdb 194
halfpitch 0:e7f811d99fdb 195 _spi.frequency(1000000); // Set to 1MHz for data transfer
halfpitch 0:e7f811d99fdb 196 return 0;
halfpitch 0:e7f811d99fdb 197 }
halfpitch 0:e7f811d99fdb 198
halfpitch 0:e7f811d99fdb 199 int SDFileSystem::disk_write(const char *buffer, int block_number) {
halfpitch 0:e7f811d99fdb 200 // set write address for single block (CMD24)
halfpitch 0:e7f811d99fdb 201 if(_cmd(24, block_number * 512) != 0) {
halfpitch 0:e7f811d99fdb 202 return 1;
halfpitch 0:e7f811d99fdb 203 }
halfpitch 0:e7f811d99fdb 204
halfpitch 0:e7f811d99fdb 205 // send the data block
halfpitch 0:e7f811d99fdb 206 _write(buffer, 512);
halfpitch 0:e7f811d99fdb 207 return 0;
halfpitch 0:e7f811d99fdb 208 }
halfpitch 0:e7f811d99fdb 209
halfpitch 0:e7f811d99fdb 210 int SDFileSystem::disk_read(char *buffer, int block_number) {
halfpitch 0:e7f811d99fdb 211 // set read address for single block (CMD17)
halfpitch 0:e7f811d99fdb 212 if(_cmd(17, block_number * 512) != 0) {
halfpitch 0:e7f811d99fdb 213 return 1;
halfpitch 0:e7f811d99fdb 214 }
halfpitch 0:e7f811d99fdb 215
halfpitch 0:e7f811d99fdb 216 // receive the data
halfpitch 0:e7f811d99fdb 217 _read(buffer, 512);
halfpitch 0:e7f811d99fdb 218 return 0;
halfpitch 0:e7f811d99fdb 219 }
halfpitch 0:e7f811d99fdb 220
halfpitch 0:e7f811d99fdb 221 int SDFileSystem::disk_status() { return 0; }
halfpitch 0:e7f811d99fdb 222 int SDFileSystem::disk_sync() { return 0; }
halfpitch 0:e7f811d99fdb 223 int SDFileSystem::disk_sectors() { return _sectors; }
halfpitch 0:e7f811d99fdb 224
halfpitch 0:e7f811d99fdb 225 // PRIVATE FUNCTIONS
halfpitch 0:e7f811d99fdb 226
halfpitch 0:e7f811d99fdb 227 int SDFileSystem::_cmd(int cmd, int arg) {
halfpitch 0:e7f811d99fdb 228 _cs = 0;
halfpitch 0:e7f811d99fdb 229
halfpitch 0:e7f811d99fdb 230 // send a command
halfpitch 0:e7f811d99fdb 231 _spi.write(0x40 | cmd);
halfpitch 0:e7f811d99fdb 232 _spi.write(arg >> 24);
halfpitch 0:e7f811d99fdb 233 _spi.write(arg >> 16);
halfpitch 0:e7f811d99fdb 234 _spi.write(arg >> 8);
halfpitch 0:e7f811d99fdb 235 _spi.write(arg >> 0);
halfpitch 0:e7f811d99fdb 236 _spi.write(0x95);
halfpitch 0:e7f811d99fdb 237
halfpitch 0:e7f811d99fdb 238 // wait for the repsonse (response[7] == 0)
halfpitch 0:e7f811d99fdb 239 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
halfpitch 0:e7f811d99fdb 240 int response = _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 241 if(!(response & 0x80)) {
halfpitch 0:e7f811d99fdb 242 _cs = 1;
halfpitch 0:e7f811d99fdb 243 _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 244 return response;
halfpitch 0:e7f811d99fdb 245 }
halfpitch 0:e7f811d99fdb 246 }
halfpitch 0:e7f811d99fdb 247 _cs = 1;
halfpitch 0:e7f811d99fdb 248 _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 249 return -1; // timeout
halfpitch 0:e7f811d99fdb 250 }
halfpitch 0:e7f811d99fdb 251 int SDFileSystem::_cmdx(int cmd, int arg) {
halfpitch 0:e7f811d99fdb 252 _cs = 0;
halfpitch 0:e7f811d99fdb 253
halfpitch 0:e7f811d99fdb 254 // send a command
halfpitch 0:e7f811d99fdb 255 _spi.write(0x40 | cmd);
halfpitch 0:e7f811d99fdb 256 _spi.write(arg >> 24);
halfpitch 0:e7f811d99fdb 257 _spi.write(arg >> 16);
halfpitch 0:e7f811d99fdb 258 _spi.write(arg >> 8);
halfpitch 0:e7f811d99fdb 259 _spi.write(arg >> 0);
halfpitch 0:e7f811d99fdb 260 _spi.write(0x95);
halfpitch 0:e7f811d99fdb 261
halfpitch 0:e7f811d99fdb 262 // wait for the repsonse (response[7] == 0)
halfpitch 0:e7f811d99fdb 263 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
halfpitch 0:e7f811d99fdb 264 int response = _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 265 if(!(response & 0x80)) {
halfpitch 0:e7f811d99fdb 266 return response;
halfpitch 0:e7f811d99fdb 267 }
halfpitch 0:e7f811d99fdb 268 }
halfpitch 0:e7f811d99fdb 269 _cs = 1;
halfpitch 0:e7f811d99fdb 270 _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 271 return -1; // timeout
halfpitch 0:e7f811d99fdb 272 }
halfpitch 0:e7f811d99fdb 273
halfpitch 0:e7f811d99fdb 274
halfpitch 0:e7f811d99fdb 275 int SDFileSystem::_cmd58() {
halfpitch 0:e7f811d99fdb 276 _cs = 0;
halfpitch 0:e7f811d99fdb 277 int arg = 0;
halfpitch 0:e7f811d99fdb 278
halfpitch 0:e7f811d99fdb 279 // send a command
halfpitch 0:e7f811d99fdb 280 _spi.write(0x40 | 58);
halfpitch 0:e7f811d99fdb 281 _spi.write(arg >> 24);
halfpitch 0:e7f811d99fdb 282 _spi.write(arg >> 16);
halfpitch 0:e7f811d99fdb 283 _spi.write(arg >> 8);
halfpitch 0:e7f811d99fdb 284 _spi.write(arg >> 0);
halfpitch 0:e7f811d99fdb 285 _spi.write(0x95);
halfpitch 0:e7f811d99fdb 286
halfpitch 0:e7f811d99fdb 287 // wait for the repsonse (response[7] == 0)
halfpitch 0:e7f811d99fdb 288 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
halfpitch 0:e7f811d99fdb 289 int response = _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 290 if(!(response & 0x80)) {
halfpitch 0:e7f811d99fdb 291 int ocr = _spi.write(0xFF) << 24;
halfpitch 0:e7f811d99fdb 292 ocr |= _spi.write(0xFF) << 16;
halfpitch 0:e7f811d99fdb 293 ocr |= _spi.write(0xFF) << 8;
halfpitch 0:e7f811d99fdb 294 ocr |= _spi.write(0xFF) << 0;
halfpitch 0:e7f811d99fdb 295 // printf("OCR = 0x%08X\n", ocr);
halfpitch 0:e7f811d99fdb 296 _cs = 1;
halfpitch 0:e7f811d99fdb 297 _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 298 return response;
halfpitch 0:e7f811d99fdb 299 }
halfpitch 0:e7f811d99fdb 300 }
halfpitch 0:e7f811d99fdb 301 _cs = 1;
halfpitch 0:e7f811d99fdb 302 _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 303 return -1; // timeout
halfpitch 0:e7f811d99fdb 304 }
halfpitch 0:e7f811d99fdb 305
halfpitch 0:e7f811d99fdb 306 int SDFileSystem::_cmd8() {
halfpitch 0:e7f811d99fdb 307 _cs = 0;
halfpitch 0:e7f811d99fdb 308
halfpitch 0:e7f811d99fdb 309 // send a command
halfpitch 0:e7f811d99fdb 310 _spi.write(0x40 | 8); // CMD8
halfpitch 0:e7f811d99fdb 311 _spi.write(0x00); // reserved
halfpitch 0:e7f811d99fdb 312 _spi.write(0x00); // reserved
halfpitch 0:e7f811d99fdb 313 _spi.write(0x01); // 3.3v
halfpitch 0:e7f811d99fdb 314 _spi.write(0xAA); // check pattern
halfpitch 0:e7f811d99fdb 315 _spi.write(0x87); // crc
halfpitch 0:e7f811d99fdb 316
halfpitch 0:e7f811d99fdb 317 // wait for the repsonse (response[7] == 0)
halfpitch 0:e7f811d99fdb 318 for(int i=0; i<SD_COMMAND_TIMEOUT * 1000; i++) {
halfpitch 0:e7f811d99fdb 319 char response[5];
halfpitch 0:e7f811d99fdb 320 response[0] = _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 321 if(!(response[0] & 0x80)) {
halfpitch 0:e7f811d99fdb 322 for(int j=1; j<5; j++) {
halfpitch 0:e7f811d99fdb 323 response[i] = _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 324 }
halfpitch 0:e7f811d99fdb 325 _cs = 1;
halfpitch 0:e7f811d99fdb 326 _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 327 return response[0];
halfpitch 0:e7f811d99fdb 328 }
halfpitch 0:e7f811d99fdb 329 }
halfpitch 0:e7f811d99fdb 330 _cs = 1;
halfpitch 0:e7f811d99fdb 331 _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 332 return -1; // timeout
halfpitch 0:e7f811d99fdb 333 }
halfpitch 0:e7f811d99fdb 334
halfpitch 0:e7f811d99fdb 335 int SDFileSystem::_read(char *buffer, int length) {
halfpitch 0:e7f811d99fdb 336 _cs = 0;
halfpitch 0:e7f811d99fdb 337
halfpitch 0:e7f811d99fdb 338 // read until start byte (0xFF)
halfpitch 0:e7f811d99fdb 339 while(_spi.write(0xFF) != 0xFE);
halfpitch 0:e7f811d99fdb 340
halfpitch 0:e7f811d99fdb 341 // read data
halfpitch 0:e7f811d99fdb 342 for(int i=0; i<length; i++) {
halfpitch 0:e7f811d99fdb 343 buffer[i] = _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 344 }
halfpitch 0:e7f811d99fdb 345 _spi.write(0xFF); // checksum
halfpitch 0:e7f811d99fdb 346 _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 347
halfpitch 0:e7f811d99fdb 348 _cs = 1;
halfpitch 0:e7f811d99fdb 349 _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 350 return 0;
halfpitch 0:e7f811d99fdb 351 }
halfpitch 0:e7f811d99fdb 352
halfpitch 0:e7f811d99fdb 353 int SDFileSystem::_write(const char *buffer, int length) {
halfpitch 0:e7f811d99fdb 354 _cs = 0;
halfpitch 0:e7f811d99fdb 355
halfpitch 0:e7f811d99fdb 356 // indicate start of block
halfpitch 0:e7f811d99fdb 357 _spi.write(0xFE);
halfpitch 0:e7f811d99fdb 358
halfpitch 0:e7f811d99fdb 359 // write the data
halfpitch 0:e7f811d99fdb 360 for(int i=0; i<length; i++) {
halfpitch 0:e7f811d99fdb 361 _spi.write(buffer[i]);
halfpitch 0:e7f811d99fdb 362 }
halfpitch 0:e7f811d99fdb 363
halfpitch 0:e7f811d99fdb 364 // write the checksum
halfpitch 0:e7f811d99fdb 365 _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 366 _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 367
halfpitch 0:e7f811d99fdb 368 // check the repsonse token
halfpitch 0:e7f811d99fdb 369 if((_spi.write(0xFF) & 0x1F) != 0x05) {
halfpitch 0:e7f811d99fdb 370 _cs = 1;
halfpitch 0:e7f811d99fdb 371 _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 372 return 1;
halfpitch 0:e7f811d99fdb 373 }
halfpitch 0:e7f811d99fdb 374
halfpitch 0:e7f811d99fdb 375 // wait for write to finish
halfpitch 0:e7f811d99fdb 376 while(_spi.write(0xFF) == 0);
halfpitch 0:e7f811d99fdb 377
halfpitch 0:e7f811d99fdb 378 _cs = 1;
halfpitch 0:e7f811d99fdb 379 _spi.write(0xFF);
halfpitch 0:e7f811d99fdb 380 return 0;
halfpitch 0:e7f811d99fdb 381 }
halfpitch 0:e7f811d99fdb 382
halfpitch 0:e7f811d99fdb 383 static int ext_bits(char *data, int msb, int lsb) {
halfpitch 0:e7f811d99fdb 384 int bits = 0;
halfpitch 0:e7f811d99fdb 385 int size = 1 + msb - lsb;
halfpitch 0:e7f811d99fdb 386 for(int i=0; i<size; i++) {
halfpitch 0:e7f811d99fdb 387 int position = lsb + i;
halfpitch 0:e7f811d99fdb 388 int byte = 15 - (position >> 3);
halfpitch 0:e7f811d99fdb 389 int bit = position & 0x7;
halfpitch 0:e7f811d99fdb 390 int value = (data[byte] >> bit) & 1;
halfpitch 0:e7f811d99fdb 391 bits |= value << i;
halfpitch 0:e7f811d99fdb 392 }
halfpitch 0:e7f811d99fdb 393 return bits;
halfpitch 0:e7f811d99fdb 394 }
halfpitch 0:e7f811d99fdb 395
halfpitch 0:e7f811d99fdb 396 int SDFileSystem::_sd_sectors() {
halfpitch 0:e7f811d99fdb 397
halfpitch 0:e7f811d99fdb 398 // CMD9, Response R2 (R1 byte + 16-byte block read)
halfpitch 0:e7f811d99fdb 399 if(_cmdx(9, 0) != 0) {
halfpitch 0:e7f811d99fdb 400 fprintf(stderr, "Didn't get a response from the disk\n");
halfpitch 0:e7f811d99fdb 401 return 0;
halfpitch 0:e7f811d99fdb 402 }
halfpitch 0:e7f811d99fdb 403
halfpitch 0:e7f811d99fdb 404 char csd[16];
halfpitch 0:e7f811d99fdb 405 if(_read(csd, 16) != 0) {
halfpitch 0:e7f811d99fdb 406 fprintf(stderr, "Couldn't read csd response from disk\n");
halfpitch 0:e7f811d99fdb 407 return 0;
halfpitch 0:e7f811d99fdb 408 }
halfpitch 0:e7f811d99fdb 409
halfpitch 0:e7f811d99fdb 410 // csd_structure : csd[127:126]
halfpitch 0:e7f811d99fdb 411 // c_size : csd[73:62]
halfpitch 0:e7f811d99fdb 412 // c_size_mult : csd[49:47]
halfpitch 0:e7f811d99fdb 413 // read_bl_len : csd[83:80] - the *maximum* read block length
halfpitch 0:e7f811d99fdb 414
halfpitch 0:e7f811d99fdb 415 int csd_structure = ext_bits(csd, 127, 126);
halfpitch 0:e7f811d99fdb 416 int c_size = ext_bits(csd, 73, 62);
halfpitch 0:e7f811d99fdb 417 int c_size_mult = ext_bits(csd, 49, 47);
halfpitch 0:e7f811d99fdb 418 int read_bl_len = ext_bits(csd, 83, 80);
halfpitch 0:e7f811d99fdb 419
halfpitch 0:e7f811d99fdb 420 // printf("CSD_STRUCT = %d\n", csd_structure);
halfpitch 0:e7f811d99fdb 421
halfpitch 0:e7f811d99fdb 422 if(csd_structure != 0) {
halfpitch 0:e7f811d99fdb 423 fprintf(stderr, "This disk tastes funny! I only know about type 0 CSD structures\n");
halfpitch 0:e7f811d99fdb 424 return 0;
halfpitch 0:e7f811d99fdb 425 }
halfpitch 0:e7f811d99fdb 426
halfpitch 0:e7f811d99fdb 427 // memory capacity = BLOCKNR * BLOCK_LEN
halfpitch 0:e7f811d99fdb 428 // where
halfpitch 0:e7f811d99fdb 429 // BLOCKNR = (C_SIZE+1) * MULT
halfpitch 0:e7f811d99fdb 430 // MULT = 2^(C_SIZE_MULT+2) (C_SIZE_MULT < 8)
halfpitch 0:e7f811d99fdb 431 // BLOCK_LEN = 2^READ_BL_LEN, (READ_BL_LEN < 12)
halfpitch 0:e7f811d99fdb 432
halfpitch 0:e7f811d99fdb 433 int block_len = 1 << read_bl_len;
halfpitch 0:e7f811d99fdb 434 int mult = 1 << (c_size_mult + 2);
halfpitch 0:e7f811d99fdb 435 int blocknr = (c_size + 1) * mult;
halfpitch 0:e7f811d99fdb 436 int capacity = blocknr * block_len;
halfpitch 0:e7f811d99fdb 437
halfpitch 0:e7f811d99fdb 438 int blocks = capacity / 512;
halfpitch 0:e7f811d99fdb 439
halfpitch 0:e7f811d99fdb 440 return blocks;
halfpitch 0:e7f811d99fdb 441 }