X-CUBE-SPN1-20150128 example source code for one motor compiled under mbed. Tested OK on Nucleo F401. l6474.cpp is modified from original with defines in l6474_target_config.h to select the original behaviour (motor de-energised when halted), or new mode to continue powering with a (reduced) current in the coils (braking/position hold capability). On F401 avoid using mbed's InterruptIn on pins 10-15 (any port). Beware of other conflicts! L0 & F0 are included but untested.
IHM01A1/l6474.h@6:19c1b4a04c24, 2015-10-13 (annotated)
- Committer:
- gregeric
- Date:
- Tue Oct 13 10:46:01 2015 +0000
- Revision:
- 6:19c1b4a04c24
- Parent:
- 0:b9444a40a999
Ensure bridge is disabled before resetting the L6474.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
gregeric | 0:b9444a40a999 | 1 | /** |
gregeric | 0:b9444a40a999 | 2 | ****************************************************************************** |
gregeric | 0:b9444a40a999 | 3 | * @file l6474.h |
gregeric | 0:b9444a40a999 | 4 | * @author IPC Rennes |
gregeric | 0:b9444a40a999 | 5 | * @version V1.5.0 |
gregeric | 0:b9444a40a999 | 6 | * @date November 12, 2014 |
gregeric | 0:b9444a40a999 | 7 | * @brief Header for L6474 driver (fully integrated microstepping motor driver) |
gregeric | 0:b9444a40a999 | 8 | * @note (C) COPYRIGHT 2014 STMicroelectronics |
gregeric | 0:b9444a40a999 | 9 | ****************************************************************************** |
gregeric | 0:b9444a40a999 | 10 | * @attention |
gregeric | 0:b9444a40a999 | 11 | * |
gregeric | 0:b9444a40a999 | 12 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
gregeric | 0:b9444a40a999 | 13 | * |
gregeric | 0:b9444a40a999 | 14 | * Redistribution and use in source and binary forms, with or without modification, |
gregeric | 0:b9444a40a999 | 15 | * are permitted provided that the following conditions are met: |
gregeric | 0:b9444a40a999 | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
gregeric | 0:b9444a40a999 | 17 | * this list of conditions and the following disclaimer. |
gregeric | 0:b9444a40a999 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
gregeric | 0:b9444a40a999 | 19 | * this list of conditions and the following disclaimer in the documentation |
gregeric | 0:b9444a40a999 | 20 | * and/or other materials provided with the distribution. |
gregeric | 0:b9444a40a999 | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
gregeric | 0:b9444a40a999 | 22 | * may be used to endorse or promote products derived from this software |
gregeric | 0:b9444a40a999 | 23 | * without specific prior written permission. |
gregeric | 0:b9444a40a999 | 24 | * |
gregeric | 0:b9444a40a999 | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
gregeric | 0:b9444a40a999 | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
gregeric | 0:b9444a40a999 | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
gregeric | 0:b9444a40a999 | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
gregeric | 0:b9444a40a999 | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
gregeric | 0:b9444a40a999 | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
gregeric | 0:b9444a40a999 | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
gregeric | 0:b9444a40a999 | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
gregeric | 0:b9444a40a999 | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
gregeric | 0:b9444a40a999 | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
gregeric | 0:b9444a40a999 | 35 | * |
gregeric | 0:b9444a40a999 | 36 | ****************************************************************************** |
gregeric | 0:b9444a40a999 | 37 | */ |
gregeric | 0:b9444a40a999 | 38 | |
gregeric | 0:b9444a40a999 | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
gregeric | 0:b9444a40a999 | 40 | #ifndef __L6474_H |
gregeric | 0:b9444a40a999 | 41 | #define __L6474_H |
gregeric | 0:b9444a40a999 | 42 | |
gregeric | 0:b9444a40a999 | 43 | #ifdef __cplusplus |
gregeric | 0:b9444a40a999 | 44 | extern "C" { |
gregeric | 0:b9444a40a999 | 45 | #endif |
gregeric | 0:b9444a40a999 | 46 | |
gregeric | 0:b9444a40a999 | 47 | /* Includes ------------------------------------------------------------------*/ |
gregeric | 0:b9444a40a999 | 48 | #include "l6474_target_config.h" |
gregeric | 0:b9444a40a999 | 49 | #include "motor.h" |
gregeric | 0:b9444a40a999 | 50 | |
gregeric | 0:b9444a40a999 | 51 | /** @addtogroup BSP |
gregeric | 0:b9444a40a999 | 52 | * @{ |
gregeric | 0:b9444a40a999 | 53 | */ |
gregeric | 0:b9444a40a999 | 54 | |
gregeric | 0:b9444a40a999 | 55 | /** @addtogroup L6474 |
gregeric | 0:b9444a40a999 | 56 | * @{ |
gregeric | 0:b9444a40a999 | 57 | */ |
gregeric | 0:b9444a40a999 | 58 | |
gregeric | 0:b9444a40a999 | 59 | /* Exported Constants --------------------------------------------------------*/ |
gregeric | 0:b9444a40a999 | 60 | |
gregeric | 0:b9444a40a999 | 61 | /** @defgroup L6474_Exported_Constants |
gregeric | 0:b9444a40a999 | 62 | * @{ |
gregeric | 0:b9444a40a999 | 63 | */ |
gregeric | 0:b9444a40a999 | 64 | |
gregeric | 0:b9444a40a999 | 65 | /// Current FW version |
gregeric | 0:b9444a40a999 | 66 | #define L6474_FW_VERSION (5) |
gregeric | 0:b9444a40a999 | 67 | |
gregeric | 0:b9444a40a999 | 68 | /// L6474 max number of bytes of command & arguments to set a parameter |
gregeric | 0:b9444a40a999 | 69 | #define L6474_CMD_ARG_MAX_NB_BYTES (4) |
gregeric | 0:b9444a40a999 | 70 | |
gregeric | 0:b9444a40a999 | 71 | /// L6474 command + argument bytes number for GET_STATUS command |
gregeric | 0:b9444a40a999 | 72 | #define L6474_CMD_ARG_NB_BYTES_GET_STATUS (1) |
gregeric | 0:b9444a40a999 | 73 | |
gregeric | 0:b9444a40a999 | 74 | /// L6474 response bytes number |
gregeric | 0:b9444a40a999 | 75 | #define L6474_RSP_NB_BYTES_GET_STATUS (2) |
gregeric | 0:b9444a40a999 | 76 | |
gregeric | 0:b9444a40a999 | 77 | /// L6474 value mask for ABS_POS register |
gregeric | 0:b9444a40a999 | 78 | #define L6474_ABS_POS_VALUE_MASK ((uint32_t) 0x003FFFFF) |
gregeric | 0:b9444a40a999 | 79 | |
gregeric | 0:b9444a40a999 | 80 | /// L6474 sign bit mask for ABS_POS register |
gregeric | 0:b9444a40a999 | 81 | #define L6474_ABS_POS_SIGN_BIT_MASK ((uint32_t) 0x00200000) |
gregeric | 0:b9444a40a999 | 82 | |
gregeric | 0:b9444a40a999 | 83 | /** |
gregeric | 0:b9444a40a999 | 84 | * @} |
gregeric | 0:b9444a40a999 | 85 | */ |
gregeric | 0:b9444a40a999 | 86 | |
gregeric | 0:b9444a40a999 | 87 | /** @addtogroup L6474_Exported_Variables |
gregeric | 0:b9444a40a999 | 88 | * @{ |
gregeric | 0:b9444a40a999 | 89 | */ |
gregeric | 0:b9444a40a999 | 90 | extern motorDrv_t l6474Drv; |
gregeric | 0:b9444a40a999 | 91 | /** |
gregeric | 0:b9444a40a999 | 92 | * @} |
gregeric | 0:b9444a40a999 | 93 | */ |
gregeric | 0:b9444a40a999 | 94 | |
gregeric | 0:b9444a40a999 | 95 | /* Exported Types -------------------------------------------------------*/ |
gregeric | 0:b9444a40a999 | 96 | |
gregeric | 0:b9444a40a999 | 97 | /** @defgroup L6474_Exported_Types |
gregeric | 0:b9444a40a999 | 98 | * @{ |
gregeric | 0:b9444a40a999 | 99 | */ |
gregeric | 0:b9444a40a999 | 100 | |
gregeric | 0:b9444a40a999 | 101 | /** @defgroup L6474_Fast_Decay_Time_Options |
gregeric | 0:b9444a40a999 | 102 | * @{ |
gregeric | 0:b9444a40a999 | 103 | */ |
gregeric | 0:b9444a40a999 | 104 | ///TOFF_FAST values for T_FAST register |
gregeric | 0:b9444a40a999 | 105 | typedef enum { |
gregeric | 0:b9444a40a999 | 106 | L6474_TOFF_FAST_2us = ((uint8_t) 0x00 << 4), |
gregeric | 0:b9444a40a999 | 107 | L6474_TOFF_FAST_4us = ((uint8_t) 0x01 << 4), |
gregeric | 0:b9444a40a999 | 108 | L6474_TOFF_FAST_6us = ((uint8_t) 0x02 << 4), |
gregeric | 0:b9444a40a999 | 109 | L6474_TOFF_FAST_8us = ((uint8_t) 0x03 << 4), |
gregeric | 0:b9444a40a999 | 110 | L6474_TOFF_FAST_10us = ((uint8_t) 0x04 << 4), |
gregeric | 0:b9444a40a999 | 111 | L6474_TOFF_FAST_12us = ((uint8_t) 0x05 << 4), |
gregeric | 0:b9444a40a999 | 112 | L6474_TOFF_FAST_14us = ((uint8_t) 0x06 << 4), |
gregeric | 0:b9444a40a999 | 113 | L6474_TOFF_FAST_16us = ((uint8_t) 0x07 << 4), |
gregeric | 0:b9444a40a999 | 114 | L6474_TOFF_FAST_18us = ((uint8_t) 0x08 << 4), |
gregeric | 0:b9444a40a999 | 115 | L6474_TOFF_FAST_20us = ((uint8_t) 0x09 << 4), |
gregeric | 0:b9444a40a999 | 116 | L6474_TOFF_FAST_22us = ((uint8_t) 0x0A << 4), |
gregeric | 0:b9444a40a999 | 117 | L6474_TOFF_FAST_24us = ((uint8_t) 0x0B << 4), |
gregeric | 0:b9444a40a999 | 118 | L6474_TOFF_FAST_26us = ((uint8_t) 0x0C << 4), |
gregeric | 0:b9444a40a999 | 119 | L6474_TOFF_FAST_28us = ((uint8_t) 0x0D << 4), |
gregeric | 0:b9444a40a999 | 120 | L6474_TOFF_FAST_30us = ((uint8_t) 0x0E << 4), |
gregeric | 0:b9444a40a999 | 121 | L6474_TOFF_FAST_32us = ((uint8_t) 0x0F << 4) |
gregeric | 0:b9444a40a999 | 122 | } L6474_TOFF_FAST_t; |
gregeric | 0:b9444a40a999 | 123 | /** |
gregeric | 0:b9444a40a999 | 124 | * @} |
gregeric | 0:b9444a40a999 | 125 | */ |
gregeric | 0:b9444a40a999 | 126 | |
gregeric | 0:b9444a40a999 | 127 | /** @defgroup L6474_Fall_Step_Time_Options |
gregeric | 0:b9444a40a999 | 128 | * @{ |
gregeric | 0:b9444a40a999 | 129 | */ |
gregeric | 0:b9444a40a999 | 130 | ///FAST_STEP values for T_FAST register |
gregeric | 0:b9444a40a999 | 131 | typedef enum { |
gregeric | 0:b9444a40a999 | 132 | L6474_FAST_STEP_2us = ((uint8_t) 0x00), |
gregeric | 0:b9444a40a999 | 133 | L6474_FAST_STEP_4us = ((uint8_t) 0x01), |
gregeric | 0:b9444a40a999 | 134 | L6474_FAST_STEP_6us = ((uint8_t) 0x02), |
gregeric | 0:b9444a40a999 | 135 | L6474_FAST_STEP_8us = ((uint8_t) 0x03), |
gregeric | 0:b9444a40a999 | 136 | L6474_FAST_STEP_10us = ((uint8_t) 0x04), |
gregeric | 0:b9444a40a999 | 137 | L6474_FAST_STEP_12us = ((uint8_t) 0x05), |
gregeric | 0:b9444a40a999 | 138 | L6474_FAST_STEP_14us = ((uint8_t) 0x06), |
gregeric | 0:b9444a40a999 | 139 | L6474_FAST_STEP_16us = ((uint8_t) 0x07), |
gregeric | 0:b9444a40a999 | 140 | L6474_FAST_STEP_18us = ((uint8_t) 0x08), |
gregeric | 0:b9444a40a999 | 141 | L6474_FAST_STEP_20us = ((uint8_t) 0x09), |
gregeric | 0:b9444a40a999 | 142 | L6474_FAST_STEP_22us = ((uint8_t) 0x0A), |
gregeric | 0:b9444a40a999 | 143 | L6474_FAST_STEP_24us = ((uint8_t) 0x0B), |
gregeric | 0:b9444a40a999 | 144 | L6474_FAST_STEP_26us = ((uint8_t) 0x0C), |
gregeric | 0:b9444a40a999 | 145 | L6474_FAST_STEP_28us = ((uint8_t) 0x0D), |
gregeric | 0:b9444a40a999 | 146 | L6474_FAST_STEP_30us = ((uint8_t) 0x0E), |
gregeric | 0:b9444a40a999 | 147 | L6474_FAST_STEP_32us = ((uint8_t) 0x0F) |
gregeric | 0:b9444a40a999 | 148 | } L6474_FAST_STEP_t; |
gregeric | 0:b9444a40a999 | 149 | /** |
gregeric | 0:b9444a40a999 | 150 | * @} |
gregeric | 0:b9444a40a999 | 151 | */ |
gregeric | 0:b9444a40a999 | 152 | |
gregeric | 0:b9444a40a999 | 153 | /** @defgroup L6474_Overcurrent_Threshold_options |
gregeric | 0:b9444a40a999 | 154 | * @{ |
gregeric | 0:b9444a40a999 | 155 | */ |
gregeric | 0:b9444a40a999 | 156 | ///OCD_TH register |
gregeric | 0:b9444a40a999 | 157 | typedef enum { |
gregeric | 0:b9444a40a999 | 158 | L6474_OCD_TH_375mA = ((uint8_t) 0x00), |
gregeric | 0:b9444a40a999 | 159 | L6474_OCD_TH_750mA = ((uint8_t) 0x01), |
gregeric | 0:b9444a40a999 | 160 | L6474_OCD_TH_1125mA = ((uint8_t) 0x02), |
gregeric | 0:b9444a40a999 | 161 | L6474_OCD_TH_1500mA = ((uint8_t) 0x03), |
gregeric | 0:b9444a40a999 | 162 | L6474_OCD_TH_1875mA = ((uint8_t) 0x04), |
gregeric | 0:b9444a40a999 | 163 | L6474_OCD_TH_2250mA = ((uint8_t) 0x05), |
gregeric | 0:b9444a40a999 | 164 | L6474_OCD_TH_2625mA = ((uint8_t) 0x06), |
gregeric | 0:b9444a40a999 | 165 | L6474_OCD_TH_3000mA = ((uint8_t) 0x07), |
gregeric | 0:b9444a40a999 | 166 | L6474_OCD_TH_3375mA = ((uint8_t) 0x08), |
gregeric | 0:b9444a40a999 | 167 | L6474_OCD_TH_3750mA = ((uint8_t) 0x09), |
gregeric | 0:b9444a40a999 | 168 | L6474_OCD_TH_4125mA = ((uint8_t) 0x0A), |
gregeric | 0:b9444a40a999 | 169 | L6474_OCD_TH_4500mA = ((uint8_t) 0x0B), |
gregeric | 0:b9444a40a999 | 170 | L6474_OCD_TH_4875mA = ((uint8_t) 0x0C), |
gregeric | 0:b9444a40a999 | 171 | L6474_OCD_TH_5250mA = ((uint8_t) 0x0D), |
gregeric | 0:b9444a40a999 | 172 | L6474_OCD_TH_5625mA = ((uint8_t) 0x0E), |
gregeric | 0:b9444a40a999 | 173 | L6474_OCD_TH_6000mA = ((uint8_t) 0x0F) |
gregeric | 0:b9444a40a999 | 174 | } L6474_OCD_TH_t; |
gregeric | 0:b9444a40a999 | 175 | /** |
gregeric | 0:b9444a40a999 | 176 | * @} |
gregeric | 0:b9444a40a999 | 177 | */ |
gregeric | 0:b9444a40a999 | 178 | |
gregeric | 0:b9444a40a999 | 179 | /** @defgroup L6474_STEP_MODE_Register_Masks |
gregeric | 0:b9444a40a999 | 180 | * @{ |
gregeric | 0:b9444a40a999 | 181 | */ |
gregeric | 0:b9444a40a999 | 182 | ///STEP_MODE register |
gregeric | 0:b9444a40a999 | 183 | typedef enum { |
gregeric | 0:b9444a40a999 | 184 | L6474_STEP_MODE_STEP_SEL = ((uint8_t) 0x07), |
gregeric | 0:b9444a40a999 | 185 | L6474_STEP_MODE_SYNC_SEL = ((uint8_t) 0x70) |
gregeric | 0:b9444a40a999 | 186 | } L6474_STEP_MODE_Masks_t; |
gregeric | 0:b9444a40a999 | 187 | /** |
gregeric | 0:b9444a40a999 | 188 | * @} |
gregeric | 0:b9444a40a999 | 189 | */ |
gregeric | 0:b9444a40a999 | 190 | |
gregeric | 0:b9444a40a999 | 191 | /** @defgroup L6474_STEP_SEL_Options_For_STEP_MODE_Register |
gregeric | 0:b9444a40a999 | 192 | * @{ |
gregeric | 0:b9444a40a999 | 193 | */ |
gregeric | 0:b9444a40a999 | 194 | ///STEP_SEL field of STEP_MODE register |
gregeric | 0:b9444a40a999 | 195 | typedef enum { |
gregeric | 0:b9444a40a999 | 196 | L6474_STEP_SEL_1 = ((uint8_t) 0x08), //full step |
gregeric | 0:b9444a40a999 | 197 | L6474_STEP_SEL_1_2 = ((uint8_t) 0x09), //half step |
gregeric | 0:b9444a40a999 | 198 | L6474_STEP_SEL_1_4 = ((uint8_t) 0x0A), //1/4 microstep |
gregeric | 0:b9444a40a999 | 199 | L6474_STEP_SEL_1_8 = ((uint8_t) 0x0B), //1/8 microstep |
gregeric | 0:b9444a40a999 | 200 | L6474_STEP_SEL_1_16 = ((uint8_t) 0x0C) //1/16 microstep |
gregeric | 0:b9444a40a999 | 201 | } L6474_STEP_SEL_t; |
gregeric | 0:b9444a40a999 | 202 | /** |
gregeric | 0:b9444a40a999 | 203 | * @} |
gregeric | 0:b9444a40a999 | 204 | */ |
gregeric | 0:b9444a40a999 | 205 | |
gregeric | 0:b9444a40a999 | 206 | /** @defgroup L6474_SYNC_SEL_Options_For_STEP_MODE_Register |
gregeric | 0:b9444a40a999 | 207 | * @{ |
gregeric | 0:b9444a40a999 | 208 | */ |
gregeric | 0:b9444a40a999 | 209 | ///SYNC_SEL field of STEP_MODE register |
gregeric | 0:b9444a40a999 | 210 | typedef enum { |
gregeric | 0:b9444a40a999 | 211 | L6474_SYNC_SEL_1_2 = ((uint8_t) 0x80), |
gregeric | 0:b9444a40a999 | 212 | L6474_SYNC_SEL_1 = ((uint8_t) 0x90), |
gregeric | 0:b9444a40a999 | 213 | L6474_SYNC_SEL_2 = ((uint8_t) 0xA0), |
gregeric | 0:b9444a40a999 | 214 | L6474_SYNC_SEL_4 = ((uint8_t) 0xB0), |
gregeric | 0:b9444a40a999 | 215 | L6474_SYNC_SEL_8 = ((uint8_t) 0xC0), |
gregeric | 0:b9444a40a999 | 216 | L6474_SYNC_SEL_UNUSED = ((uint8_t) 0xD0) |
gregeric | 0:b9444a40a999 | 217 | } L6474_SYNC_SEL_t; |
gregeric | 0:b9444a40a999 | 218 | /** |
gregeric | 0:b9444a40a999 | 219 | * @} |
gregeric | 0:b9444a40a999 | 220 | */ |
gregeric | 0:b9444a40a999 | 221 | |
gregeric | 0:b9444a40a999 | 222 | /** @defgroup L6474_ALARM_EN_Register_Options |
gregeric | 0:b9444a40a999 | 223 | * @{ |
gregeric | 0:b9444a40a999 | 224 | */ |
gregeric | 0:b9444a40a999 | 225 | ///ALARM_EN register |
gregeric | 0:b9444a40a999 | 226 | typedef enum { |
gregeric | 0:b9444a40a999 | 227 | L6474_ALARM_EN_OVERCURRENT = ((uint8_t) 0x01), |
gregeric | 0:b9444a40a999 | 228 | L6474_ALARM_EN_THERMAL_SHUTDOWN = ((uint8_t) 0x02), |
gregeric | 0:b9444a40a999 | 229 | L6474_ALARM_EN_THERMAL_WARNING = ((uint8_t) 0x04), |
gregeric | 0:b9444a40a999 | 230 | L6474_ALARM_EN_UNDERVOLTAGE = ((uint8_t) 0x08), |
gregeric | 0:b9444a40a999 | 231 | L6474_ALARM_EN_SW_TURN_ON = ((uint8_t) 0x40), |
gregeric | 0:b9444a40a999 | 232 | L6474_ALARM_EN_WRONG_NPERF_CMD = ((uint8_t) 0x80) |
gregeric | 0:b9444a40a999 | 233 | } L6474_ALARM_EN_t; |
gregeric | 0:b9444a40a999 | 234 | /** |
gregeric | 0:b9444a40a999 | 235 | * @} |
gregeric | 0:b9444a40a999 | 236 | */ |
gregeric | 0:b9444a40a999 | 237 | |
gregeric | 0:b9444a40a999 | 238 | /** @defgroup L6474_CONFIG_Register_Masks |
gregeric | 0:b9444a40a999 | 239 | * @{ |
gregeric | 0:b9444a40a999 | 240 | */ |
gregeric | 0:b9444a40a999 | 241 | ///CONFIG register |
gregeric | 0:b9444a40a999 | 242 | typedef enum { |
gregeric | 0:b9444a40a999 | 243 | L6474_CONFIG_OSC_SEL = ((uint16_t) 0x0007), |
gregeric | 0:b9444a40a999 | 244 | L6474_CONFIG_EXT_CLK = ((uint16_t) 0x0008), |
gregeric | 0:b9444a40a999 | 245 | L6474_CONFIG_EN_TQREG = ((uint16_t) 0x0020), |
gregeric | 0:b9444a40a999 | 246 | L6474_CONFIG_OC_SD = ((uint16_t) 0x0080), |
gregeric | 0:b9444a40a999 | 247 | L6474_CONFIG_POW_SR = ((uint16_t) 0x0300), |
gregeric | 0:b9444a40a999 | 248 | L6474_CONFIG_TOFF = ((uint16_t) 0x7C00) |
gregeric | 0:b9444a40a999 | 249 | } L6474_CONFIG_Masks_t; |
gregeric | 0:b9444a40a999 | 250 | /** |
gregeric | 0:b9444a40a999 | 251 | * @} |
gregeric | 0:b9444a40a999 | 252 | */ |
gregeric | 0:b9444a40a999 | 253 | |
gregeric | 0:b9444a40a999 | 254 | /** @defgroup L6474_Clock_Source_Options_For_CONFIG_Register |
gregeric | 0:b9444a40a999 | 255 | * @{ |
gregeric | 0:b9444a40a999 | 256 | */ |
gregeric | 0:b9444a40a999 | 257 | ///Clock source option for CONFIG register |
gregeric | 0:b9444a40a999 | 258 | typedef enum { |
gregeric | 0:b9444a40a999 | 259 | L6474_CONFIG_INT_16MHZ = ((uint16_t) 0x0000), |
gregeric | 0:b9444a40a999 | 260 | L6474_CONFIG_INT_16MHZ_OSCOUT_2MHZ = ((uint16_t) 0x0008), |
gregeric | 0:b9444a40a999 | 261 | L6474_CONFIG_INT_16MHZ_OSCOUT_4MHZ = ((uint16_t) 0x0009), |
gregeric | 0:b9444a40a999 | 262 | L6474_CONFIG_INT_16MHZ_OSCOUT_8MHZ = ((uint16_t) 0x000A), |
gregeric | 0:b9444a40a999 | 263 | L6474_CONFIG_INT_16MHZ_OSCOUT_16MHZ = ((uint16_t) 0x000B), |
gregeric | 0:b9444a40a999 | 264 | L6474_CONFIG_EXT_8MHZ_XTAL_DRIVE = ((uint16_t) 0x0004), |
gregeric | 0:b9444a40a999 | 265 | L6474_CONFIG_EXT_16MHZ_XTAL_DRIVE = ((uint16_t) 0x0005), |
gregeric | 0:b9444a40a999 | 266 | L6474_CONFIG_EXT_24MHZ_XTAL_DRIVE = ((uint16_t) 0x0006), |
gregeric | 0:b9444a40a999 | 267 | L6474_CONFIG_EXT_32MHZ_XTAL_DRIVE = ((uint16_t) 0x0007), |
gregeric | 0:b9444a40a999 | 268 | L6474_CONFIG_EXT_8MHZ_OSCOUT_INVERT = ((uint16_t) 0x000C), |
gregeric | 0:b9444a40a999 | 269 | L6474_CONFIG_EXT_16MHZ_OSCOUT_INVERT = ((uint16_t) 0x000D), |
gregeric | 0:b9444a40a999 | 270 | L6474_CONFIG_EXT_24MHZ_OSCOUT_INVERT = ((uint16_t) 0x000E), |
gregeric | 0:b9444a40a999 | 271 | L6474_CONFIG_EXT_32MHZ_OSCOUT_INVERT = ((uint16_t) 0x000F) |
gregeric | 0:b9444a40a999 | 272 | } L6474_CONFIG_OSC_MGMT_t; |
gregeric | 0:b9444a40a999 | 273 | /** |
gregeric | 0:b9444a40a999 | 274 | * @} |
gregeric | 0:b9444a40a999 | 275 | */ |
gregeric | 0:b9444a40a999 | 276 | |
gregeric | 0:b9444a40a999 | 277 | /** @defgroup L6474_External_Torque_Regulation_Options_For_CONFIG_Register |
gregeric | 0:b9444a40a999 | 278 | * @{ |
gregeric | 0:b9444a40a999 | 279 | */ |
gregeric | 0:b9444a40a999 | 280 | ///External Torque regulation options for CONFIG register |
gregeric | 0:b9444a40a999 | 281 | typedef enum { |
gregeric | 0:b9444a40a999 | 282 | L6474_CONFIG_EN_TQREG_TVAL_USED = ((uint16_t) 0x0000), |
gregeric | 0:b9444a40a999 | 283 | L6474_CONFIG_EN_TQREG_ADC_OUT = ((uint16_t) 0x0020) |
gregeric | 0:b9444a40a999 | 284 | } L6474_CONFIG_EN_TQREG_t; |
gregeric | 0:b9444a40a999 | 285 | /** |
gregeric | 0:b9444a40a999 | 286 | * @} |
gregeric | 0:b9444a40a999 | 287 | */ |
gregeric | 0:b9444a40a999 | 288 | |
gregeric | 0:b9444a40a999 | 289 | /** @defgroup L6474_Over_Current_Shutdown_Options_For_CONFIG_Register |
gregeric | 0:b9444a40a999 | 290 | * @{ |
gregeric | 0:b9444a40a999 | 291 | */ |
gregeric | 0:b9444a40a999 | 292 | ///Over Current Shutdown options for CONFIG register |
gregeric | 0:b9444a40a999 | 293 | typedef enum { |
gregeric | 0:b9444a40a999 | 294 | L6474_CONFIG_OC_SD_DISABLE = ((uint16_t) 0x0000), |
gregeric | 0:b9444a40a999 | 295 | L6474_CONFIG_OC_SD_ENABLE = ((uint16_t) 0x0080) |
gregeric | 0:b9444a40a999 | 296 | } L6474_CONFIG_OC_SD_t; |
gregeric | 0:b9444a40a999 | 297 | /** |
gregeric | 0:b9444a40a999 | 298 | * @} |
gregeric | 0:b9444a40a999 | 299 | */ |
gregeric | 0:b9444a40a999 | 300 | |
gregeric | 0:b9444a40a999 | 301 | /** @defgroup L6474_Power_Bridge_Output_Slew_Rate_Options |
gregeric | 0:b9444a40a999 | 302 | * @{ |
gregeric | 0:b9444a40a999 | 303 | */ |
gregeric | 0:b9444a40a999 | 304 | /// POW_SR values for CONFIG register |
gregeric | 0:b9444a40a999 | 305 | typedef enum { |
gregeric | 0:b9444a40a999 | 306 | L6474_CONFIG_SR_320V_us =((uint16_t)0x0000), |
gregeric | 0:b9444a40a999 | 307 | L6474_CONFIG_SR_075V_us =((uint16_t)0x0100), |
gregeric | 0:b9444a40a999 | 308 | L6474_CONFIG_SR_110V_us =((uint16_t)0x0200), |
gregeric | 0:b9444a40a999 | 309 | L6474_CONFIG_SR_260V_us =((uint16_t)0x0300) |
gregeric | 0:b9444a40a999 | 310 | } L6474_CONFIG_POW_SR_t; |
gregeric | 0:b9444a40a999 | 311 | /** |
gregeric | 0:b9444a40a999 | 312 | * @} |
gregeric | 0:b9444a40a999 | 313 | */ |
gregeric | 0:b9444a40a999 | 314 | |
gregeric | 0:b9444a40a999 | 315 | /** @defgroup L6474_Off_Time_Options |
gregeric | 0:b9444a40a999 | 316 | * @{ |
gregeric | 0:b9444a40a999 | 317 | */ |
gregeric | 0:b9444a40a999 | 318 | /// TOFF values for CONFIG register |
gregeric | 0:b9444a40a999 | 319 | typedef enum { |
gregeric | 0:b9444a40a999 | 320 | L6474_CONFIG_TOFF_004us = (((uint16_t) 0x01) << 10), |
gregeric | 0:b9444a40a999 | 321 | L6474_CONFIG_TOFF_008us = (((uint16_t) 0x02) << 10), |
gregeric | 0:b9444a40a999 | 322 | L6474_CONFIG_TOFF_012us = (((uint16_t) 0x03) << 10), |
gregeric | 0:b9444a40a999 | 323 | L6474_CONFIG_TOFF_016us = (((uint16_t) 0x04) << 10), |
gregeric | 0:b9444a40a999 | 324 | L6474_CONFIG_TOFF_020us = (((uint16_t) 0x05) << 10), |
gregeric | 0:b9444a40a999 | 325 | L6474_CONFIG_TOFF_024us = (((uint16_t) 0x06) << 10), |
gregeric | 0:b9444a40a999 | 326 | L6474_CONFIG_TOFF_028us = (((uint16_t) 0x07) << 10), |
gregeric | 0:b9444a40a999 | 327 | L6474_CONFIG_TOFF_032us = (((uint16_t) 0x08) << 10), |
gregeric | 0:b9444a40a999 | 328 | L6474_CONFIG_TOFF_036us = (((uint16_t) 0x09) << 10), |
gregeric | 0:b9444a40a999 | 329 | L6474_CONFIG_TOFF_040us = (((uint16_t) 0x0A) << 10), |
gregeric | 0:b9444a40a999 | 330 | L6474_CONFIG_TOFF_044us = (((uint16_t) 0x0B) << 10), |
gregeric | 0:b9444a40a999 | 331 | L6474_CONFIG_TOFF_048us = (((uint16_t) 0x0C) << 10), |
gregeric | 0:b9444a40a999 | 332 | L6474_CONFIG_TOFF_052us = (((uint16_t) 0x0D) << 10), |
gregeric | 0:b9444a40a999 | 333 | L6474_CONFIG_TOFF_056us = (((uint16_t) 0x0E) << 10), |
gregeric | 0:b9444a40a999 | 334 | L6474_CONFIG_TOFF_060us = (((uint16_t) 0x0F) << 10), |
gregeric | 0:b9444a40a999 | 335 | L6474_CONFIG_TOFF_064us = (((uint16_t) 0x10) << 10), |
gregeric | 0:b9444a40a999 | 336 | L6474_CONFIG_TOFF_068us = (((uint16_t) 0x11) << 10), |
gregeric | 0:b9444a40a999 | 337 | L6474_CONFIG_TOFF_072us = (((uint16_t) 0x12) << 10), |
gregeric | 0:b9444a40a999 | 338 | L6474_CONFIG_TOFF_076us = (((uint16_t) 0x13) << 10), |
gregeric | 0:b9444a40a999 | 339 | L6474_CONFIG_TOFF_080us = (((uint16_t) 0x14) << 10), |
gregeric | 0:b9444a40a999 | 340 | L6474_CONFIG_TOFF_084us = (((uint16_t) 0x15) << 10), |
gregeric | 0:b9444a40a999 | 341 | L6474_CONFIG_TOFF_088us = (((uint16_t) 0x16) << 10), |
gregeric | 0:b9444a40a999 | 342 | L6474_CONFIG_TOFF_092us = (((uint16_t) 0x17) << 10), |
gregeric | 0:b9444a40a999 | 343 | L6474_CONFIG_TOFF_096us = (((uint16_t) 0x18) << 10), |
gregeric | 0:b9444a40a999 | 344 | L6474_CONFIG_TOFF_100us = (((uint16_t) 0x19) << 10), |
gregeric | 0:b9444a40a999 | 345 | L6474_CONFIG_TOFF_104us = (((uint16_t) 0x1A) << 10), |
gregeric | 0:b9444a40a999 | 346 | L6474_CONFIG_TOFF_108us = (((uint16_t) 0x1B) << 10), |
gregeric | 0:b9444a40a999 | 347 | L6474_CONFIG_TOFF_112us = (((uint16_t) 0x1C) << 10), |
gregeric | 0:b9444a40a999 | 348 | L6474_CONFIG_TOFF_116us = (((uint16_t) 0x1D) << 10), |
gregeric | 0:b9444a40a999 | 349 | L6474_CONFIG_TOFF_120us = (((uint16_t) 0x1E) << 10), |
gregeric | 0:b9444a40a999 | 350 | L6474_CONFIG_TOFF_124us = (((uint16_t) 0x1F) << 10) |
gregeric | 0:b9444a40a999 | 351 | } L6474_CONFIG_TOFF_t; |
gregeric | 0:b9444a40a999 | 352 | /** |
gregeric | 0:b9444a40a999 | 353 | * @} |
gregeric | 0:b9444a40a999 | 354 | */ |
gregeric | 0:b9444a40a999 | 355 | |
gregeric | 0:b9444a40a999 | 356 | /** @defgroup L6474_STATUS_Register_Bit_Masks |
gregeric | 0:b9444a40a999 | 357 | * @{ |
gregeric | 0:b9444a40a999 | 358 | */ |
gregeric | 0:b9444a40a999 | 359 | ///STATUS Register Bit Masks |
gregeric | 0:b9444a40a999 | 360 | typedef enum { |
gregeric | 0:b9444a40a999 | 361 | L6474_STATUS_HIZ = (((uint16_t) 0x0001)), |
gregeric | 0:b9444a40a999 | 362 | L6474_STATUS_DIR = (((uint16_t) 0x0010)), |
gregeric | 0:b9444a40a999 | 363 | L6474_STATUS_NOTPERF_CMD = (((uint16_t) 0x0080)), |
gregeric | 0:b9444a40a999 | 364 | L6474_STATUS_WRONG_CMD = (((uint16_t) 0x0100)), |
gregeric | 0:b9444a40a999 | 365 | L6474_STATUS_UVLO = (((uint16_t) 0x0200)), |
gregeric | 0:b9444a40a999 | 366 | L6474_STATUS_TH_WRN = (((uint16_t) 0x0400)), |
gregeric | 0:b9444a40a999 | 367 | L6474_STATUS_TH_SD = (((uint16_t) 0x0800)), |
gregeric | 0:b9444a40a999 | 368 | L6474_STATUS_OCD = (((uint16_t) 0x1000)) |
gregeric | 0:b9444a40a999 | 369 | } L6474_STATUS_Masks_t; |
gregeric | 0:b9444a40a999 | 370 | /** |
gregeric | 0:b9444a40a999 | 371 | * @} |
gregeric | 0:b9444a40a999 | 372 | */ |
gregeric | 0:b9444a40a999 | 373 | |
gregeric | 0:b9444a40a999 | 374 | /** @defgroup L6474_Direction_Field_Of_STATUS_Register |
gregeric | 0:b9444a40a999 | 375 | * @{ |
gregeric | 0:b9444a40a999 | 376 | */ |
gregeric | 0:b9444a40a999 | 377 | ///Diretion field of STATUS register |
gregeric | 0:b9444a40a999 | 378 | typedef enum { |
gregeric | 0:b9444a40a999 | 379 | L6474_STATUS_DIR_FORWARD = (((uint16_t) 0x0001) << 4), |
gregeric | 0:b9444a40a999 | 380 | L6474_STATUS_DIR_REVERSE = (((uint16_t) 0x0000) << 4) |
gregeric | 0:b9444a40a999 | 381 | } L6474_STATUS_DIR_t; |
gregeric | 0:b9444a40a999 | 382 | /** |
gregeric | 0:b9444a40a999 | 383 | * @} |
gregeric | 0:b9444a40a999 | 384 | */ |
gregeric | 0:b9444a40a999 | 385 | |
gregeric | 0:b9444a40a999 | 386 | /** @defgroup L6474_Internal_Register_Addresses |
gregeric | 0:b9444a40a999 | 387 | * @{ |
gregeric | 0:b9444a40a999 | 388 | */ |
gregeric | 0:b9444a40a999 | 389 | /// Internal L6474 register addresses |
gregeric | 0:b9444a40a999 | 390 | typedef enum { |
gregeric | 0:b9444a40a999 | 391 | L6474_ABS_POS = ((uint8_t) 0x01), |
gregeric | 0:b9444a40a999 | 392 | L6474_EL_POS = ((uint8_t) 0x02), |
gregeric | 0:b9444a40a999 | 393 | L6474_MARK = ((uint8_t) 0x03), |
gregeric | 0:b9444a40a999 | 394 | L6474_RESERVED_REG01 = ((uint8_t) 0x04), |
gregeric | 0:b9444a40a999 | 395 | L6474_RESERVED_REG02 = ((uint8_t) 0x05), |
gregeric | 0:b9444a40a999 | 396 | L6474_RESERVED_REG03 = ((uint8_t) 0x06), |
gregeric | 0:b9444a40a999 | 397 | L6474_RESERVED_REG04 = ((uint8_t) 0x07), |
gregeric | 0:b9444a40a999 | 398 | L6474_RESERVED_REG05 = ((uint8_t) 0x08), |
gregeric | 0:b9444a40a999 | 399 | L6474_RESERVED_REG06 = ((uint8_t) 0x15), |
gregeric | 0:b9444a40a999 | 400 | L6474_TVAL = ((uint8_t) 0x09), |
gregeric | 0:b9444a40a999 | 401 | L6474_RESERVED_REG07 = ((uint8_t) 0x0A), |
gregeric | 0:b9444a40a999 | 402 | L6474_RESERVED_REG08 = ((uint8_t) 0x0B), |
gregeric | 0:b9444a40a999 | 403 | L6474_RESERVED_REG09 = ((uint8_t) 0x0C), |
gregeric | 0:b9444a40a999 | 404 | L6474_RESERVED_REG10 = ((uint8_t) 0x0D), |
gregeric | 0:b9444a40a999 | 405 | L6474_T_FAST = ((uint8_t) 0x0E), |
gregeric | 0:b9444a40a999 | 406 | L6474_TON_MIN = ((uint8_t) 0x0F), |
gregeric | 0:b9444a40a999 | 407 | L6474_TOFF_MIN = ((uint8_t) 0x10), |
gregeric | 0:b9444a40a999 | 408 | L6474_RESERVED_REG11 = ((uint8_t) 0x11), |
gregeric | 0:b9444a40a999 | 409 | L6474_ADC_OUT = ((uint8_t) 0x12), |
gregeric | 0:b9444a40a999 | 410 | L6474_OCD_TH = ((uint8_t) 0x13), |
gregeric | 0:b9444a40a999 | 411 | L6474_RESERVED_REG12 = ((uint8_t) 0x14), |
gregeric | 0:b9444a40a999 | 412 | L6474_STEP_MODE = ((uint8_t) 0x16), |
gregeric | 0:b9444a40a999 | 413 | L6474_ALARM_EN = ((uint8_t) 0x17), |
gregeric | 0:b9444a40a999 | 414 | L6474_CONFIG = ((uint8_t) 0x18), |
gregeric | 0:b9444a40a999 | 415 | L6474_STATUS = ((uint8_t) 0x19), |
gregeric | 0:b9444a40a999 | 416 | L6474_RESERVED_REG13 = ((uint8_t) 0x1A), |
gregeric | 0:b9444a40a999 | 417 | L6474_RESERVED_REG14 = ((uint8_t) 0x1B), |
gregeric | 0:b9444a40a999 | 418 | L6474_INEXISTENT_REG = ((uint8_t) 0x1F) |
gregeric | 0:b9444a40a999 | 419 | } L6474_Registers_t; |
gregeric | 0:b9444a40a999 | 420 | /** |
gregeric | 0:b9444a40a999 | 421 | * @} |
gregeric | 0:b9444a40a999 | 422 | */ |
gregeric | 0:b9444a40a999 | 423 | |
gregeric | 0:b9444a40a999 | 424 | /** @defgroup L6474_Command_Set |
gregeric | 0:b9444a40a999 | 425 | * @{ |
gregeric | 0:b9444a40a999 | 426 | */ |
gregeric | 0:b9444a40a999 | 427 | /// L6474 command set |
gregeric | 0:b9444a40a999 | 428 | typedef enum { |
gregeric | 0:b9444a40a999 | 429 | L6474_NOP = ((uint8_t) 0x00), |
gregeric | 0:b9444a40a999 | 430 | L6474_SET_PARAM = ((uint8_t) 0x00), |
gregeric | 0:b9444a40a999 | 431 | L6474_GET_PARAM = ((uint8_t) 0x20), |
gregeric | 0:b9444a40a999 | 432 | L6474_ENABLE = ((uint8_t) 0xB8), |
gregeric | 0:b9444a40a999 | 433 | L6474_DISABLE = ((uint8_t) 0xA8), |
gregeric | 0:b9444a40a999 | 434 | L6474_GET_STATUS = ((uint8_t) 0xD0), |
gregeric | 0:b9444a40a999 | 435 | L6474_RESERVED_CMD1 = ((uint8_t) 0xEB), |
gregeric | 0:b9444a40a999 | 436 | L6474_RESERVED_CMD2 = ((uint8_t) 0xF8) |
gregeric | 0:b9444a40a999 | 437 | } L6474_Commands_t; |
gregeric | 0:b9444a40a999 | 438 | /** |
gregeric | 0:b9444a40a999 | 439 | * @} |
gregeric | 0:b9444a40a999 | 440 | */ |
gregeric | 0:b9444a40a999 | 441 | |
gregeric | 0:b9444a40a999 | 442 | |
gregeric | 0:b9444a40a999 | 443 | /** @defgroup Device_Commands |
gregeric | 0:b9444a40a999 | 444 | * @{ |
gregeric | 0:b9444a40a999 | 445 | */ |
gregeric | 0:b9444a40a999 | 446 | /// Device commands |
gregeric | 0:b9444a40a999 | 447 | typedef enum { |
gregeric | 0:b9444a40a999 | 448 | RUN_CMD, |
gregeric | 0:b9444a40a999 | 449 | MOVE_CMD, |
gregeric | 0:b9444a40a999 | 450 | SOFT_STOP_CMD, |
gregeric | 0:b9444a40a999 | 451 | NO_CMD |
gregeric | 0:b9444a40a999 | 452 | } deviceCommand_t; |
gregeric | 0:b9444a40a999 | 453 | /** |
gregeric | 0:b9444a40a999 | 454 | * @} |
gregeric | 0:b9444a40a999 | 455 | */ |
gregeric | 0:b9444a40a999 | 456 | |
gregeric | 0:b9444a40a999 | 457 | |
gregeric | 0:b9444a40a999 | 458 | /** @defgroup Device_Parameters |
gregeric | 0:b9444a40a999 | 459 | * @{ |
gregeric | 0:b9444a40a999 | 460 | */ |
gregeric | 0:b9444a40a999 | 461 | |
gregeric | 0:b9444a40a999 | 462 | /// Device Parameters Structure Type |
gregeric | 0:b9444a40a999 | 463 | typedef struct { |
gregeric | 0:b9444a40a999 | 464 | /// accumulator used to store speed increase smaller than 1 pps |
gregeric | 0:b9444a40a999 | 465 | volatile uint32_t accu; |
gregeric | 0:b9444a40a999 | 466 | /// Position in steps at the start of the goto or move commands |
gregeric | 0:b9444a40a999 | 467 | volatile int32_t currentPosition; |
gregeric | 0:b9444a40a999 | 468 | /// position in step at the end of the accelerating phase |
gregeric | 0:b9444a40a999 | 469 | volatile uint32_t endAccPos; |
gregeric | 0:b9444a40a999 | 470 | /// nb steps performed from the beggining of the goto or the move command |
gregeric | 0:b9444a40a999 | 471 | volatile uint32_t relativePos; |
gregeric | 0:b9444a40a999 | 472 | /// position in step at the start of the decelerating phase |
gregeric | 0:b9444a40a999 | 473 | volatile uint32_t startDecPos; |
gregeric | 0:b9444a40a999 | 474 | /// nb steps to perform for the goto or move commands |
gregeric | 0:b9444a40a999 | 475 | volatile uint32_t stepsToTake; |
gregeric | 0:b9444a40a999 | 476 | |
gregeric | 0:b9444a40a999 | 477 | /// acceleration in pps^2 |
gregeric | 0:b9444a40a999 | 478 | volatile uint16_t acceleration; |
gregeric | 0:b9444a40a999 | 479 | /// deceleration in pps^2 |
gregeric | 0:b9444a40a999 | 480 | volatile uint16_t deceleration; |
gregeric | 0:b9444a40a999 | 481 | /// max speed in pps (speed use for goto or move command) |
gregeric | 0:b9444a40a999 | 482 | volatile uint16_t maxSpeed; |
gregeric | 0:b9444a40a999 | 483 | /// min speed in pps |
gregeric | 0:b9444a40a999 | 484 | volatile uint16_t minSpeed; |
gregeric | 0:b9444a40a999 | 485 | /// current speed in pps |
gregeric | 0:b9444a40a999 | 486 | volatile uint16_t speed; |
gregeric | 0:b9444a40a999 | 487 | |
gregeric | 0:b9444a40a999 | 488 | /// command under execution |
gregeric | 0:b9444a40a999 | 489 | volatile deviceCommand_t commandExecuted; |
gregeric | 0:b9444a40a999 | 490 | /// FORWARD or BACKWARD direction |
gregeric | 0:b9444a40a999 | 491 | volatile motorDir_t direction; |
gregeric | 0:b9444a40a999 | 492 | /// Current State of the device |
gregeric | 0:b9444a40a999 | 493 | volatile motorState_t motionState; |
gregeric | 0:b9444a40a999 | 494 | }deviceParams_t; |
gregeric | 0:b9444a40a999 | 495 | |
gregeric | 0:b9444a40a999 | 496 | /** |
gregeric | 0:b9444a40a999 | 497 | * @} |
gregeric | 0:b9444a40a999 | 498 | */ |
gregeric | 0:b9444a40a999 | 499 | |
gregeric | 0:b9444a40a999 | 500 | /** |
gregeric | 0:b9444a40a999 | 501 | * @} |
gregeric | 0:b9444a40a999 | 502 | */ |
gregeric | 0:b9444a40a999 | 503 | |
gregeric | 0:b9444a40a999 | 504 | /* Exported functions --------------------------------------------------------*/ |
gregeric | 0:b9444a40a999 | 505 | |
gregeric | 0:b9444a40a999 | 506 | |
gregeric | 0:b9444a40a999 | 507 | /** @defgroup L6474_Exported_Functions |
gregeric | 0:b9444a40a999 | 508 | * @{ |
gregeric | 0:b9444a40a999 | 509 | */ |
gregeric | 0:b9444a40a999 | 510 | |
gregeric | 0:b9444a40a999 | 511 | /** @defgroup Device_Control_Functions |
gregeric | 0:b9444a40a999 | 512 | * @{ |
gregeric | 0:b9444a40a999 | 513 | */ |
gregeric | 0:b9444a40a999 | 514 | void L6474_AttachErrorHandler(void (*callback)(uint16_t)); //Attach a user callback to the error handler |
gregeric | 0:b9444a40a999 | 515 | void L6474_AttachFlagInterrupt(void (*callback)(void)); //Attach a user callback to the flag Interrupt |
gregeric | 0:b9444a40a999 | 516 | void L6474_Init(uint8_t nbDevices); //Start the L6474 library |
gregeric | 0:b9444a40a999 | 517 | uint16_t L6474_GetAcceleration(uint8_t deviceId); //Return the acceleration in pps^2 |
gregeric | 0:b9444a40a999 | 518 | uint16_t L6474_GetCurrentSpeed(uint8_t deviceId); //Return the current speed in pps |
gregeric | 0:b9444a40a999 | 519 | uint16_t L6474_GetDeceleration(uint8_t deviceId); //Return the deceleration in pps^2 |
gregeric | 0:b9444a40a999 | 520 | motorState_t L6474_GetDeviceState(uint8_t deviceId); //Return the device state |
gregeric | 0:b9444a40a999 | 521 | motorDrv_t* L6474_GetMotorHandle(void); //Return handle of the motor driver handle |
gregeric | 0:b9444a40a999 | 522 | uint8_t L6474_GetFwVersion(void); //Return the FW version |
gregeric | 0:b9444a40a999 | 523 | int32_t L6474_GetMark(uint8_t deviceId); //Return the mark position |
gregeric | 0:b9444a40a999 | 524 | uint16_t L6474_GetMaxSpeed(uint8_t deviceId); //Return the max speed in pps |
gregeric | 0:b9444a40a999 | 525 | uint16_t L6474_GetMinSpeed(uint8_t deviceId); //Return the min speed in pps |
gregeric | 0:b9444a40a999 | 526 | int32_t L6474_GetPosition(uint8_t deviceId); //Return the ABS_POSITION (32b signed) |
gregeric | 0:b9444a40a999 | 527 | void L6474_GoHome(uint8_t deviceId); //Move to the home position |
gregeric | 0:b9444a40a999 | 528 | void L6474_GoMark(uint8_t deviceId); //Move to the Mark position |
gregeric | 0:b9444a40a999 | 529 | void L6474_GoTo(uint8_t deviceId, int32_t targetPosition); //Go to the specified position |
gregeric | 0:b9444a40a999 | 530 | void L6474_HardStop(uint8_t deviceId); //Stop the motor and disable the power bridge |
gregeric | 0:b9444a40a999 | 531 | void L6474_Move(uint8_t deviceId, //Move the motor of the specified number of steps |
gregeric | 0:b9444a40a999 | 532 | motorDir_t direction, |
gregeric | 0:b9444a40a999 | 533 | uint32_t stepCount); |
gregeric | 0:b9444a40a999 | 534 | uint16_t L6474_ReadId(void); //Read Id to get driver instance |
gregeric | 0:b9444a40a999 | 535 | void L6474_ResetAllDevices(void); //Reset all L6474 devices |
gregeric | 0:b9444a40a999 | 536 | void L6474_Run(uint8_t deviceId, motorDir_t direction); //Run the motor |
gregeric | 0:b9444a40a999 | 537 | bool L6474_SetAcceleration(uint8_t deviceId,uint16_t newAcc); //Set the acceleration in pps^2 |
gregeric | 0:b9444a40a999 | 538 | bool L6474_SetDeceleration(uint8_t deviceId,uint16_t newDec); //Set the deceleration in pps^2 |
gregeric | 0:b9444a40a999 | 539 | void L6474_SetHome(uint8_t deviceId); //Set current position to be the home position |
gregeric | 0:b9444a40a999 | 540 | void L6474_SetMark(uint8_t deviceId); //Set current position to be the Markposition |
gregeric | 0:b9444a40a999 | 541 | bool L6474_SetMaxSpeed(uint8_t deviceId,uint16_t newMaxSpeed); //Set the max speed in pps |
gregeric | 0:b9444a40a999 | 542 | bool L6474_SetMinSpeed(uint8_t deviceId,uint16_t newMinSpeed); //Set the min speed in pps |
gregeric | 0:b9444a40a999 | 543 | bool L6474_SoftStop(uint8_t deviceId); //Progressively stops the motor |
gregeric | 0:b9444a40a999 | 544 | void L6474_WaitWhileActive(uint8_t deviceId); //Wait for the device state becomes Inactive |
gregeric | 0:b9444a40a999 | 545 | /** |
gregeric | 0:b9444a40a999 | 546 | * @} |
gregeric | 0:b9444a40a999 | 547 | */ |
gregeric | 0:b9444a40a999 | 548 | |
gregeric | 0:b9444a40a999 | 549 | /** @defgroup L6474_Control_Functions |
gregeric | 0:b9444a40a999 | 550 | * @{ |
gregeric | 0:b9444a40a999 | 551 | */ |
gregeric | 0:b9444a40a999 | 552 | void L6474_CmdDisable(uint8_t deviceId); //Send the L6474_DISABLE command |
gregeric | 0:b9444a40a999 | 553 | void L6474_CmdEnable(uint8_t deviceId); //Send the L6474_ENABLE command |
gregeric | 0:b9444a40a999 | 554 | uint32_t L6474_CmdGetParam(uint8_t deviceId, //Send the L6474_GET_PARAM command |
gregeric | 0:b9444a40a999 | 555 | uint32_t param); |
gregeric | 0:b9444a40a999 | 556 | uint16_t L6474_CmdGetStatus(uint8_t deviceId); // Send the L6474_GET_STATUS command |
gregeric | 0:b9444a40a999 | 557 | void L6474_CmdNop(uint8_t deviceId); //Send the L6474_NOP command |
gregeric | 0:b9444a40a999 | 558 | void L6474_CmdSetParam(uint8_t deviceId, //Send the L6474_SET_PARAM command |
gregeric | 0:b9444a40a999 | 559 | uint32_t param, |
gregeric | 0:b9444a40a999 | 560 | uint32_t value); |
gregeric | 0:b9444a40a999 | 561 | uint16_t L6474_ReadStatusRegister(uint8_t deviceId); // Read the L6474_STATUS register without |
gregeric | 0:b9444a40a999 | 562 | // clearing the flags |
gregeric | 0:b9444a40a999 | 563 | void L6474_Reset(void); //Set the L6474 reset pin |
gregeric | 0:b9444a40a999 | 564 | void L6474_ReleaseReset(void); //Release the L6474 reset pin |
gregeric | 0:b9444a40a999 | 565 | void L6474_SelectStepMode(uint8_t deviceId, // Step mode selection |
gregeric | 0:b9444a40a999 | 566 | motorStepMode_t stepMod); |
gregeric | 0:b9444a40a999 | 567 | void L6474_SetDirection(uint8_t deviceId, //Set the L6474 direction pin |
gregeric | 0:b9444a40a999 | 568 | motorDir_t direction); |
gregeric | 0:b9444a40a999 | 569 | /** |
gregeric | 0:b9444a40a999 | 570 | * @} |
gregeric | 0:b9444a40a999 | 571 | */ |
gregeric | 0:b9444a40a999 | 572 | |
gregeric | 0:b9444a40a999 | 573 | /** @defgroup MotorControl_Board_Linked_Functions |
gregeric | 0:b9444a40a999 | 574 | * @{ |
gregeric | 0:b9444a40a999 | 575 | */ |
gregeric | 0:b9444a40a999 | 576 | ///Delay of the requested number of milliseconds |
gregeric | 0:b9444a40a999 | 577 | void BSP_MotorControlBoard_Delay(uint32_t delay); |
gregeric | 0:b9444a40a999 | 578 | ///Enable Irq |
gregeric | 0:b9444a40a999 | 579 | void BSP_MotorControlBoard_EnableIrq(void); |
gregeric | 0:b9444a40a999 | 580 | ///Disable Irq |
gregeric | 0:b9444a40a999 | 581 | void BSP_MotorControlBoard_DisableIrq(void); |
gregeric | 0:b9444a40a999 | 582 | ///Initialise GPIOs used for L6474s |
gregeric | 0:b9444a40a999 | 583 | void BSP_MotorControlBoard_GpioInit(uint8_t nbDevices); |
gregeric | 0:b9444a40a999 | 584 | ///Set PWM1 frequency and start it |
gregeric | 0:b9444a40a999 | 585 | void BSP_MotorControlBoard_Pwm1SetFreq(uint16_t newFreq); |
gregeric | 0:b9444a40a999 | 586 | ///Set PWM2 frequency and start it |
gregeric | 0:b9444a40a999 | 587 | void BSP_MotorControlBoard_Pwm2SetFreq(uint16_t newFreq); |
gregeric | 0:b9444a40a999 | 588 | ///Set PWM3 frequency and start it |
gregeric | 0:b9444a40a999 | 589 | void BSP_MotorControlBoard_Pwm3SetFreq(uint16_t newFreq); |
gregeric | 0:b9444a40a999 | 590 | ///Init the PWM of the specified device |
gregeric | 0:b9444a40a999 | 591 | void BSP_MotorControlBoard_PwmInit(uint8_t deviceId); |
gregeric | 0:b9444a40a999 | 592 | ///Stop the PWM of the specified device |
gregeric | 0:b9444a40a999 | 593 | void BSP_MotorControlBoard_PwmStop(uint8_t deviceId); |
gregeric | 0:b9444a40a999 | 594 | ///Reset the L6474 reset pin |
gregeric | 0:b9444a40a999 | 595 | void BSP_MotorControlBoard_ReleaseReset(void); |
gregeric | 0:b9444a40a999 | 596 | ///Set the L6474 reset pin |
gregeric | 0:b9444a40a999 | 597 | void BSP_MotorControlBoard_Reset(void); |
gregeric | 0:b9444a40a999 | 598 | ///Set direction GPIO |
gregeric | 0:b9444a40a999 | 599 | void BSP_MotorControlBoard_SetDirectionGpio(uint8_t deviceId, uint8_t gpioState); |
gregeric | 0:b9444a40a999 | 600 | ///Initialise the SPI used for L6474s |
gregeric | 0:b9444a40a999 | 601 | uint8_t BSP_MotorControlBoard_SpiInit(void); |
gregeric | 0:b9444a40a999 | 602 | ///Write bytes to the L6474s via SPI |
gregeric | 0:b9444a40a999 | 603 | uint8_t BSP_MotorControlBoard_SpiWriteBytes(uint8_t *pByteToTransmit, uint8_t *pReceivedByte, uint8_t nbDevices); |
gregeric | 0:b9444a40a999 | 604 | /** |
gregeric | 0:b9444a40a999 | 605 | * @} |
gregeric | 0:b9444a40a999 | 606 | */ |
gregeric | 0:b9444a40a999 | 607 | |
gregeric | 0:b9444a40a999 | 608 | |
gregeric | 0:b9444a40a999 | 609 | /** |
gregeric | 0:b9444a40a999 | 610 | * @} |
gregeric | 0:b9444a40a999 | 611 | */ |
gregeric | 0:b9444a40a999 | 612 | |
gregeric | 0:b9444a40a999 | 613 | /** |
gregeric | 0:b9444a40a999 | 614 | * @} |
gregeric | 0:b9444a40a999 | 615 | */ |
gregeric | 0:b9444a40a999 | 616 | |
gregeric | 0:b9444a40a999 | 617 | /** |
gregeric | 0:b9444a40a999 | 618 | * @} |
gregeric | 0:b9444a40a999 | 619 | */ |
gregeric | 0:b9444a40a999 | 620 | |
gregeric | 0:b9444a40a999 | 621 | #ifdef __cplusplus |
gregeric | 0:b9444a40a999 | 622 | } |
gregeric | 0:b9444a40a999 | 623 | #endif |
gregeric | 0:b9444a40a999 | 624 | |
gregeric | 0:b9444a40a999 | 625 | #endif /* #ifndef __L6474_H */ |
gregeric | 0:b9444a40a999 | 626 | |
gregeric | 0:b9444a40a999 | 627 | |
gregeric | 0:b9444a40a999 | 628 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |