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lora_phy_ds.h
00001 /** 00002 * @file lora_phy_ds.h 00003 * 00004 * @brief Data structures relating to PHY layer 00005 * 00006 * \code 00007 * ______ _ 00008 * / _____) _ | | 00009 * ( (____ _____ ____ _| |_ _____ ____| |__ 00010 * \____ \| ___ | (_ _) ___ |/ ___) _ \ 00011 * _____) ) ____| | | || |_| ____( (___| | | | 00012 * (______/|_____)_|_|_| \__)_____)\____)_| |_| 00013 * (C)2013 Semtech 00014 * ___ _____ _ ___ _ _____ ___ ___ ___ ___ 00015 * / __|_ _/_\ / __| |/ / __/ _ \| _ \/ __| __| 00016 * \__ \ | |/ _ \ (__| ' <| _| (_) | / (__| _| 00017 * |___/ |_/_/ \_\___|_|\_\_| \___/|_|_\\___|___| 00018 * embedded.connectivity.solutions=============== 00019 * 00020 * \endcode 00021 * 00022 * License: Revised BSD License, see LICENSE.TXT file include in the project 00023 * 00024 * Maintainer: Miguel Luis ( Semtech ), Gregory Cristian ( Semtech ) and Daniel Jaeckle ( STACKFORCE ) 00025 * 00026 * Copyright (c) 2017, Arm Limited and affiliates. 00027 * SPDX-License-Identifier: BSD-3-Clause 00028 * 00029 */ 00030 00031 #ifndef MBED_OS_LORA_PHY_DATASTRUCTURES_ 00032 #define MBED_OS_LORA_PHY_DATASTRUCTURES_ 00033 00034 #include "lorawan/system/lorawan_data_structures.h" 00035 00036 /*! 00037 * \brief Returns the minimum value between a and b. 00038 * 00039 * \param [in] a The first value. 00040 * \param [in] b The second value. 00041 * \retval minValue The minimum value. 00042 */ 00043 #ifndef MIN 00044 #define MIN( a, b ) ( ( ( a ) < ( b ) ) ? ( a ) : ( b ) ) 00045 #endif 00046 00047 /*! 00048 * \brief Returns the maximum value between a and b 00049 * 00050 * \param [in] a The first value. 00051 * \param [in] b The second value. 00052 * \retval maxValue The maximum value. 00053 */ 00054 #ifndef MAX 00055 #define MAX( a, b ) ( ( ( a ) > ( b ) ) ? ( a ) : ( b ) ) 00056 #endif 00057 00058 /** 00059 * LoRaMac maximum number of channels. 00060 */ 00061 #define LORA_MAX_NB_CHANNELS 16 00062 00063 /*! 00064 * Macro to compute bit of a channel index. 00065 */ 00066 #define LC( channelIndex ) ( uint16_t )( 1 << ( channelIndex - 1 ) ) 00067 00068 /*! 00069 * Region | SF 00070 * ------------ | :-----: 00071 * AS923 | SF12 - BW125 00072 * AU915 | SF10 - BW125 00073 * CN470 | SF12 - BW125 00074 * CN779 | SF12 - BW125 00075 * EU433 | SF12 - BW125 00076 * EU868 | SF12 - BW125 00077 * IN865 | SF12 - BW125 00078 * KR920 | SF12 - BW125 00079 * US915 | SF10 - BW125 00080 * US915_HYBRID | SF10 - BW125 00081 */ 00082 #define DR_0 0 00083 00084 /*! 00085 * Region | SF 00086 * ------------ | :-----: 00087 * AS923 | SF11 - BW125 00088 * AU915 | SF9 - BW125 00089 * CN470 | SF11 - BW125 00090 * CN779 | SF11 - BW125 00091 * EU433 | SF11 - BW125 00092 * EU868 | SF11 - BW125 00093 * IN865 | SF11 - BW125 00094 * KR920 | SF11 - BW125 00095 * US915 | SF9 - BW125 00096 * US915_HYBRID | SF9 - BW125 00097 */ 00098 #define DR_1 1 00099 00100 /*! 00101 * Region | SF 00102 * ------------ | :-----: 00103 * AS923 | SF10 - BW125 00104 * AU915 | SF8 - BW125 00105 * CN470 | SF10 - BW125 00106 * CN779 | SF10 - BW125 00107 * EU433 | SF10 - BW125 00108 * EU868 | SF10 - BW125 00109 * IN865 | SF10 - BW125 00110 * KR920 | SF10 - BW125 00111 * US915 | SF8 - BW125 00112 * US915_HYBRID | SF8 - BW125 00113 */ 00114 #define DR_2 2 00115 00116 /*! 00117 * Region | SF 00118 * ------------ | :-----: 00119 * AS923 | SF9 - BW125 00120 * AU915 | SF7 - BW125 00121 * CN470 | SF9 - BW125 00122 * CN779 | SF9 - BW125 00123 * EU433 | SF9 - BW125 00124 * EU868 | SF9 - BW125 00125 * IN865 | SF9 - BW125 00126 * KR920 | SF9 - BW125 00127 * US915 | SF7 - BW125 00128 * US915_HYBRID | SF7 - BW125 00129 */ 00130 #define DR_3 3 00131 00132 /*! 00133 * Region | SF 00134 * ------------ | :-----: 00135 * AS923 | SF8 - BW125 00136 * AU915 | SF8 - BW500 00137 * CN470 | SF8 - BW125 00138 * CN779 | SF8 - BW125 00139 * EU433 | SF8 - BW125 00140 * EU868 | SF8 - BW125 00141 * IN865 | SF8 - BW125 00142 * KR920 | SF8 - BW125 00143 * US915 | SF8 - BW500 00144 * US915_HYBRID | SF8 - BW500 00145 */ 00146 #define DR_4 4 00147 00148 /*! 00149 * Region | SF 00150 * ------------ | :-----: 00151 * AS923 | SF7 - BW125 00152 * AU915 | RFU 00153 * CN470 | SF7 - BW125 00154 * CN779 | SF7 - BW125 00155 * EU433 | SF7 - BW125 00156 * EU868 | SF7 - BW125 00157 * IN865 | SF7 - BW125 00158 * KR920 | SF7 - BW125 00159 * US915 | RFU 00160 * US915_HYBRID | RFU 00161 */ 00162 #define DR_5 5 00163 00164 /*! 00165 * Region | SF 00166 * ------------ | :-----: 00167 * AS923 | SF7 - BW250 00168 * AU915 | RFU 00169 * CN470 | SF12 - BW125 00170 * CN779 | SF7 - BW250 00171 * EU433 | SF7 - BW250 00172 * EU868 | SF7 - BW250 00173 * IN865 | SF7 - BW250 00174 * KR920 | RFU 00175 * US915 | RFU 00176 * US915_HYBRID | RFU 00177 */ 00178 #define DR_6 6 00179 00180 /*! 00181 * Region | SF 00182 * ------------ | :-----: 00183 * AS923 | FSK 00184 * AU915 | RFU 00185 * CN470 | SF12 - BW125 00186 * CN779 | FSK 00187 * EU433 | FSK 00188 * EU868 | FSK 00189 * IN865 | FSK 00190 * KR920 | RFU 00191 * US915 | RFU 00192 * US915_HYBRID | RFU 00193 */ 00194 #define DR_7 7 00195 00196 /*! 00197 * Region | SF 00198 * ------------ | :-----: 00199 * AS923 | RFU 00200 * AU915 | SF12 - BW500 00201 * CN470 | RFU 00202 * CN779 | RFU 00203 * EU433 | RFU 00204 * EU868 | RFU 00205 * IN865 | RFU 00206 * KR920 | RFU 00207 * US915 | SF12 - BW500 00208 * US915_HYBRID | SF12 - BW500 00209 */ 00210 #define DR_8 8 00211 00212 /*! 00213 * Region | SF 00214 * ------------ | :-----: 00215 * AS923 | RFU 00216 * AU915 | SF11 - BW500 00217 * CN470 | RFU 00218 * CN779 | RFU 00219 * EU433 | RFU 00220 * EU868 | RFU 00221 * IN865 | RFU 00222 * KR920 | RFU 00223 * US915 | SF11 - BW500 00224 * US915_HYBRID | SF11 - BW500 00225 */ 00226 #define DR_9 9 00227 00228 /*! 00229 * Region | SF 00230 * ------------ | :-----: 00231 * AS923 | RFU 00232 * AU915 | SF10 - BW500 00233 * CN470 | RFU 00234 * CN779 | RFU 00235 * EU433 | RFU 00236 * EU868 | RFU 00237 * IN865 | RFU 00238 * KR920 | RFU 00239 * US915 | SF10 - BW500 00240 * US915_HYBRID | SF10 - BW500 00241 */ 00242 #define DR_10 10 00243 00244 /*! 00245 * Region | SF 00246 * ------------ | :-----: 00247 * AS923 | RFU 00248 * AU915 | SF9 - BW500 00249 * CN470 | RFU 00250 * CN779 | RFU 00251 * EU433 | RFU 00252 * EU868 | RFU 00253 * IN865 | RFU 00254 * KR920 | RFU 00255 * US915 | SF9 - BW500 00256 * US915_HYBRID | SF9 - BW500 00257 */ 00258 #define DR_11 11 00259 00260 /*! 00261 * Region | SF 00262 * ------------ | :-----: 00263 * AS923 | RFU 00264 * AU915 | SF8 - BW500 00265 * CN470 | RFU 00266 * CN779 | RFU 00267 * EU433 | RFU 00268 * EU868 | RFU 00269 * IN865 | RFU 00270 * KR920 | RFU 00271 * US915 | SF8 - BW500 00272 * US915_HYBRID | SF8 - BW500 00273 */ 00274 #define DR_12 12 00275 00276 /*! 00277 * Region | SF 00278 * ------------ | :-----: 00279 * AS923 | RFU 00280 * AU915 | SF7 - BW500 00281 * CN470 | RFU 00282 * CN779 | RFU 00283 * EU433 | RFU 00284 * EU868 | RFU 00285 * IN865 | RFU 00286 * KR920 | RFU 00287 * US915 | SF7 - BW500 00288 * US915_HYBRID | SF7 - BW500 00289 */ 00290 #define DR_13 13 00291 00292 /*! 00293 * Region | SF 00294 * ------------ | :-----: 00295 * AS923 | RFU 00296 * AU915 | RFU 00297 * CN470 | RFU 00298 * CN779 | RFU 00299 * EU433 | RFU 00300 * EU868 | RFU 00301 * IN865 | RFU 00302 * KR920 | RFU 00303 * US915 | RFU 00304 * US915_HYBRID | RFU 00305 */ 00306 #define DR_14 14 00307 00308 /*! 00309 * Region | SF 00310 * ------------ | :-----: 00311 * AS923 | RFU 00312 * AU915 | RFU 00313 * CN470 | RFU 00314 * CN779 | RFU 00315 * EU433 | RFU 00316 * EU868 | RFU 00317 * IN865 | RFU 00318 * KR920 | RFU 00319 * US915 | RFU 00320 * US915_HYBRID | RFU 00321 */ 00322 #define DR_15 15 00323 00324 00325 00326 /*! 00327 * Region | dBM 00328 * ------------ | :-----: 00329 * AS923 | Max EIRP 00330 * AU915 | Max EIRP 00331 * CN470 | Max EIRP 00332 * CN779 | Max EIRP 00333 * EU433 | Max EIRP 00334 * EU868 | Max EIRP 00335 * IN865 | Max EIRP 00336 * KR920 | Max EIRP 00337 * US915 | Max ERP 00338 * US915_HYBRID | Max ERP 00339 */ 00340 #define TX_POWER_0 0 00341 00342 /*! 00343 * Region | dBM 00344 * ------------ | :-----: 00345 * AS923 | Max EIRP - 2 00346 * AU915 | Max EIRP - 2 00347 * CN470 | Max EIRP - 2 00348 * CN779 | Max EIRP - 2 00349 * EU433 | Max EIRP - 2 00350 * EU868 | Max EIRP - 2 00351 * IN865 | Max EIRP - 2 00352 * KR920 | Max EIRP - 2 00353 * US915 | Max ERP - 2 00354 * US915_HYBRID | Max ERP - 2 00355 */ 00356 #define TX_POWER_1 1 00357 00358 /*! 00359 * Region | dBM 00360 * ------------ | :-----: 00361 * AS923 | Max EIRP - 4 00362 * AU915 | Max EIRP - 4 00363 * CN470 | Max EIRP - 4 00364 * CN779 | Max EIRP - 4 00365 * EU433 | Max EIRP - 4 00366 * EU868 | Max EIRP - 4 00367 * IN865 | Max EIRP - 4 00368 * KR920 | Max EIRP - 4 00369 * US915 | Max ERP - 4 00370 * US915_HYBRID | Max ERP - 4 00371 */ 00372 #define TX_POWER_2 2 00373 00374 /*! 00375 * Region | dBM 00376 * ------------ | :-----: 00377 * AS923 | Max EIRP - 6 00378 * AU915 | Max EIRP - 6 00379 * CN470 | Max EIRP - 6 00380 * CN779 | Max EIRP - 6 00381 * EU433 | Max EIRP - 6 00382 * EU868 | Max EIRP - 6 00383 * IN865 | Max EIRP - 6 00384 * KR920 | Max EIRP - 6 00385 * US915 | Max ERP - 6 00386 * US915_HYBRID | Max ERP - 6 00387 */ 00388 #define TX_POWER_3 3 00389 00390 /*! 00391 * Region | dBM 00392 * ------------ | :-----: 00393 * AS923 | Max EIRP - 8 00394 * AU915 | Max EIRP - 8 00395 * CN470 | Max EIRP - 8 00396 * CN779 | Max EIRP - 8 00397 * EU433 | Max EIRP - 8 00398 * EU868 | Max EIRP - 8 00399 * IN865 | Max EIRP - 8 00400 * KR920 | Max EIRP - 8 00401 * US915 | Max ERP - 8 00402 * US915_HYBRID | Max ERP - 8 00403 */ 00404 #define TX_POWER_4 4 00405 00406 /*! 00407 * Region | dBM 00408 * ------------ | :-----: 00409 * AS923 | Max EIRP - 10 00410 * AU915 | Max EIRP - 10 00411 * CN470 | Max EIRP - 10 00412 * CN779 | Max EIRP - 10 00413 * EU433 | Max EIRP - 10 00414 * EU868 | Max EIRP - 10 00415 * IN865 | Max EIRP - 10 00416 * KR920 | Max EIRP - 10 00417 * US915 | Max ERP - 10 00418 * US915_HYBRID | Max ERP - 10 00419 */ 00420 #define TX_POWER_5 5 00421 00422 /*! 00423 * Region | dBM 00424 * ------------ | :-----: 00425 * AS923 | Max EIRP - 12 00426 * AU915 | Max EIRP - 12 00427 * CN470 | Max EIRP - 12 00428 * CN779 | - 00429 * EU433 | - 00430 * EU868 | Max EIRP - 12 00431 * IN865 | Max EIRP - 12 00432 * KR920 | Max EIRP - 12 00433 * US915 | Max ERP - 12 00434 * US915_HYBRID | Max ERP - 12 00435 */ 00436 #define TX_POWER_6 6 00437 00438 /*! 00439 * Region | dBM 00440 * ------------ | :-----: 00441 * AS923 | Max EIRP - 14 00442 * AU915 | Max EIRP - 14 00443 * CN470 | Max EIRP - 14 00444 * CN779 | - 00445 * EU433 | - 00446 * EU868 | Max EIRP - 14 00447 * IN865 | Max EIRP - 14 00448 * KR920 | Max EIRP - 14 00449 * US915 | Max ERP - 14 00450 * US915_HYBRID | Max ERP - 14 00451 */ 00452 #define TX_POWER_7 7 00453 00454 /*! 00455 * Region | dBM 00456 * ------------ | :-----: 00457 * AS923 | - 00458 * AU915 | Max EIRP - 16 00459 * CN470 | - 00460 * CN779 | - 00461 * EU433 | - 00462 * EU868 | - 00463 * IN865 | Max EIRP - 16 00464 * KR920 | - 00465 * US915 | Max ERP - 16 00466 * US915_HYBRID | Max ERP -16 00467 */ 00468 #define TX_POWER_8 8 00469 00470 /*! 00471 * Region | dBM 00472 * ------------ | :-----: 00473 * AS923 | - 00474 * AU915 | Max EIRP - 18 00475 * CN470 | - 00476 * CN779 | - 00477 * EU433 | - 00478 * EU868 | - 00479 * IN865 | Max EIRP - 18 00480 * KR920 | - 00481 * US915 | Max ERP - 16 00482 * US915_HYBRID | Max ERP - 16 00483 */ 00484 #define TX_POWER_9 9 00485 00486 /*! 00487 * Region | dBM 00488 * ------------ | :-----: 00489 * AS923 | - 00490 * AU915 | Max EIRP - 20 00491 * CN470 | - 00492 * CN779 | - 00493 * EU433 | - 00494 * EU868 | - 00495 * IN865 | Max EIRP - 20 00496 * KR920 | - 00497 * US915 | Max ERP - 10 00498 * US915_HYBRID | Max ERP - 10 00499 */ 00500 #define TX_POWER_10 10 00501 00502 /*! 00503 * RFU 00504 */ 00505 #define TX_POWER_11 11 00506 00507 /*! 00508 * RFU 00509 */ 00510 #define TX_POWER_12 12 00511 00512 /*! 00513 * RFU 00514 */ 00515 #define TX_POWER_13 13 00516 00517 /*! 00518 * RFU 00519 */ 00520 #define TX_POWER_14 14 00521 00522 /*! 00523 * RFU 00524 */ 00525 #define TX_POWER_15 15 00526 00527 /** 00528 * TX configuration parameters. 00529 */ 00530 typedef struct 00531 { 00532 /** 00533 * The TX channel. 00534 */ 00535 uint8_t channel; 00536 /** 00537 * The TX datarate. 00538 */ 00539 int8_t datarate; 00540 /** 00541 * The TX power. 00542 */ 00543 int8_t tx_power; 00544 /** 00545 * The Max EIRP, if applicable. 00546 */ 00547 float max_eirp; 00548 /** 00549 * The antenna gain, if applicable. 00550 */ 00551 float antenna_gain; 00552 /** 00553 * The frame length to set up. 00554 */ 00555 uint16_t pkt_len; 00556 } tx_config_params_t; 00557 00558 /** 00559 * This structure contains parameters for ADR request coming from 00560 * network server. 00561 */ 00562 typedef struct 00563 { 00564 /*! 00565 * A pointer to the payload containing the MAC commands. 00566 */ 00567 uint8_t* payload ; 00568 /*! 00569 * The size of the payload. 00570 */ 00571 uint8_t payload_size ; 00572 /*! 00573 * The uplink dwell time. 00574 */ 00575 uint8_t ul_dwell_time ; 00576 /*! 00577 * Set to true, if ADR is enabled. 00578 */ 00579 bool adr_enabled ; 00580 /*! 00581 * The current datarate. 00582 */ 00583 int8_t current_datarate ; 00584 /*! 00585 * The current TX power. 00586 */ 00587 int8_t current_tx_power ; 00588 /*! 00589 * The current number of repetitions. 00590 */ 00591 uint8_t current_nb_rep ; 00592 } adr_req_params_t; 00593 00594 /** 00595 * Structure containing data for local ADR settings 00596 */ 00597 typedef struct link_adr_params_s 00598 { 00599 /** 00600 * The number of repetitions. 00601 */ 00602 uint8_t nb_rep; 00603 /** 00604 * Datarate. 00605 */ 00606 int8_t datarate; 00607 /** 00608 * TX power. 00609 */ 00610 int8_t tx_power; 00611 /** 00612 * Channels mask control field. 00613 */ 00614 uint8_t ch_mask_ctrl; 00615 /** 00616 * Channels mask field. 00617 */ 00618 uint16_t channel_mask; 00619 } link_adr_params_t; 00620 00621 /** 00622 * Structure used to store ADR values received from network 00623 * for verification (legality) purposes. 00624 */ 00625 typedef struct verify_adr_params_s 00626 { 00627 /*! 00628 * The current status of the AdrLinkRequest. 00629 */ 00630 uint8_t status ; 00631 /*! 00632 * Set to true, if ADR is enabled. 00633 */ 00634 bool adr_enabled ; 00635 /*! 00636 * The datarate the AdrLinkRequest wants to set. 00637 */ 00638 int8_t datarate ; 00639 /*! 00640 * The TX power the AdrLinkRequest wants to set. 00641 */ 00642 int8_t tx_power ; 00643 /*! 00644 * The number of repetitions the AdrLinkRequest wants to set. 00645 */ 00646 uint8_t nb_rep ; 00647 /*! 00648 * The current datarate the node is using. 00649 */ 00650 int8_t current_datarate ; 00651 /*! 00652 * The current TX power the node is using. 00653 */ 00654 int8_t current_tx_power ; 00655 /*! 00656 * The current number of repetitions the node is using. 00657 */ 00658 int8_t current_nb_rep ; 00659 00660 /*! 00661 * A pointer to the first element of the channels mask. 00662 */ 00663 uint16_t* channel_mask ; 00664 } verify_adr_params_t; 00665 00666 /** 00667 * Contains rx parameter setup request coming from 00668 * network server. 00669 */ 00670 typedef struct rx_param_setup_req_s 00671 { 00672 /** 00673 * The datarate to set up. 00674 */ 00675 int8_t datarate; 00676 /** 00677 * The datarate offset. 00678 */ 00679 int8_t dr_offset; 00680 /** 00681 * The frequency to set up. 00682 */ 00683 uint32_t frequency; 00684 } rx_param_setup_req_t; 00685 00686 /** 00687 * The parameter structure for the function RegionNextChannel. 00688 */ 00689 typedef struct channel_selection_params_s 00690 { 00691 /** 00692 * The aggregated time-off time. 00693 */ 00694 lorawan_time_t aggregate_timeoff; 00695 /** 00696 * The time of the last aggregated TX. 00697 */ 00698 lorawan_time_t last_aggregate_tx_time; 00699 /** 00700 * The current datarate. 00701 */ 00702 int8_t current_datarate; 00703 /** 00704 * Set to true, if the node has already joined a network, otherwise false. 00705 */ 00706 bool joined; 00707 /** 00708 * Set to true, if the duty cycle is enabled, otherwise false. 00709 */ 00710 bool dc_enabled; 00711 } channel_selection_params_t; 00712 00713 /*! 00714 * The parameter structure for the function RegionContinuousWave. 00715 */ 00716 typedef struct continuous_wave_mode_params_s 00717 { 00718 /*! 00719 * The current channel index. 00720 */ 00721 uint8_t channel ; 00722 /*! 00723 * The datarate. Used to limit the TX power. 00724 */ 00725 int8_t datarate ; 00726 /*! 00727 * The TX power to set up. 00728 */ 00729 int8_t tx_power ; 00730 /*! 00731 * The max EIRP, if applicable. 00732 */ 00733 float max_eirp ; 00734 /*! 00735 * The antenna gain, if applicable. 00736 */ 00737 float antenna_gain ; 00738 /*! 00739 * Specifies the time the radio will stay in CW mode. 00740 */ 00741 uint16_t timeout ; 00742 } cw_mode_params_t ; 00743 00744 typedef struct { 00745 void *table; 00746 uint8_t size; 00747 } loraphy_table_t; 00748 00749 typedef struct { 00750 00751 uint8_t channel_list_size; 00752 uint8_t mask_size; 00753 00754 uint16_t *mask; 00755 uint16_t *default_mask; 00756 channel_params_t *channel_list; 00757 } loraphy_channels_t; 00758 00759 typedef struct { 00760 bool duty_cycle_enabled; 00761 bool accept_tx_param_setup_req; 00762 bool fsk_supported; 00763 bool cflist_supported; 00764 bool custom_channelplans_supported; 00765 bool dl_channel_req_supported; 00766 00767 uint8_t default_channel_cnt; 00768 uint8_t cflist_channel_cnt; 00769 uint8_t max_channel_cnt; 00770 uint8_t min_tx_power; 00771 uint8_t max_tx_power; 00772 uint8_t default_tx_power; 00773 uint8_t adr_ack_limit; 00774 uint8_t adr_ack_delay; 00775 00776 uint8_t min_tx_datarate; 00777 uint8_t max_tx_datarate; 00778 uint8_t min_rx_datarate; 00779 uint8_t max_rx_datarate; 00780 uint8_t default_datarate; 00781 uint8_t default_max_datarate; 00782 uint8_t min_rx1_dr_offset; 00783 uint8_t max_rx1_dr_offset; 00784 uint8_t default_rx1_dr_offset; 00785 uint8_t dwell_limit_datarate; 00786 00787 uint16_t max_rx_window; 00788 uint16_t recv_delay1; 00789 uint16_t recv_delay2; 00790 uint16_t join_accept_delay1; 00791 uint16_t join_accept_delay2; 00792 uint16_t join_channel_mask; 00793 uint16_t max_fcnt_gap; 00794 uint16_t ack_timeout; 00795 uint16_t ack_timeout_rnd; 00796 00797 float default_max_eirp; 00798 float default_antenna_gain; 00799 00800 uint8_t rx_window2_datarate; 00801 uint32_t rx_window2_frequency; 00802 00803 loraphy_table_t bands; 00804 loraphy_table_t bandwidths; 00805 loraphy_table_t datarates; 00806 loraphy_table_t payloads; 00807 loraphy_table_t payloads_with_repeater; 00808 00809 loraphy_channels_t channels; 00810 00811 00812 unsigned ul_dwell_time_setting : 1; 00813 unsigned dl_dwell_time_setting : 1; 00814 00815 } loraphy_params_t; 00816 00817 00818 #endif /* MBED_OS_LORA_PHY_DATASTRUCTURES_ */
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