George Roussos / BLE_Temperature

BLE temperature profile using digital DS1820 or analog LM35 sensors

Dependencies:   DS1820

mbed/TARGET_NRF51822/core_cmInstr.h@0:637031152314, 2015-03-07 (annotated)

Committer:
gkroussos
Date:
Sat Mar 07 16:23:41 2015 +0000
Revision:
0:637031152314
Working version 1.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gkroussos 0:637031152314 1 /**************************************************************************//**
gkroussos 0:637031152314 2 * @file core_cmInstr.h
gkroussos 0:637031152314 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
gkroussos 0:637031152314 4 * @version V3.20
gkroussos 0:637031152314 5 * @date 05. March 2013
gkroussos 0:637031152314 6 *
gkroussos 0:637031152314 7 * @note
gkroussos 0:637031152314 8 *
gkroussos 0:637031152314 9 ******************************************************************************/
gkroussos 0:637031152314 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
gkroussos 0:637031152314 11
gkroussos 0:637031152314 12 All rights reserved.
gkroussos 0:637031152314 13 Redistribution and use in source and binary forms, with or without
gkroussos 0:637031152314 14 modification, are permitted provided that the following conditions are met:
gkroussos 0:637031152314 15 - Redistributions of source code must retain the above copyright
gkroussos 0:637031152314 16 notice, this list of conditions and the following disclaimer.
gkroussos 0:637031152314 17 - Redistributions in binary form must reproduce the above copyright
gkroussos 0:637031152314 18 notice, this list of conditions and the following disclaimer in the
gkroussos 0:637031152314 19 documentation and/or other materials provided with the distribution.
gkroussos 0:637031152314 20 - Neither the name of ARM nor the names of its contributors may be used
gkroussos 0:637031152314 21 to endorse or promote products derived from this software without
gkroussos 0:637031152314 22 specific prior written permission.
gkroussos 0:637031152314 23 *
gkroussos 0:637031152314 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
gkroussos 0:637031152314 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
gkroussos 0:637031152314 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
gkroussos 0:637031152314 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
gkroussos 0:637031152314 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
gkroussos 0:637031152314 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
gkroussos 0:637031152314 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
gkroussos 0:637031152314 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
gkroussos 0:637031152314 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
gkroussos 0:637031152314 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
gkroussos 0:637031152314 34 POSSIBILITY OF SUCH DAMAGE.
gkroussos 0:637031152314 35 ---------------------------------------------------------------------------*/
gkroussos 0:637031152314 36
gkroussos 0:637031152314 37
gkroussos 0:637031152314 38 #ifndef __CORE_CMINSTR_H
gkroussos 0:637031152314 39 #define __CORE_CMINSTR_H
gkroussos 0:637031152314 40
gkroussos 0:637031152314 41
gkroussos 0:637031152314 42 /* ########################## Core Instruction Access ######################### */
gkroussos 0:637031152314 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
gkroussos 0:637031152314 44 Access to dedicated instructions
gkroussos 0:637031152314 45 @{
gkroussos 0:637031152314 46 */
gkroussos 0:637031152314 47
gkroussos 0:637031152314 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
gkroussos 0:637031152314 49 /* ARM armcc specific functions */
gkroussos 0:637031152314 50
gkroussos 0:637031152314 51 #if (__ARMCC_VERSION < 400677)
gkroussos 0:637031152314 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
gkroussos 0:637031152314 53 #endif
gkroussos 0:637031152314 54
gkroussos 0:637031152314 55
gkroussos 0:637031152314 56 /** \brief No Operation
gkroussos 0:637031152314 57
gkroussos 0:637031152314 58 No Operation does nothing. This instruction can be used for code alignment purposes.
gkroussos 0:637031152314 59 */
gkroussos 0:637031152314 60 #define __NOP __nop
gkroussos 0:637031152314 61
gkroussos 0:637031152314 62
gkroussos 0:637031152314 63 /** \brief Wait For Interrupt
gkroussos 0:637031152314 64
gkroussos 0:637031152314 65 Wait For Interrupt is a hint instruction that suspends execution
gkroussos 0:637031152314 66 until one of a number of events occurs.
gkroussos 0:637031152314 67 */
gkroussos 0:637031152314 68 #define __WFI __wfi
gkroussos 0:637031152314 69
gkroussos 0:637031152314 70
gkroussos 0:637031152314 71 /** \brief Wait For Event
gkroussos 0:637031152314 72
gkroussos 0:637031152314 73 Wait For Event is a hint instruction that permits the processor to enter
gkroussos 0:637031152314 74 a low-power state until one of a number of events occurs.
gkroussos 0:637031152314 75 */
gkroussos 0:637031152314 76 #define __WFE __wfe
gkroussos 0:637031152314 77
gkroussos 0:637031152314 78
gkroussos 0:637031152314 79 /** \brief Send Event
gkroussos 0:637031152314 80
gkroussos 0:637031152314 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
gkroussos 0:637031152314 82 */
gkroussos 0:637031152314 83 #define __SEV __sev
gkroussos 0:637031152314 84
gkroussos 0:637031152314 85
gkroussos 0:637031152314 86 /** \brief Instruction Synchronization Barrier
gkroussos 0:637031152314 87
gkroussos 0:637031152314 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
gkroussos 0:637031152314 89 so that all instructions following the ISB are fetched from cache or
gkroussos 0:637031152314 90 memory, after the instruction has been completed.
gkroussos 0:637031152314 91 */
gkroussos 0:637031152314 92 #define __ISB() __isb(0xF)
gkroussos 0:637031152314 93
gkroussos 0:637031152314 94
gkroussos 0:637031152314 95 /** \brief Data Synchronization Barrier
gkroussos 0:637031152314 96
gkroussos 0:637031152314 97 This function acts as a special kind of Data Memory Barrier.
gkroussos 0:637031152314 98 It completes when all explicit memory accesses before this instruction complete.
gkroussos 0:637031152314 99 */
gkroussos 0:637031152314 100 #define __DSB() __dsb(0xF)
gkroussos 0:637031152314 101
gkroussos 0:637031152314 102
gkroussos 0:637031152314 103 /** \brief Data Memory Barrier
gkroussos 0:637031152314 104
gkroussos 0:637031152314 105 This function ensures the apparent order of the explicit memory operations before
gkroussos 0:637031152314 106 and after the instruction, without ensuring their completion.
gkroussos 0:637031152314 107 */
gkroussos 0:637031152314 108 #define __DMB() __dmb(0xF)
gkroussos 0:637031152314 109
gkroussos 0:637031152314 110
gkroussos 0:637031152314 111 /** \brief Reverse byte order (32 bit)
gkroussos 0:637031152314 112
gkroussos 0:637031152314 113 This function reverses the byte order in integer value.
gkroussos 0:637031152314 114
gkroussos 0:637031152314 115 \param [in] value Value to reverse
gkroussos 0:637031152314 116 \return Reversed value
gkroussos 0:637031152314 117 */
gkroussos 0:637031152314 118 #define __REV __rev
gkroussos 0:637031152314 119
gkroussos 0:637031152314 120
gkroussos 0:637031152314 121 /** \brief Reverse byte order (16 bit)
gkroussos 0:637031152314 122
gkroussos 0:637031152314 123 This function reverses the byte order in two unsigned short values.
gkroussos 0:637031152314 124
gkroussos 0:637031152314 125 \param [in] value Value to reverse
gkroussos 0:637031152314 126 \return Reversed value
gkroussos 0:637031152314 127 */
gkroussos 0:637031152314 128 #ifndef __NO_EMBEDDED_ASM
gkroussos 0:637031152314 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
gkroussos 0:637031152314 130 {
gkroussos 0:637031152314 131 rev16 r0, r0
gkroussos 0:637031152314 132 bx lr
gkroussos 0:637031152314 133 }
gkroussos 0:637031152314 134 #endif
gkroussos 0:637031152314 135
gkroussos 0:637031152314 136 /** \brief Reverse byte order in signed short value
gkroussos 0:637031152314 137
gkroussos 0:637031152314 138 This function reverses the byte order in a signed short value with sign extension to integer.
gkroussos 0:637031152314 139
gkroussos 0:637031152314 140 \param [in] value Value to reverse
gkroussos 0:637031152314 141 \return Reversed value
gkroussos 0:637031152314 142 */
gkroussos 0:637031152314 143 #ifndef __NO_EMBEDDED_ASM
gkroussos 0:637031152314 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
gkroussos 0:637031152314 145 {
gkroussos 0:637031152314 146 revsh r0, r0
gkroussos 0:637031152314 147 bx lr
gkroussos 0:637031152314 148 }
gkroussos 0:637031152314 149 #endif
gkroussos 0:637031152314 150
gkroussos 0:637031152314 151
gkroussos 0:637031152314 152 /** \brief Rotate Right in unsigned value (32 bit)
gkroussos 0:637031152314 153
gkroussos 0:637031152314 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
gkroussos 0:637031152314 155
gkroussos 0:637031152314 156 \param [in] value Value to rotate
gkroussos 0:637031152314 157 \param [in] value Number of Bits to rotate
gkroussos 0:637031152314 158 \return Rotated value
gkroussos 0:637031152314 159 */
gkroussos 0:637031152314 160 #define __ROR __ror
gkroussos 0:637031152314 161
gkroussos 0:637031152314 162
gkroussos 0:637031152314 163 /** \brief Breakpoint
gkroussos 0:637031152314 164
gkroussos 0:637031152314 165 This function causes the processor to enter Debug state.
gkroussos 0:637031152314 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
gkroussos 0:637031152314 167
gkroussos 0:637031152314 168 \param [in] value is ignored by the processor.
gkroussos 0:637031152314 169 If required, a debugger can use it to store additional information about the breakpoint.
gkroussos 0:637031152314 170 */
gkroussos 0:637031152314 171 #define __BKPT(value) __breakpoint(value)
gkroussos 0:637031152314 172
gkroussos 0:637031152314 173
gkroussos 0:637031152314 174 #if (__CORTEX_M >= 0x03)
gkroussos 0:637031152314 175
gkroussos 0:637031152314 176 /** \brief Reverse bit order of value
gkroussos 0:637031152314 177
gkroussos 0:637031152314 178 This function reverses the bit order of the given value.
gkroussos 0:637031152314 179
gkroussos 0:637031152314 180 \param [in] value Value to reverse
gkroussos 0:637031152314 181 \return Reversed value
gkroussos 0:637031152314 182 */
gkroussos 0:637031152314 183 #define __RBIT __rbit
gkroussos 0:637031152314 184
gkroussos 0:637031152314 185
gkroussos 0:637031152314 186 /** \brief LDR Exclusive (8 bit)
gkroussos 0:637031152314 187
gkroussos 0:637031152314 188 This function performs a exclusive LDR command for 8 bit value.
gkroussos 0:637031152314 189
gkroussos 0:637031152314 190 \param [in] ptr Pointer to data
gkroussos 0:637031152314 191 \return value of type uint8_t at (*ptr)
gkroussos 0:637031152314 192 */
gkroussos 0:637031152314 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
gkroussos 0:637031152314 194
gkroussos 0:637031152314 195
gkroussos 0:637031152314 196 /** \brief LDR Exclusive (16 bit)
gkroussos 0:637031152314 197
gkroussos 0:637031152314 198 This function performs a exclusive LDR command for 16 bit values.
gkroussos 0:637031152314 199
gkroussos 0:637031152314 200 \param [in] ptr Pointer to data
gkroussos 0:637031152314 201 \return value of type uint16_t at (*ptr)
gkroussos 0:637031152314 202 */
gkroussos 0:637031152314 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
gkroussos 0:637031152314 204
gkroussos 0:637031152314 205
gkroussos 0:637031152314 206 /** \brief LDR Exclusive (32 bit)
gkroussos 0:637031152314 207
gkroussos 0:637031152314 208 This function performs a exclusive LDR command for 32 bit values.
gkroussos 0:637031152314 209
gkroussos 0:637031152314 210 \param [in] ptr Pointer to data
gkroussos 0:637031152314 211 \return value of type uint32_t at (*ptr)
gkroussos 0:637031152314 212 */
gkroussos 0:637031152314 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
gkroussos 0:637031152314 214
gkroussos 0:637031152314 215
gkroussos 0:637031152314 216 /** \brief STR Exclusive (8 bit)
gkroussos 0:637031152314 217
gkroussos 0:637031152314 218 This function performs a exclusive STR command for 8 bit values.
gkroussos 0:637031152314 219
gkroussos 0:637031152314 220 \param [in] value Value to store
gkroussos 0:637031152314 221 \param [in] ptr Pointer to location
gkroussos 0:637031152314 222 \return 0 Function succeeded
gkroussos 0:637031152314 223 \return 1 Function failed
gkroussos 0:637031152314 224 */
gkroussos 0:637031152314 225 #define __STREXB(value, ptr) __strex(value, ptr)
gkroussos 0:637031152314 226
gkroussos 0:637031152314 227
gkroussos 0:637031152314 228 /** \brief STR Exclusive (16 bit)
gkroussos 0:637031152314 229
gkroussos 0:637031152314 230 This function performs a exclusive STR command for 16 bit values.
gkroussos 0:637031152314 231
gkroussos 0:637031152314 232 \param [in] value Value to store
gkroussos 0:637031152314 233 \param [in] ptr Pointer to location
gkroussos 0:637031152314 234 \return 0 Function succeeded
gkroussos 0:637031152314 235 \return 1 Function failed
gkroussos 0:637031152314 236 */
gkroussos 0:637031152314 237 #define __STREXH(value, ptr) __strex(value, ptr)
gkroussos 0:637031152314 238
gkroussos 0:637031152314 239
gkroussos 0:637031152314 240 /** \brief STR Exclusive (32 bit)
gkroussos 0:637031152314 241
gkroussos 0:637031152314 242 This function performs a exclusive STR command for 32 bit values.
gkroussos 0:637031152314 243
gkroussos 0:637031152314 244 \param [in] value Value to store
gkroussos 0:637031152314 245 \param [in] ptr Pointer to location
gkroussos 0:637031152314 246 \return 0 Function succeeded
gkroussos 0:637031152314 247 \return 1 Function failed
gkroussos 0:637031152314 248 */
gkroussos 0:637031152314 249 #define __STREXW(value, ptr) __strex(value, ptr)
gkroussos 0:637031152314 250
gkroussos 0:637031152314 251
gkroussos 0:637031152314 252 /** \brief Remove the exclusive lock
gkroussos 0:637031152314 253
gkroussos 0:637031152314 254 This function removes the exclusive lock which is created by LDREX.
gkroussos 0:637031152314 255
gkroussos 0:637031152314 256 */
gkroussos 0:637031152314 257 #define __CLREX __clrex
gkroussos 0:637031152314 258
gkroussos 0:637031152314 259
gkroussos 0:637031152314 260 /** \brief Signed Saturate
gkroussos 0:637031152314 261
gkroussos 0:637031152314 262 This function saturates a signed value.
gkroussos 0:637031152314 263
gkroussos 0:637031152314 264 \param [in] value Value to be saturated
gkroussos 0:637031152314 265 \param [in] sat Bit position to saturate to (1..32)
gkroussos 0:637031152314 266 \return Saturated value
gkroussos 0:637031152314 267 */
gkroussos 0:637031152314 268 #define __SSAT __ssat
gkroussos 0:637031152314 269
gkroussos 0:637031152314 270
gkroussos 0:637031152314 271 /** \brief Unsigned Saturate
gkroussos 0:637031152314 272
gkroussos 0:637031152314 273 This function saturates an unsigned value.
gkroussos 0:637031152314 274
gkroussos 0:637031152314 275 \param [in] value Value to be saturated
gkroussos 0:637031152314 276 \param [in] sat Bit position to saturate to (0..31)
gkroussos 0:637031152314 277 \return Saturated value
gkroussos 0:637031152314 278 */
gkroussos 0:637031152314 279 #define __USAT __usat
gkroussos 0:637031152314 280
gkroussos 0:637031152314 281
gkroussos 0:637031152314 282 /** \brief Count leading zeros
gkroussos 0:637031152314 283
gkroussos 0:637031152314 284 This function counts the number of leading zeros of a data value.
gkroussos 0:637031152314 285
gkroussos 0:637031152314 286 \param [in] value Value to count the leading zeros
gkroussos 0:637031152314 287 \return number of leading zeros in value
gkroussos 0:637031152314 288 */
gkroussos 0:637031152314 289 #define __CLZ __clz
gkroussos 0:637031152314 290
gkroussos 0:637031152314 291 #endif /* (__CORTEX_M >= 0x03) */
gkroussos 0:637031152314 292
gkroussos 0:637031152314 293
gkroussos 0:637031152314 294
gkroussos 0:637031152314 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
gkroussos 0:637031152314 296 /* IAR iccarm specific functions */
gkroussos 0:637031152314 297
gkroussos 0:637031152314 298 #include <cmsis_iar.h>
gkroussos 0:637031152314 299
gkroussos 0:637031152314 300
gkroussos 0:637031152314 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
gkroussos 0:637031152314 302 /* TI CCS specific functions */
gkroussos 0:637031152314 303
gkroussos 0:637031152314 304 #include <cmsis_ccs.h>
gkroussos 0:637031152314 305
gkroussos 0:637031152314 306
gkroussos 0:637031152314 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
gkroussos 0:637031152314 308 /* GNU gcc specific functions */
gkroussos 0:637031152314 309
gkroussos 0:637031152314 310 /* Define macros for porting to both thumb1 and thumb2.
gkroussos 0:637031152314 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
gkroussos 0:637031152314 312 * Otherwise, use general registers, specified by constrant "r" */
gkroussos 0:637031152314 313 #if defined (__thumb__) && !defined (__thumb2__)
gkroussos 0:637031152314 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
gkroussos 0:637031152314 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
gkroussos 0:637031152314 316 #else
gkroussos 0:637031152314 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
gkroussos 0:637031152314 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
gkroussos 0:637031152314 319 #endif
gkroussos 0:637031152314 320
gkroussos 0:637031152314 321 /** \brief No Operation
gkroussos 0:637031152314 322
gkroussos 0:637031152314 323 No Operation does nothing. This instruction can be used for code alignment purposes.
gkroussos 0:637031152314 324 */
gkroussos 0:637031152314 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
gkroussos 0:637031152314 326 {
gkroussos 0:637031152314 327 __ASM volatile ("nop");
gkroussos 0:637031152314 328 }
gkroussos 0:637031152314 329
gkroussos 0:637031152314 330
gkroussos 0:637031152314 331 /** \brief Wait For Interrupt
gkroussos 0:637031152314 332
gkroussos 0:637031152314 333 Wait For Interrupt is a hint instruction that suspends execution
gkroussos 0:637031152314 334 until one of a number of events occurs.
gkroussos 0:637031152314 335 */
gkroussos 0:637031152314 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
gkroussos 0:637031152314 337 {
gkroussos 0:637031152314 338 __ASM volatile ("wfi");
gkroussos 0:637031152314 339 }
gkroussos 0:637031152314 340
gkroussos 0:637031152314 341
gkroussos 0:637031152314 342 /** \brief Wait For Event
gkroussos 0:637031152314 343
gkroussos 0:637031152314 344 Wait For Event is a hint instruction that permits the processor to enter
gkroussos 0:637031152314 345 a low-power state until one of a number of events occurs.
gkroussos 0:637031152314 346 */
gkroussos 0:637031152314 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
gkroussos 0:637031152314 348 {
gkroussos 0:637031152314 349 __ASM volatile ("wfe");
gkroussos 0:637031152314 350 }
gkroussos 0:637031152314 351
gkroussos 0:637031152314 352
gkroussos 0:637031152314 353 /** \brief Send Event
gkroussos 0:637031152314 354
gkroussos 0:637031152314 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
gkroussos 0:637031152314 356 */
gkroussos 0:637031152314 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
gkroussos 0:637031152314 358 {
gkroussos 0:637031152314 359 __ASM volatile ("sev");
gkroussos 0:637031152314 360 }
gkroussos 0:637031152314 361
gkroussos 0:637031152314 362
gkroussos 0:637031152314 363 /** \brief Instruction Synchronization Barrier
gkroussos 0:637031152314 364
gkroussos 0:637031152314 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
gkroussos 0:637031152314 366 so that all instructions following the ISB are fetched from cache or
gkroussos 0:637031152314 367 memory, after the instruction has been completed.
gkroussos 0:637031152314 368 */
gkroussos 0:637031152314 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
gkroussos 0:637031152314 370 {
gkroussos 0:637031152314 371 __ASM volatile ("isb");
gkroussos 0:637031152314 372 }
gkroussos 0:637031152314 373
gkroussos 0:637031152314 374
gkroussos 0:637031152314 375 /** \brief Data Synchronization Barrier
gkroussos 0:637031152314 376
gkroussos 0:637031152314 377 This function acts as a special kind of Data Memory Barrier.
gkroussos 0:637031152314 378 It completes when all explicit memory accesses before this instruction complete.
gkroussos 0:637031152314 379 */
gkroussos 0:637031152314 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
gkroussos 0:637031152314 381 {
gkroussos 0:637031152314 382 __ASM volatile ("dsb");
gkroussos 0:637031152314 383 }
gkroussos 0:637031152314 384
gkroussos 0:637031152314 385
gkroussos 0:637031152314 386 /** \brief Data Memory Barrier
gkroussos 0:637031152314 387
gkroussos 0:637031152314 388 This function ensures the apparent order of the explicit memory operations before
gkroussos 0:637031152314 389 and after the instruction, without ensuring their completion.
gkroussos 0:637031152314 390 */
gkroussos 0:637031152314 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
gkroussos 0:637031152314 392 {
gkroussos 0:637031152314 393 __ASM volatile ("dmb");
gkroussos 0:637031152314 394 }
gkroussos 0:637031152314 395
gkroussos 0:637031152314 396
gkroussos 0:637031152314 397 /** \brief Reverse byte order (32 bit)
gkroussos 0:637031152314 398
gkroussos 0:637031152314 399 This function reverses the byte order in integer value.
gkroussos 0:637031152314 400
gkroussos 0:637031152314 401 \param [in] value Value to reverse
gkroussos 0:637031152314 402 \return Reversed value
gkroussos 0:637031152314 403 */
gkroussos 0:637031152314 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
gkroussos 0:637031152314 405 {
gkroussos 0:637031152314 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
gkroussos 0:637031152314 407 return __builtin_bswap32(value);
gkroussos 0:637031152314 408 #else
gkroussos 0:637031152314 409 uint32_t result;
gkroussos 0:637031152314 410
gkroussos 0:637031152314 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
gkroussos 0:637031152314 412 return(result);
gkroussos 0:637031152314 413 #endif
gkroussos 0:637031152314 414 }
gkroussos 0:637031152314 415
gkroussos 0:637031152314 416
gkroussos 0:637031152314 417 /** \brief Reverse byte order (16 bit)
gkroussos 0:637031152314 418
gkroussos 0:637031152314 419 This function reverses the byte order in two unsigned short values.
gkroussos 0:637031152314 420
gkroussos 0:637031152314 421 \param [in] value Value to reverse
gkroussos 0:637031152314 422 \return Reversed value
gkroussos 0:637031152314 423 */
gkroussos 0:637031152314 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
gkroussos 0:637031152314 425 {
gkroussos 0:637031152314 426 uint32_t result;
gkroussos 0:637031152314 427
gkroussos 0:637031152314 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
gkroussos 0:637031152314 429 return(result);
gkroussos 0:637031152314 430 }
gkroussos 0:637031152314 431
gkroussos 0:637031152314 432
gkroussos 0:637031152314 433 /** \brief Reverse byte order in signed short value
gkroussos 0:637031152314 434
gkroussos 0:637031152314 435 This function reverses the byte order in a signed short value with sign extension to integer.
gkroussos 0:637031152314 436
gkroussos 0:637031152314 437 \param [in] value Value to reverse
gkroussos 0:637031152314 438 \return Reversed value
gkroussos 0:637031152314 439 */
gkroussos 0:637031152314 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
gkroussos 0:637031152314 441 {
gkroussos 0:637031152314 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
gkroussos 0:637031152314 443 return (short)__builtin_bswap16(value);
gkroussos 0:637031152314 444 #else
gkroussos 0:637031152314 445 uint32_t result;
gkroussos 0:637031152314 446
gkroussos 0:637031152314 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
gkroussos 0:637031152314 448 return(result);
gkroussos 0:637031152314 449 #endif
gkroussos 0:637031152314 450 }
gkroussos 0:637031152314 451
gkroussos 0:637031152314 452
gkroussos 0:637031152314 453 /** \brief Rotate Right in unsigned value (32 bit)
gkroussos 0:637031152314 454
gkroussos 0:637031152314 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
gkroussos 0:637031152314 456
gkroussos 0:637031152314 457 \param [in] value Value to rotate
gkroussos 0:637031152314 458 \param [in] value Number of Bits to rotate
gkroussos 0:637031152314 459 \return Rotated value
gkroussos 0:637031152314 460 */
gkroussos 0:637031152314 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
gkroussos 0:637031152314 462 {
gkroussos 0:637031152314 463 return (op1 >> op2) | (op1 << (32 - op2));
gkroussos 0:637031152314 464 }
gkroussos 0:637031152314 465
gkroussos 0:637031152314 466
gkroussos 0:637031152314 467 /** \brief Breakpoint
gkroussos 0:637031152314 468
gkroussos 0:637031152314 469 This function causes the processor to enter Debug state.
gkroussos 0:637031152314 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
gkroussos 0:637031152314 471
gkroussos 0:637031152314 472 \param [in] value is ignored by the processor.
gkroussos 0:637031152314 473 If required, a debugger can use it to store additional information about the breakpoint.
gkroussos 0:637031152314 474 */
gkroussos 0:637031152314 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
gkroussos 0:637031152314 476
gkroussos 0:637031152314 477
gkroussos 0:637031152314 478 #if (__CORTEX_M >= 0x03)
gkroussos 0:637031152314 479
gkroussos 0:637031152314 480 /** \brief Reverse bit order of value
gkroussos 0:637031152314 481
gkroussos 0:637031152314 482 This function reverses the bit order of the given value.
gkroussos 0:637031152314 483
gkroussos 0:637031152314 484 \param [in] value Value to reverse
gkroussos 0:637031152314 485 \return Reversed value
gkroussos 0:637031152314 486 */
gkroussos 0:637031152314 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
gkroussos 0:637031152314 488 {
gkroussos 0:637031152314 489 uint32_t result;
gkroussos 0:637031152314 490
gkroussos 0:637031152314 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
gkroussos 0:637031152314 492 return(result);
gkroussos 0:637031152314 493 }
gkroussos 0:637031152314 494
gkroussos 0:637031152314 495
gkroussos 0:637031152314 496 /** \brief LDR Exclusive (8 bit)
gkroussos 0:637031152314 497
gkroussos 0:637031152314 498 This function performs a exclusive LDR command for 8 bit value.
gkroussos 0:637031152314 499
gkroussos 0:637031152314 500 \param [in] ptr Pointer to data
gkroussos 0:637031152314 501 \return value of type uint8_t at (*ptr)
gkroussos 0:637031152314 502 */
gkroussos 0:637031152314 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
gkroussos 0:637031152314 504 {
gkroussos 0:637031152314 505 uint32_t result;
gkroussos 0:637031152314 506
gkroussos 0:637031152314 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
gkroussos 0:637031152314 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
gkroussos 0:637031152314 509 #else
gkroussos 0:637031152314 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
gkroussos 0:637031152314 511 accepted by assembler. So has to use following less efficient pattern.
gkroussos 0:637031152314 512 */
gkroussos 0:637031152314 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
gkroussos 0:637031152314 514 #endif
gkroussos 0:637031152314 515 return(result);
gkroussos 0:637031152314 516 }
gkroussos 0:637031152314 517
gkroussos 0:637031152314 518
gkroussos 0:637031152314 519 /** \brief LDR Exclusive (16 bit)
gkroussos 0:637031152314 520
gkroussos 0:637031152314 521 This function performs a exclusive LDR command for 16 bit values.
gkroussos 0:637031152314 522
gkroussos 0:637031152314 523 \param [in] ptr Pointer to data
gkroussos 0:637031152314 524 \return value of type uint16_t at (*ptr)
gkroussos 0:637031152314 525 */
gkroussos 0:637031152314 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
gkroussos 0:637031152314 527 {
gkroussos 0:637031152314 528 uint32_t result;
gkroussos 0:637031152314 529
gkroussos 0:637031152314 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
gkroussos 0:637031152314 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
gkroussos 0:637031152314 532 #else
gkroussos 0:637031152314 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
gkroussos 0:637031152314 534 accepted by assembler. So has to use following less efficient pattern.
gkroussos 0:637031152314 535 */
gkroussos 0:637031152314 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
gkroussos 0:637031152314 537 #endif
gkroussos 0:637031152314 538 return(result);
gkroussos 0:637031152314 539 }
gkroussos 0:637031152314 540
gkroussos 0:637031152314 541
gkroussos 0:637031152314 542 /** \brief LDR Exclusive (32 bit)
gkroussos 0:637031152314 543
gkroussos 0:637031152314 544 This function performs a exclusive LDR command for 32 bit values.
gkroussos 0:637031152314 545
gkroussos 0:637031152314 546 \param [in] ptr Pointer to data
gkroussos 0:637031152314 547 \return value of type uint32_t at (*ptr)
gkroussos 0:637031152314 548 */
gkroussos 0:637031152314 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
gkroussos 0:637031152314 550 {
gkroussos 0:637031152314 551 uint32_t result;
gkroussos 0:637031152314 552
gkroussos 0:637031152314 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
gkroussos 0:637031152314 554 return(result);
gkroussos 0:637031152314 555 }
gkroussos 0:637031152314 556
gkroussos 0:637031152314 557
gkroussos 0:637031152314 558 /** \brief STR Exclusive (8 bit)
gkroussos 0:637031152314 559
gkroussos 0:637031152314 560 This function performs a exclusive STR command for 8 bit values.
gkroussos 0:637031152314 561
gkroussos 0:637031152314 562 \param [in] value Value to store
gkroussos 0:637031152314 563 \param [in] ptr Pointer to location
gkroussos 0:637031152314 564 \return 0 Function succeeded
gkroussos 0:637031152314 565 \return 1 Function failed
gkroussos 0:637031152314 566 */
gkroussos 0:637031152314 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
gkroussos 0:637031152314 568 {
gkroussos 0:637031152314 569 uint32_t result;
gkroussos 0:637031152314 570
gkroussos 0:637031152314 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
gkroussos 0:637031152314 572 return(result);
gkroussos 0:637031152314 573 }
gkroussos 0:637031152314 574
gkroussos 0:637031152314 575
gkroussos 0:637031152314 576 /** \brief STR Exclusive (16 bit)
gkroussos 0:637031152314 577
gkroussos 0:637031152314 578 This function performs a exclusive STR command for 16 bit values.
gkroussos 0:637031152314 579
gkroussos 0:637031152314 580 \param [in] value Value to store
gkroussos 0:637031152314 581 \param [in] ptr Pointer to location
gkroussos 0:637031152314 582 \return 0 Function succeeded
gkroussos 0:637031152314 583 \return 1 Function failed
gkroussos 0:637031152314 584 */
gkroussos 0:637031152314 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
gkroussos 0:637031152314 586 {
gkroussos 0:637031152314 587 uint32_t result;
gkroussos 0:637031152314 588
gkroussos 0:637031152314 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
gkroussos 0:637031152314 590 return(result);
gkroussos 0:637031152314 591 }
gkroussos 0:637031152314 592
gkroussos 0:637031152314 593
gkroussos 0:637031152314 594 /** \brief STR Exclusive (32 bit)
gkroussos 0:637031152314 595
gkroussos 0:637031152314 596 This function performs a exclusive STR command for 32 bit values.
gkroussos 0:637031152314 597
gkroussos 0:637031152314 598 \param [in] value Value to store
gkroussos 0:637031152314 599 \param [in] ptr Pointer to location
gkroussos 0:637031152314 600 \return 0 Function succeeded
gkroussos 0:637031152314 601 \return 1 Function failed
gkroussos 0:637031152314 602 */
gkroussos 0:637031152314 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
gkroussos 0:637031152314 604 {
gkroussos 0:637031152314 605 uint32_t result;
gkroussos 0:637031152314 606
gkroussos 0:637031152314 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
gkroussos 0:637031152314 608 return(result);
gkroussos 0:637031152314 609 }
gkroussos 0:637031152314 610
gkroussos 0:637031152314 611
gkroussos 0:637031152314 612 /** \brief Remove the exclusive lock
gkroussos 0:637031152314 613
gkroussos 0:637031152314 614 This function removes the exclusive lock which is created by LDREX.
gkroussos 0:637031152314 615
gkroussos 0:637031152314 616 */
gkroussos 0:637031152314 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
gkroussos 0:637031152314 618 {
gkroussos 0:637031152314 619 __ASM volatile ("clrex" ::: "memory");
gkroussos 0:637031152314 620 }
gkroussos 0:637031152314 621
gkroussos 0:637031152314 622
gkroussos 0:637031152314 623 /** \brief Signed Saturate
gkroussos 0:637031152314 624
gkroussos 0:637031152314 625 This function saturates a signed value.
gkroussos 0:637031152314 626
gkroussos 0:637031152314 627 \param [in] value Value to be saturated
gkroussos 0:637031152314 628 \param [in] sat Bit position to saturate to (1..32)
gkroussos 0:637031152314 629 \return Saturated value
gkroussos 0:637031152314 630 */
gkroussos 0:637031152314 631 #define __SSAT(ARG1,ARG2) \
gkroussos 0:637031152314 632 ({ \
gkroussos 0:637031152314 633 uint32_t __RES, __ARG1 = (ARG1); \
gkroussos 0:637031152314 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
gkroussos 0:637031152314 635 __RES; \
gkroussos 0:637031152314 636 })
gkroussos 0:637031152314 637
gkroussos 0:637031152314 638
gkroussos 0:637031152314 639 /** \brief Unsigned Saturate
gkroussos 0:637031152314 640
gkroussos 0:637031152314 641 This function saturates an unsigned value.
gkroussos 0:637031152314 642
gkroussos 0:637031152314 643 \param [in] value Value to be saturated
gkroussos 0:637031152314 644 \param [in] sat Bit position to saturate to (0..31)
gkroussos 0:637031152314 645 \return Saturated value
gkroussos 0:637031152314 646 */
gkroussos 0:637031152314 647 #define __USAT(ARG1,ARG2) \
gkroussos 0:637031152314 648 ({ \
gkroussos 0:637031152314 649 uint32_t __RES, __ARG1 = (ARG1); \
gkroussos 0:637031152314 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
gkroussos 0:637031152314 651 __RES; \
gkroussos 0:637031152314 652 })
gkroussos 0:637031152314 653
gkroussos 0:637031152314 654
gkroussos 0:637031152314 655 /** \brief Count leading zeros
gkroussos 0:637031152314 656
gkroussos 0:637031152314 657 This function counts the number of leading zeros of a data value.
gkroussos 0:637031152314 658
gkroussos 0:637031152314 659 \param [in] value Value to count the leading zeros
gkroussos 0:637031152314 660 \return number of leading zeros in value
gkroussos 0:637031152314 661 */
gkroussos 0:637031152314 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
gkroussos 0:637031152314 663 {
gkroussos 0:637031152314 664 uint32_t result;
gkroussos 0:637031152314 665
gkroussos 0:637031152314 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
gkroussos 0:637031152314 667 return(result);
gkroussos 0:637031152314 668 }
gkroussos 0:637031152314 669
gkroussos 0:637031152314 670 #endif /* (__CORTEX_M >= 0x03) */
gkroussos 0:637031152314 671
gkroussos 0:637031152314 672
gkroussos 0:637031152314 673
gkroussos 0:637031152314 674
gkroussos 0:637031152314 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
gkroussos 0:637031152314 676 /* TASKING carm specific functions */
gkroussos 0:637031152314 677
gkroussos 0:637031152314 678 /*
gkroussos 0:637031152314 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
gkroussos 0:637031152314 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
gkroussos 0:637031152314 681 * Including the CMSIS ones.
gkroussos 0:637031152314 682 */
gkroussos 0:637031152314 683
gkroussos 0:637031152314 684 #endif
gkroussos 0:637031152314 685
gkroussos 0:637031152314 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
gkroussos 0:637031152314 687
gkroussos 0:637031152314 688 #endif /* __CORE_CMINSTR_H */