BLE temperature profile using digital DS1820 or analog LM35 sensors

Dependencies:   DS1820

Committer:
gkroussos
Date:
Sat Mar 07 16:23:41 2015 +0000
Revision:
0:637031152314
Working version 1.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gkroussos 0:637031152314 1 /**************************************************************************//**
gkroussos 0:637031152314 2 * @file core_cmFunc.h
gkroussos 0:637031152314 3 * @brief CMSIS Cortex-M Core Function Access Header File
gkroussos 0:637031152314 4 * @version V3.20
gkroussos 0:637031152314 5 * @date 25. February 2013
gkroussos 0:637031152314 6 *
gkroussos 0:637031152314 7 * @note
gkroussos 0:637031152314 8 *
gkroussos 0:637031152314 9 ******************************************************************************/
gkroussos 0:637031152314 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
gkroussos 0:637031152314 11
gkroussos 0:637031152314 12 All rights reserved.
gkroussos 0:637031152314 13 Redistribution and use in source and binary forms, with or without
gkroussos 0:637031152314 14 modification, are permitted provided that the following conditions are met:
gkroussos 0:637031152314 15 - Redistributions of source code must retain the above copyright
gkroussos 0:637031152314 16 notice, this list of conditions and the following disclaimer.
gkroussos 0:637031152314 17 - Redistributions in binary form must reproduce the above copyright
gkroussos 0:637031152314 18 notice, this list of conditions and the following disclaimer in the
gkroussos 0:637031152314 19 documentation and/or other materials provided with the distribution.
gkroussos 0:637031152314 20 - Neither the name of ARM nor the names of its contributors may be used
gkroussos 0:637031152314 21 to endorse or promote products derived from this software without
gkroussos 0:637031152314 22 specific prior written permission.
gkroussos 0:637031152314 23 *
gkroussos 0:637031152314 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
gkroussos 0:637031152314 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
gkroussos 0:637031152314 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
gkroussos 0:637031152314 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
gkroussos 0:637031152314 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
gkroussos 0:637031152314 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
gkroussos 0:637031152314 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
gkroussos 0:637031152314 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
gkroussos 0:637031152314 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
gkroussos 0:637031152314 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
gkroussos 0:637031152314 34 POSSIBILITY OF SUCH DAMAGE.
gkroussos 0:637031152314 35 ---------------------------------------------------------------------------*/
gkroussos 0:637031152314 36
gkroussos 0:637031152314 37
gkroussos 0:637031152314 38 #ifndef __CORE_CMFUNC_H
gkroussos 0:637031152314 39 #define __CORE_CMFUNC_H
gkroussos 0:637031152314 40
gkroussos 0:637031152314 41
gkroussos 0:637031152314 42 /* ########################### Core Function Access ########################### */
gkroussos 0:637031152314 43 /** \ingroup CMSIS_Core_FunctionInterface
gkroussos 0:637031152314 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
gkroussos 0:637031152314 45 @{
gkroussos 0:637031152314 46 */
gkroussos 0:637031152314 47
gkroussos 0:637031152314 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
gkroussos 0:637031152314 49 /* ARM armcc specific functions */
gkroussos 0:637031152314 50
gkroussos 0:637031152314 51 #if (__ARMCC_VERSION < 400677)
gkroussos 0:637031152314 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
gkroussos 0:637031152314 53 #endif
gkroussos 0:637031152314 54
gkroussos 0:637031152314 55 /* intrinsic void __enable_irq(); */
gkroussos 0:637031152314 56 /* intrinsic void __disable_irq(); */
gkroussos 0:637031152314 57
gkroussos 0:637031152314 58 /** \brief Get Control Register
gkroussos 0:637031152314 59
gkroussos 0:637031152314 60 This function returns the content of the Control Register.
gkroussos 0:637031152314 61
gkroussos 0:637031152314 62 \return Control Register value
gkroussos 0:637031152314 63 */
gkroussos 0:637031152314 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
gkroussos 0:637031152314 65 {
gkroussos 0:637031152314 66 register uint32_t __regControl __ASM("control");
gkroussos 0:637031152314 67 return(__regControl);
gkroussos 0:637031152314 68 }
gkroussos 0:637031152314 69
gkroussos 0:637031152314 70
gkroussos 0:637031152314 71 /** \brief Set Control Register
gkroussos 0:637031152314 72
gkroussos 0:637031152314 73 This function writes the given value to the Control Register.
gkroussos 0:637031152314 74
gkroussos 0:637031152314 75 \param [in] control Control Register value to set
gkroussos 0:637031152314 76 */
gkroussos 0:637031152314 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
gkroussos 0:637031152314 78 {
gkroussos 0:637031152314 79 register uint32_t __regControl __ASM("control");
gkroussos 0:637031152314 80 __regControl = control;
gkroussos 0:637031152314 81 }
gkroussos 0:637031152314 82
gkroussos 0:637031152314 83
gkroussos 0:637031152314 84 /** \brief Get IPSR Register
gkroussos 0:637031152314 85
gkroussos 0:637031152314 86 This function returns the content of the IPSR Register.
gkroussos 0:637031152314 87
gkroussos 0:637031152314 88 \return IPSR Register value
gkroussos 0:637031152314 89 */
gkroussos 0:637031152314 90 __STATIC_INLINE uint32_t __get_IPSR(void)
gkroussos 0:637031152314 91 {
gkroussos 0:637031152314 92 register uint32_t __regIPSR __ASM("ipsr");
gkroussos 0:637031152314 93 return(__regIPSR);
gkroussos 0:637031152314 94 }
gkroussos 0:637031152314 95
gkroussos 0:637031152314 96
gkroussos 0:637031152314 97 /** \brief Get APSR Register
gkroussos 0:637031152314 98
gkroussos 0:637031152314 99 This function returns the content of the APSR Register.
gkroussos 0:637031152314 100
gkroussos 0:637031152314 101 \return APSR Register value
gkroussos 0:637031152314 102 */
gkroussos 0:637031152314 103 __STATIC_INLINE uint32_t __get_APSR(void)
gkroussos 0:637031152314 104 {
gkroussos 0:637031152314 105 register uint32_t __regAPSR __ASM("apsr");
gkroussos 0:637031152314 106 return(__regAPSR);
gkroussos 0:637031152314 107 }
gkroussos 0:637031152314 108
gkroussos 0:637031152314 109
gkroussos 0:637031152314 110 /** \brief Get xPSR Register
gkroussos 0:637031152314 111
gkroussos 0:637031152314 112 This function returns the content of the xPSR Register.
gkroussos 0:637031152314 113
gkroussos 0:637031152314 114 \return xPSR Register value
gkroussos 0:637031152314 115 */
gkroussos 0:637031152314 116 __STATIC_INLINE uint32_t __get_xPSR(void)
gkroussos 0:637031152314 117 {
gkroussos 0:637031152314 118 register uint32_t __regXPSR __ASM("xpsr");
gkroussos 0:637031152314 119 return(__regXPSR);
gkroussos 0:637031152314 120 }
gkroussos 0:637031152314 121
gkroussos 0:637031152314 122
gkroussos 0:637031152314 123 /** \brief Get Process Stack Pointer
gkroussos 0:637031152314 124
gkroussos 0:637031152314 125 This function returns the current value of the Process Stack Pointer (PSP).
gkroussos 0:637031152314 126
gkroussos 0:637031152314 127 \return PSP Register value
gkroussos 0:637031152314 128 */
gkroussos 0:637031152314 129 __STATIC_INLINE uint32_t __get_PSP(void)
gkroussos 0:637031152314 130 {
gkroussos 0:637031152314 131 register uint32_t __regProcessStackPointer __ASM("psp");
gkroussos 0:637031152314 132 return(__regProcessStackPointer);
gkroussos 0:637031152314 133 }
gkroussos 0:637031152314 134
gkroussos 0:637031152314 135
gkroussos 0:637031152314 136 /** \brief Set Process Stack Pointer
gkroussos 0:637031152314 137
gkroussos 0:637031152314 138 This function assigns the given value to the Process Stack Pointer (PSP).
gkroussos 0:637031152314 139
gkroussos 0:637031152314 140 \param [in] topOfProcStack Process Stack Pointer value to set
gkroussos 0:637031152314 141 */
gkroussos 0:637031152314 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
gkroussos 0:637031152314 143 {
gkroussos 0:637031152314 144 register uint32_t __regProcessStackPointer __ASM("psp");
gkroussos 0:637031152314 145 __regProcessStackPointer = topOfProcStack;
gkroussos 0:637031152314 146 }
gkroussos 0:637031152314 147
gkroussos 0:637031152314 148
gkroussos 0:637031152314 149 /** \brief Get Main Stack Pointer
gkroussos 0:637031152314 150
gkroussos 0:637031152314 151 This function returns the current value of the Main Stack Pointer (MSP).
gkroussos 0:637031152314 152
gkroussos 0:637031152314 153 \return MSP Register value
gkroussos 0:637031152314 154 */
gkroussos 0:637031152314 155 __STATIC_INLINE uint32_t __get_MSP(void)
gkroussos 0:637031152314 156 {
gkroussos 0:637031152314 157 register uint32_t __regMainStackPointer __ASM("msp");
gkroussos 0:637031152314 158 return(__regMainStackPointer);
gkroussos 0:637031152314 159 }
gkroussos 0:637031152314 160
gkroussos 0:637031152314 161
gkroussos 0:637031152314 162 /** \brief Set Main Stack Pointer
gkroussos 0:637031152314 163
gkroussos 0:637031152314 164 This function assigns the given value to the Main Stack Pointer (MSP).
gkroussos 0:637031152314 165
gkroussos 0:637031152314 166 \param [in] topOfMainStack Main Stack Pointer value to set
gkroussos 0:637031152314 167 */
gkroussos 0:637031152314 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
gkroussos 0:637031152314 169 {
gkroussos 0:637031152314 170 register uint32_t __regMainStackPointer __ASM("msp");
gkroussos 0:637031152314 171 __regMainStackPointer = topOfMainStack;
gkroussos 0:637031152314 172 }
gkroussos 0:637031152314 173
gkroussos 0:637031152314 174
gkroussos 0:637031152314 175 /** \brief Get Priority Mask
gkroussos 0:637031152314 176
gkroussos 0:637031152314 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
gkroussos 0:637031152314 178
gkroussos 0:637031152314 179 \return Priority Mask value
gkroussos 0:637031152314 180 */
gkroussos 0:637031152314 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
gkroussos 0:637031152314 182 {
gkroussos 0:637031152314 183 register uint32_t __regPriMask __ASM("primask");
gkroussos 0:637031152314 184 return(__regPriMask);
gkroussos 0:637031152314 185 }
gkroussos 0:637031152314 186
gkroussos 0:637031152314 187
gkroussos 0:637031152314 188 /** \brief Set Priority Mask
gkroussos 0:637031152314 189
gkroussos 0:637031152314 190 This function assigns the given value to the Priority Mask Register.
gkroussos 0:637031152314 191
gkroussos 0:637031152314 192 \param [in] priMask Priority Mask
gkroussos 0:637031152314 193 */
gkroussos 0:637031152314 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
gkroussos 0:637031152314 195 {
gkroussos 0:637031152314 196 register uint32_t __regPriMask __ASM("primask");
gkroussos 0:637031152314 197 __regPriMask = (priMask);
gkroussos 0:637031152314 198 }
gkroussos 0:637031152314 199
gkroussos 0:637031152314 200
gkroussos 0:637031152314 201 #if (__CORTEX_M >= 0x03)
gkroussos 0:637031152314 202
gkroussos 0:637031152314 203 /** \brief Enable FIQ
gkroussos 0:637031152314 204
gkroussos 0:637031152314 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
gkroussos 0:637031152314 206 Can only be executed in Privileged modes.
gkroussos 0:637031152314 207 */
gkroussos 0:637031152314 208 #define __enable_fault_irq __enable_fiq
gkroussos 0:637031152314 209
gkroussos 0:637031152314 210
gkroussos 0:637031152314 211 /** \brief Disable FIQ
gkroussos 0:637031152314 212
gkroussos 0:637031152314 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
gkroussos 0:637031152314 214 Can only be executed in Privileged modes.
gkroussos 0:637031152314 215 */
gkroussos 0:637031152314 216 #define __disable_fault_irq __disable_fiq
gkroussos 0:637031152314 217
gkroussos 0:637031152314 218
gkroussos 0:637031152314 219 /** \brief Get Base Priority
gkroussos 0:637031152314 220
gkroussos 0:637031152314 221 This function returns the current value of the Base Priority register.
gkroussos 0:637031152314 222
gkroussos 0:637031152314 223 \return Base Priority register value
gkroussos 0:637031152314 224 */
gkroussos 0:637031152314 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
gkroussos 0:637031152314 226 {
gkroussos 0:637031152314 227 register uint32_t __regBasePri __ASM("basepri");
gkroussos 0:637031152314 228 return(__regBasePri);
gkroussos 0:637031152314 229 }
gkroussos 0:637031152314 230
gkroussos 0:637031152314 231
gkroussos 0:637031152314 232 /** \brief Set Base Priority
gkroussos 0:637031152314 233
gkroussos 0:637031152314 234 This function assigns the given value to the Base Priority register.
gkroussos 0:637031152314 235
gkroussos 0:637031152314 236 \param [in] basePri Base Priority value to set
gkroussos 0:637031152314 237 */
gkroussos 0:637031152314 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
gkroussos 0:637031152314 239 {
gkroussos 0:637031152314 240 register uint32_t __regBasePri __ASM("basepri");
gkroussos 0:637031152314 241 __regBasePri = (basePri & 0xff);
gkroussos 0:637031152314 242 }
gkroussos 0:637031152314 243
gkroussos 0:637031152314 244
gkroussos 0:637031152314 245 /** \brief Get Fault Mask
gkroussos 0:637031152314 246
gkroussos 0:637031152314 247 This function returns the current value of the Fault Mask register.
gkroussos 0:637031152314 248
gkroussos 0:637031152314 249 \return Fault Mask register value
gkroussos 0:637031152314 250 */
gkroussos 0:637031152314 251 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
gkroussos 0:637031152314 252 {
gkroussos 0:637031152314 253 register uint32_t __regFaultMask __ASM("faultmask");
gkroussos 0:637031152314 254 return(__regFaultMask);
gkroussos 0:637031152314 255 }
gkroussos 0:637031152314 256
gkroussos 0:637031152314 257
gkroussos 0:637031152314 258 /** \brief Set Fault Mask
gkroussos 0:637031152314 259
gkroussos 0:637031152314 260 This function assigns the given value to the Fault Mask register.
gkroussos 0:637031152314 261
gkroussos 0:637031152314 262 \param [in] faultMask Fault Mask value to set
gkroussos 0:637031152314 263 */
gkroussos 0:637031152314 264 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
gkroussos 0:637031152314 265 {
gkroussos 0:637031152314 266 register uint32_t __regFaultMask __ASM("faultmask");
gkroussos 0:637031152314 267 __regFaultMask = (faultMask & (uint32_t)1);
gkroussos 0:637031152314 268 }
gkroussos 0:637031152314 269
gkroussos 0:637031152314 270 #endif /* (__CORTEX_M >= 0x03) */
gkroussos 0:637031152314 271
gkroussos 0:637031152314 272
gkroussos 0:637031152314 273 #if (__CORTEX_M == 0x04)
gkroussos 0:637031152314 274
gkroussos 0:637031152314 275 /** \brief Get FPSCR
gkroussos 0:637031152314 276
gkroussos 0:637031152314 277 This function returns the current value of the Floating Point Status/Control register.
gkroussos 0:637031152314 278
gkroussos 0:637031152314 279 \return Floating Point Status/Control register value
gkroussos 0:637031152314 280 */
gkroussos 0:637031152314 281 __STATIC_INLINE uint32_t __get_FPSCR(void)
gkroussos 0:637031152314 282 {
gkroussos 0:637031152314 283 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
gkroussos 0:637031152314 284 register uint32_t __regfpscr __ASM("fpscr");
gkroussos 0:637031152314 285 return(__regfpscr);
gkroussos 0:637031152314 286 #else
gkroussos 0:637031152314 287 return(0);
gkroussos 0:637031152314 288 #endif
gkroussos 0:637031152314 289 }
gkroussos 0:637031152314 290
gkroussos 0:637031152314 291
gkroussos 0:637031152314 292 /** \brief Set FPSCR
gkroussos 0:637031152314 293
gkroussos 0:637031152314 294 This function assigns the given value to the Floating Point Status/Control register.
gkroussos 0:637031152314 295
gkroussos 0:637031152314 296 \param [in] fpscr Floating Point Status/Control value to set
gkroussos 0:637031152314 297 */
gkroussos 0:637031152314 298 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
gkroussos 0:637031152314 299 {
gkroussos 0:637031152314 300 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
gkroussos 0:637031152314 301 register uint32_t __regfpscr __ASM("fpscr");
gkroussos 0:637031152314 302 __regfpscr = (fpscr);
gkroussos 0:637031152314 303 #endif
gkroussos 0:637031152314 304 }
gkroussos 0:637031152314 305
gkroussos 0:637031152314 306 #endif /* (__CORTEX_M == 0x04) */
gkroussos 0:637031152314 307
gkroussos 0:637031152314 308
gkroussos 0:637031152314 309 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
gkroussos 0:637031152314 310 /* IAR iccarm specific functions */
gkroussos 0:637031152314 311
gkroussos 0:637031152314 312 #include <cmsis_iar.h>
gkroussos 0:637031152314 313
gkroussos 0:637031152314 314
gkroussos 0:637031152314 315 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
gkroussos 0:637031152314 316 /* TI CCS specific functions */
gkroussos 0:637031152314 317
gkroussos 0:637031152314 318 #include <cmsis_ccs.h>
gkroussos 0:637031152314 319
gkroussos 0:637031152314 320
gkroussos 0:637031152314 321 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
gkroussos 0:637031152314 322 /* GNU gcc specific functions */
gkroussos 0:637031152314 323
gkroussos 0:637031152314 324 /** \brief Enable IRQ Interrupts
gkroussos 0:637031152314 325
gkroussos 0:637031152314 326 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
gkroussos 0:637031152314 327 Can only be executed in Privileged modes.
gkroussos 0:637031152314 328 */
gkroussos 0:637031152314 329 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
gkroussos 0:637031152314 330 {
gkroussos 0:637031152314 331 __ASM volatile ("cpsie i" : : : "memory");
gkroussos 0:637031152314 332 }
gkroussos 0:637031152314 333
gkroussos 0:637031152314 334
gkroussos 0:637031152314 335 /** \brief Disable IRQ Interrupts
gkroussos 0:637031152314 336
gkroussos 0:637031152314 337 This function disables IRQ interrupts by setting the I-bit in the CPSR.
gkroussos 0:637031152314 338 Can only be executed in Privileged modes.
gkroussos 0:637031152314 339 */
gkroussos 0:637031152314 340 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
gkroussos 0:637031152314 341 {
gkroussos 0:637031152314 342 __ASM volatile ("cpsid i" : : : "memory");
gkroussos 0:637031152314 343 }
gkroussos 0:637031152314 344
gkroussos 0:637031152314 345
gkroussos 0:637031152314 346 /** \brief Get Control Register
gkroussos 0:637031152314 347
gkroussos 0:637031152314 348 This function returns the content of the Control Register.
gkroussos 0:637031152314 349
gkroussos 0:637031152314 350 \return Control Register value
gkroussos 0:637031152314 351 */
gkroussos 0:637031152314 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
gkroussos 0:637031152314 353 {
gkroussos 0:637031152314 354 uint32_t result;
gkroussos 0:637031152314 355
gkroussos 0:637031152314 356 __ASM volatile ("MRS %0, control" : "=r" (result) );
gkroussos 0:637031152314 357 return(result);
gkroussos 0:637031152314 358 }
gkroussos 0:637031152314 359
gkroussos 0:637031152314 360
gkroussos 0:637031152314 361 /** \brief Set Control Register
gkroussos 0:637031152314 362
gkroussos 0:637031152314 363 This function writes the given value to the Control Register.
gkroussos 0:637031152314 364
gkroussos 0:637031152314 365 \param [in] control Control Register value to set
gkroussos 0:637031152314 366 */
gkroussos 0:637031152314 367 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
gkroussos 0:637031152314 368 {
gkroussos 0:637031152314 369 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
gkroussos 0:637031152314 370 }
gkroussos 0:637031152314 371
gkroussos 0:637031152314 372
gkroussos 0:637031152314 373 /** \brief Get IPSR Register
gkroussos 0:637031152314 374
gkroussos 0:637031152314 375 This function returns the content of the IPSR Register.
gkroussos 0:637031152314 376
gkroussos 0:637031152314 377 \return IPSR Register value
gkroussos 0:637031152314 378 */
gkroussos 0:637031152314 379 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
gkroussos 0:637031152314 380 {
gkroussos 0:637031152314 381 uint32_t result;
gkroussos 0:637031152314 382
gkroussos 0:637031152314 383 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
gkroussos 0:637031152314 384 return(result);
gkroussos 0:637031152314 385 }
gkroussos 0:637031152314 386
gkroussos 0:637031152314 387
gkroussos 0:637031152314 388 /** \brief Get APSR Register
gkroussos 0:637031152314 389
gkroussos 0:637031152314 390 This function returns the content of the APSR Register.
gkroussos 0:637031152314 391
gkroussos 0:637031152314 392 \return APSR Register value
gkroussos 0:637031152314 393 */
gkroussos 0:637031152314 394 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
gkroussos 0:637031152314 395 {
gkroussos 0:637031152314 396 uint32_t result;
gkroussos 0:637031152314 397
gkroussos 0:637031152314 398 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
gkroussos 0:637031152314 399 return(result);
gkroussos 0:637031152314 400 }
gkroussos 0:637031152314 401
gkroussos 0:637031152314 402
gkroussos 0:637031152314 403 /** \brief Get xPSR Register
gkroussos 0:637031152314 404
gkroussos 0:637031152314 405 This function returns the content of the xPSR Register.
gkroussos 0:637031152314 406
gkroussos 0:637031152314 407 \return xPSR Register value
gkroussos 0:637031152314 408 */
gkroussos 0:637031152314 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
gkroussos 0:637031152314 410 {
gkroussos 0:637031152314 411 uint32_t result;
gkroussos 0:637031152314 412
gkroussos 0:637031152314 413 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
gkroussos 0:637031152314 414 return(result);
gkroussos 0:637031152314 415 }
gkroussos 0:637031152314 416
gkroussos 0:637031152314 417
gkroussos 0:637031152314 418 /** \brief Get Process Stack Pointer
gkroussos 0:637031152314 419
gkroussos 0:637031152314 420 This function returns the current value of the Process Stack Pointer (PSP).
gkroussos 0:637031152314 421
gkroussos 0:637031152314 422 \return PSP Register value
gkroussos 0:637031152314 423 */
gkroussos 0:637031152314 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
gkroussos 0:637031152314 425 {
gkroussos 0:637031152314 426 register uint32_t result;
gkroussos 0:637031152314 427
gkroussos 0:637031152314 428 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
gkroussos 0:637031152314 429 return(result);
gkroussos 0:637031152314 430 }
gkroussos 0:637031152314 431
gkroussos 0:637031152314 432
gkroussos 0:637031152314 433 /** \brief Set Process Stack Pointer
gkroussos 0:637031152314 434
gkroussos 0:637031152314 435 This function assigns the given value to the Process Stack Pointer (PSP).
gkroussos 0:637031152314 436
gkroussos 0:637031152314 437 \param [in] topOfProcStack Process Stack Pointer value to set
gkroussos 0:637031152314 438 */
gkroussos 0:637031152314 439 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
gkroussos 0:637031152314 440 {
gkroussos 0:637031152314 441 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
gkroussos 0:637031152314 442 }
gkroussos 0:637031152314 443
gkroussos 0:637031152314 444
gkroussos 0:637031152314 445 /** \brief Get Main Stack Pointer
gkroussos 0:637031152314 446
gkroussos 0:637031152314 447 This function returns the current value of the Main Stack Pointer (MSP).
gkroussos 0:637031152314 448
gkroussos 0:637031152314 449 \return MSP Register value
gkroussos 0:637031152314 450 */
gkroussos 0:637031152314 451 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
gkroussos 0:637031152314 452 {
gkroussos 0:637031152314 453 register uint32_t result;
gkroussos 0:637031152314 454
gkroussos 0:637031152314 455 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
gkroussos 0:637031152314 456 return(result);
gkroussos 0:637031152314 457 }
gkroussos 0:637031152314 458
gkroussos 0:637031152314 459
gkroussos 0:637031152314 460 /** \brief Set Main Stack Pointer
gkroussos 0:637031152314 461
gkroussos 0:637031152314 462 This function assigns the given value to the Main Stack Pointer (MSP).
gkroussos 0:637031152314 463
gkroussos 0:637031152314 464 \param [in] topOfMainStack Main Stack Pointer value to set
gkroussos 0:637031152314 465 */
gkroussos 0:637031152314 466 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
gkroussos 0:637031152314 467 {
gkroussos 0:637031152314 468 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
gkroussos 0:637031152314 469 }
gkroussos 0:637031152314 470
gkroussos 0:637031152314 471
gkroussos 0:637031152314 472 /** \brief Get Priority Mask
gkroussos 0:637031152314 473
gkroussos 0:637031152314 474 This function returns the current state of the priority mask bit from the Priority Mask Register.
gkroussos 0:637031152314 475
gkroussos 0:637031152314 476 \return Priority Mask value
gkroussos 0:637031152314 477 */
gkroussos 0:637031152314 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
gkroussos 0:637031152314 479 {
gkroussos 0:637031152314 480 uint32_t result;
gkroussos 0:637031152314 481
gkroussos 0:637031152314 482 __ASM volatile ("MRS %0, primask" : "=r" (result) );
gkroussos 0:637031152314 483 return(result);
gkroussos 0:637031152314 484 }
gkroussos 0:637031152314 485
gkroussos 0:637031152314 486
gkroussos 0:637031152314 487 /** \brief Set Priority Mask
gkroussos 0:637031152314 488
gkroussos 0:637031152314 489 This function assigns the given value to the Priority Mask Register.
gkroussos 0:637031152314 490
gkroussos 0:637031152314 491 \param [in] priMask Priority Mask
gkroussos 0:637031152314 492 */
gkroussos 0:637031152314 493 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
gkroussos 0:637031152314 494 {
gkroussos 0:637031152314 495 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
gkroussos 0:637031152314 496 }
gkroussos 0:637031152314 497
gkroussos 0:637031152314 498
gkroussos 0:637031152314 499 #if (__CORTEX_M >= 0x03)
gkroussos 0:637031152314 500
gkroussos 0:637031152314 501 /** \brief Enable FIQ
gkroussos 0:637031152314 502
gkroussos 0:637031152314 503 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
gkroussos 0:637031152314 504 Can only be executed in Privileged modes.
gkroussos 0:637031152314 505 */
gkroussos 0:637031152314 506 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
gkroussos 0:637031152314 507 {
gkroussos 0:637031152314 508 __ASM volatile ("cpsie f" : : : "memory");
gkroussos 0:637031152314 509 }
gkroussos 0:637031152314 510
gkroussos 0:637031152314 511
gkroussos 0:637031152314 512 /** \brief Disable FIQ
gkroussos 0:637031152314 513
gkroussos 0:637031152314 514 This function disables FIQ interrupts by setting the F-bit in the CPSR.
gkroussos 0:637031152314 515 Can only be executed in Privileged modes.
gkroussos 0:637031152314 516 */
gkroussos 0:637031152314 517 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
gkroussos 0:637031152314 518 {
gkroussos 0:637031152314 519 __ASM volatile ("cpsid f" : : : "memory");
gkroussos 0:637031152314 520 }
gkroussos 0:637031152314 521
gkroussos 0:637031152314 522
gkroussos 0:637031152314 523 /** \brief Get Base Priority
gkroussos 0:637031152314 524
gkroussos 0:637031152314 525 This function returns the current value of the Base Priority register.
gkroussos 0:637031152314 526
gkroussos 0:637031152314 527 \return Base Priority register value
gkroussos 0:637031152314 528 */
gkroussos 0:637031152314 529 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
gkroussos 0:637031152314 530 {
gkroussos 0:637031152314 531 uint32_t result;
gkroussos 0:637031152314 532
gkroussos 0:637031152314 533 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
gkroussos 0:637031152314 534 return(result);
gkroussos 0:637031152314 535 }
gkroussos 0:637031152314 536
gkroussos 0:637031152314 537
gkroussos 0:637031152314 538 /** \brief Set Base Priority
gkroussos 0:637031152314 539
gkroussos 0:637031152314 540 This function assigns the given value to the Base Priority register.
gkroussos 0:637031152314 541
gkroussos 0:637031152314 542 \param [in] basePri Base Priority value to set
gkroussos 0:637031152314 543 */
gkroussos 0:637031152314 544 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
gkroussos 0:637031152314 545 {
gkroussos 0:637031152314 546 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
gkroussos 0:637031152314 547 }
gkroussos 0:637031152314 548
gkroussos 0:637031152314 549
gkroussos 0:637031152314 550 /** \brief Get Fault Mask
gkroussos 0:637031152314 551
gkroussos 0:637031152314 552 This function returns the current value of the Fault Mask register.
gkroussos 0:637031152314 553
gkroussos 0:637031152314 554 \return Fault Mask register value
gkroussos 0:637031152314 555 */
gkroussos 0:637031152314 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
gkroussos 0:637031152314 557 {
gkroussos 0:637031152314 558 uint32_t result;
gkroussos 0:637031152314 559
gkroussos 0:637031152314 560 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
gkroussos 0:637031152314 561 return(result);
gkroussos 0:637031152314 562 }
gkroussos 0:637031152314 563
gkroussos 0:637031152314 564
gkroussos 0:637031152314 565 /** \brief Set Fault Mask
gkroussos 0:637031152314 566
gkroussos 0:637031152314 567 This function assigns the given value to the Fault Mask register.
gkroussos 0:637031152314 568
gkroussos 0:637031152314 569 \param [in] faultMask Fault Mask value to set
gkroussos 0:637031152314 570 */
gkroussos 0:637031152314 571 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
gkroussos 0:637031152314 572 {
gkroussos 0:637031152314 573 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
gkroussos 0:637031152314 574 }
gkroussos 0:637031152314 575
gkroussos 0:637031152314 576 #endif /* (__CORTEX_M >= 0x03) */
gkroussos 0:637031152314 577
gkroussos 0:637031152314 578
gkroussos 0:637031152314 579 #if (__CORTEX_M == 0x04)
gkroussos 0:637031152314 580
gkroussos 0:637031152314 581 /** \brief Get FPSCR
gkroussos 0:637031152314 582
gkroussos 0:637031152314 583 This function returns the current value of the Floating Point Status/Control register.
gkroussos 0:637031152314 584
gkroussos 0:637031152314 585 \return Floating Point Status/Control register value
gkroussos 0:637031152314 586 */
gkroussos 0:637031152314 587 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
gkroussos 0:637031152314 588 {
gkroussos 0:637031152314 589 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
gkroussos 0:637031152314 590 uint32_t result;
gkroussos 0:637031152314 591
gkroussos 0:637031152314 592 /* Empty asm statement works as a scheduling barrier */
gkroussos 0:637031152314 593 __ASM volatile ("");
gkroussos 0:637031152314 594 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
gkroussos 0:637031152314 595 __ASM volatile ("");
gkroussos 0:637031152314 596 return(result);
gkroussos 0:637031152314 597 #else
gkroussos 0:637031152314 598 return(0);
gkroussos 0:637031152314 599 #endif
gkroussos 0:637031152314 600 }
gkroussos 0:637031152314 601
gkroussos 0:637031152314 602
gkroussos 0:637031152314 603 /** \brief Set FPSCR
gkroussos 0:637031152314 604
gkroussos 0:637031152314 605 This function assigns the given value to the Floating Point Status/Control register.
gkroussos 0:637031152314 606
gkroussos 0:637031152314 607 \param [in] fpscr Floating Point Status/Control value to set
gkroussos 0:637031152314 608 */
gkroussos 0:637031152314 609 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
gkroussos 0:637031152314 610 {
gkroussos 0:637031152314 611 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
gkroussos 0:637031152314 612 /* Empty asm statement works as a scheduling barrier */
gkroussos 0:637031152314 613 __ASM volatile ("");
gkroussos 0:637031152314 614 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
gkroussos 0:637031152314 615 __ASM volatile ("");
gkroussos 0:637031152314 616 #endif
gkroussos 0:637031152314 617 }
gkroussos 0:637031152314 618
gkroussos 0:637031152314 619 #endif /* (__CORTEX_M == 0x04) */
gkroussos 0:637031152314 620
gkroussos 0:637031152314 621
gkroussos 0:637031152314 622 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
gkroussos 0:637031152314 623 /* TASKING carm specific functions */
gkroussos 0:637031152314 624
gkroussos 0:637031152314 625 /*
gkroussos 0:637031152314 626 * The CMSIS functions have been implemented as intrinsics in the compiler.
gkroussos 0:637031152314 627 * Please use "carm -?i" to get an up to date list of all instrinsics,
gkroussos 0:637031152314 628 * Including the CMSIS ones.
gkroussos 0:637031152314 629 */
gkroussos 0:637031152314 630
gkroussos 0:637031152314 631 #endif
gkroussos 0:637031152314 632
gkroussos 0:637031152314 633 /*@} end of CMSIS_Core_RegAccFunctions */
gkroussos 0:637031152314 634
gkroussos 0:637031152314 635
gkroussos 0:637031152314 636 #endif /* __CORE_CMFUNC_H */