Mike Moore / mmSPI_RTOS

SPI object for communication with an altera FPGA.

Dependents:   RTOS_project RTOS_project_fork_01 RTOS_project_fork_02

mmSPI_RTOS.h@0:7b8e6b90c874, 2013-09-17 (annotated)

Committer:
gatedClock
Date:
Tue Sep 17 20:40:03 2013 +0000
Revision:
0:7b8e6b90c874
update.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gatedClock 0:7b8e6b90c874 1 #ifndef mmSPI_RTOS_H // include guard.
gatedClock 0:7b8e6b90c874 2 #define mmSPI_RTOS_H // include guard.
gatedClock 0:7b8e6b90c874 3 /*----------------------------------------------//------------------------------
gatedClock 0:7b8e6b90c874 4 student : m-moore
gatedClock 0:7b8e6b90c874 5 email : gated.clock@gmail.com
gatedClock 0:7b8e6b90c874 6 class : embedded RTOS
gatedClock 0:7b8e6b90c874 7 directory : RTOS_project/mmSPI_RTOS
gatedClock 0:7b8e6b90c874 8 file : mmSPI_RTOS.h
gatedClock 0:7b8e6b90c874 9 date : september 19, 2013.
gatedClock 0:7b8e6b90c874 10 ----copyright-----------------------------------//------------------------------
gatedClock 0:7b8e6b90c874 11 licensed for personal and academic use.
gatedClock 0:7b8e6b90c874 12 commercial use of original code must be approved by the account-holder of
gatedClock 0:7b8e6b90c874 13 gated.clock@gmail.com
gatedClock 0:7b8e6b90c874 14 ----description---------------------------------//------------------------------
gatedClock 0:7b8e6b90c874 15 this library provides the low-level SPI data and clock signaling
gatedClock 0:7b8e6b90c874 16 for communication with the altera development board, via four i/o
gatedClock 0:7b8e6b90c874 17 pins available on the mbed development board's zigbee header.
gatedClock 0:7b8e6b90c874 18 ----notes---------------------------------------//------------------------------
gatedClock 0:7b8e6b90c874 19 ------------------------------------------------//----------------------------*/
gatedClock 0:7b8e6b90c874 20 #include "mbed.h" // standard mbed.org class.
gatedClock 0:7b8e6b90c874 21 //---defines------------------------------------//------------------------------
gatedClock 0:7b8e6b90c874 22 #define mmSPI_RTOS_MOSI p29 // SPI interface pin.
gatedClock 0:7b8e6b90c874 23 #define mmSPI_RTOS_MISO p30 // SPI interface pin.
gatedClock 0:7b8e6b90c874 24 #define mmSPI_RTOS_SCLK p9 // SPI interface pin.
gatedClock 0:7b8e6b90c874 25 #define mmCPU_CLK p10 // soft CPU system clock.
gatedClock 0:7b8e6b90c874 26 //==============================================//==============================
gatedClock 0:7b8e6b90c874 27 class mmSPI_RTOS
gatedClock 0:7b8e6b90c874 28 {
gatedClock 0:7b8e6b90c874 29 public:
gatedClock 0:7b8e6b90c874 30 mmSPI_RTOS(); // constructor.
gatedClock 0:7b8e6b90c874 31 ~mmSPI_RTOS(); // destructor.
gatedClock 0:7b8e6b90c874 32 void allocations(); // object allocations.
gatedClock 0:7b8e6b90c874 33
gatedClock 0:7b8e6b90c874 34 void setSPIfrequency (float); // initializations.
gatedClock 0:7b8e6b90c874 35 void setSendBuffer (char * pcSendBuffer);
gatedClock 0:7b8e6b90c874 36 void setReceiveBuffer(char * pcReceiveBuffer);
gatedClock 0:7b8e6b90c874 37 void setNumberOfBytes(int dNumberOfBytes);
gatedClock 0:7b8e6b90c874 38
gatedClock 0:7b8e6b90c874 39 // SPI transceive loop.
gatedClock 0:7b8e6b90c874 40 void transceive_vector(char cPreCPU, char cPreSPI, char cScan, char cPostCPU);
gatedClock 0:7b8e6b90c874 41
gatedClock 0:7b8e6b90c874 42 // write/read CPU registers.
gatedClock 0:7b8e6b90c874 43 void write_register (char cRegister, char cValue);
gatedClock 0:7b8e6b90c874 44 void write_IR (char cValueH, char cValueL);
gatedClock 0:7b8e6b90c874 45 char read_register (char cRegister);
gatedClock 0:7b8e6b90c874 46 void read_all_registers(char * pcRegisters);
gatedClock 0:7b8e6b90c874 47
gatedClock 0:7b8e6b90c874 48 // write/read CPU main-memory.
gatedClock 0:7b8e6b90c874 49 void write_memory(char cHData, char cLdata, char cAddress);
gatedClock 0:7b8e6b90c874 50 unsigned int read_memory (char cAddress);
gatedClock 0:7b8e6b90c874 51
gatedClock 0:7b8e6b90c874 52 void step(); // step the CPU.
gatedClock 0:7b8e6b90c874 53
gatedClock 0:7b8e6b90c874 54 void clear_transmit_vector(); // fill with 0.
gatedClock 0:7b8e6b90c874 55
gatedClock 0:7b8e6b90c874 56 unsigned long SPIClockCount(); // return SPI clock count.
gatedClock 0:7b8e6b90c874 57 unsigned long CPUClockCount(); // return CPU clock count.
gatedClock 0:7b8e6b90c874 58
gatedClock 0:7b8e6b90c874 59 private:
gatedClock 0:7b8e6b90c874 60
gatedClock 0:7b8e6b90c874 61 DigitalOut * pMOSI; // SPI pin.
gatedClock 0:7b8e6b90c874 62 DigitalOut * pMISO; // SPI pin.
gatedClock 0:7b8e6b90c874 63 DigitalOut * pSCLK; // SPI pin.
gatedClock 0:7b8e6b90c874 64 DigitalOut * pCPUclk; // soft cpu clock.
gatedClock 0:7b8e6b90c874 65 char * pcSend; // SPI transmit vector.
gatedClock 0:7b8e6b90c874 66 char * pcReceive; // SPI receive vector.
gatedClock 0:7b8e6b90c874 67 float fSPIfreq; // SPI clock frequency.
gatedClock 0:7b8e6b90c874 68 float fSPIquarterP; // SPI quarter period.
gatedClock 0:7b8e6b90c874 69 int dNumBytes; // number of SPI bytes.
gatedClock 0:7b8e6b90c874 70 int dLoop01; // loop index.
gatedClock 0:7b8e6b90c874 71 int dLoop02; // loop index.
gatedClock 0:7b8e6b90c874 72 unsigned long ulSPIclkCount; // SPI clock count.
gatedClock 0:7b8e6b90c874 73 unsigned long ulCPUclkCount; // CPU clock count.
gatedClock 0:7b8e6b90c874 74 };
gatedClock 0:7b8e6b90c874 75 //----------------------------------------------//------------------------------
gatedClock 0:7b8e6b90c874 76 #endif // include guard.