Mike Moore / Mbed 2 deprecated RTOS_project_fork_01

embedded RTOS class project.

Fork of RTOS_project by Mike Moore

mmRTL/reg_08.txt@0:8e898e1270d6, 2013-09-17 (annotated)

Committer:
gatedClock
Date:
Tue Sep 17 19:42:49 2013 +0000
Revision:
0:8e898e1270d6
title.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gatedClock 0:8e898e1270d6 1 /*----------------------------------copyright---------------------------------*/
gatedClock 0:8e898e1270d6 2 // licensed for personal and academic use.
gatedClock 0:8e898e1270d6 3 // commercial use must be approved by the account-holder of
gatedClock 0:8e898e1270d6 4 // gated.clock@gmail.com
gatedClock 0:8e898e1270d6 5 /*-----------------------------------module-----------------------------------*/
gatedClock 0:8e898e1270d6 6 module reg_08
gatedClock 0:8e898e1270d6 7 (
gatedClock 0:8e898e1270d6 8 oParallel, // parallel-output data.
gatedClock 0:8e898e1270d6 9 iParallel7, // parallel-input data.
gatedClock 0:8e898e1270d6 10 iParallel6, // parallel-input data.
gatedClock 0:8e898e1270d6 11 iParallel5, // parallel-input data.
gatedClock 0:8e898e1270d6 12 iParallel4, // parallel-input data.
gatedClock 0:8e898e1270d6 13 iParallel3, // parallel-input data.
gatedClock 0:8e898e1270d6 14 iParallel2, // parallel-input data.
gatedClock 0:8e898e1270d6 15 iParallel1, // parallel-input data.
gatedClock 0:8e898e1270d6 16 iParallel0, // parallel-input data.
gatedClock 0:8e898e1270d6 17 iSel, // select the parallel input.
gatedClock 0:8e898e1270d6 18 oSerial, // serial-output data.
gatedClock 0:8e898e1270d6 19 iSerial, // serial-input data.
gatedClock 0:8e898e1270d6 20 iLoadEnable, // parallel-load-enable.
gatedClock 0:8e898e1270d6 21 iShiftEnable, // serial-shift-enable.
gatedClock 0:8e898e1270d6 22 iResetN, // synchronous reset*.
gatedClock 0:8e898e1270d6 23 iClk // module clock.
gatedClock 0:8e898e1270d6 24 );
gatedClock 0:8e898e1270d6 25 /*--------------------------------description-----------------------------------
gatedClock 0:8e898e1270d6 26 an 8-bit parallel shift-register with 8 selectable input buses.
gatedClock 0:8e898e1270d6 27 -------------------------------------notes--------------------------------------
gatedClock 0:8e898e1270d6 28 shifting is LSB->MSB.
gatedClock 0:8e898e1270d6 29 ------------------------------------defines-----------------------------------*/
gatedClock 0:8e898e1270d6 30 /*-----------------------------------ports------------------------------------*/
gatedClock 0:8e898e1270d6 31 output [ 7:0] oParallel; // parallel-output data.
gatedClock 0:8e898e1270d6 32 input [ 7:0] iParallel7; // parallel-input data.
gatedClock 0:8e898e1270d6 33 input [ 7:0] iParallel6; // parallel-input data.
gatedClock 0:8e898e1270d6 34 input [ 7:0] iParallel5; // parallel-input data.
gatedClock 0:8e898e1270d6 35 input [ 7:0] iParallel4; // parallel-input data.
gatedClock 0:8e898e1270d6 36 input [ 7:0] iParallel3; // parallel-input data.
gatedClock 0:8e898e1270d6 37 input [ 7:0] iParallel2; // parallel-input data.
gatedClock 0:8e898e1270d6 38 input [ 7:0] iParallel1; // parallel-input data.
gatedClock 0:8e898e1270d6 39 input [ 7:0] iParallel0; // parallel-input data.
gatedClock 0:8e898e1270d6 40 input [ 2:0] iSel; // select the parallel input.
gatedClock 0:8e898e1270d6 41 output oSerial; // serial-output data.
gatedClock 0:8e898e1270d6 42 input iSerial; // serial-input data.
gatedClock 0:8e898e1270d6 43 input iLoadEnable; // parallel-load-enable.
gatedClock 0:8e898e1270d6 44 input iShiftEnable; // serial-shift-enable.
gatedClock 0:8e898e1270d6 45 input iResetN; // synchronous reset*.
gatedClock 0:8e898e1270d6 46 input iClk; // module clock.
gatedClock 0:8e898e1270d6 47 /*-----------------------------------wires------------------------------------*/
gatedClock 0:8e898e1270d6 48 wire [ 7:0] oParallel; // parallel-output data.
gatedClock 0:8e898e1270d6 49 wire [ 7:0] iParallel7; // parallel-input data.
gatedClock 0:8e898e1270d6 50 wire [ 7:0] iParallel6; // parallel-input data.
gatedClock 0:8e898e1270d6 51 wire [ 7:0] iParallel5; // parallel-input data.
gatedClock 0:8e898e1270d6 52 wire [ 7:0] iParallel4; // parallel-input data.
gatedClock 0:8e898e1270d6 53 wire [ 7:0] iParallel3; // parallel-input data.
gatedClock 0:8e898e1270d6 54 wire [ 7:0] iParallel2; // parallel-input data.
gatedClock 0:8e898e1270d6 55 wire [ 7:0] iParallel1; // parallel-input data.
gatedClock 0:8e898e1270d6 56 wire [ 7:0] iParallel0; // parallel-input data.
gatedClock 0:8e898e1270d6 57 wire [ 2:0] iSel; // select the parallel input.
gatedClock 0:8e898e1270d6 58 wire [ 7:0] wParallelIn; // select the parallel input.
gatedClock 0:8e898e1270d6 59 wire oSerial; // serial-output data.
gatedClock 0:8e898e1270d6 60 wire iSerial; // serial-input data.
gatedClock 0:8e898e1270d6 61 wire iLoadEnable; // parallel-load-enable.
gatedClock 0:8e898e1270d6 62 wire iShiftEnable; // serial-shift-enable.
gatedClock 0:8e898e1270d6 63 wire iResetN; // synchronous reset*.
gatedClock 0:8e898e1270d6 64 wire iClk; // module clock.
gatedClock 0:8e898e1270d6 65 /*---------------------------------registers----------------------------------*/
gatedClock 0:8e898e1270d6 66 reg [ 7:0] rRegister; // the register.
gatedClock 0:8e898e1270d6 67 /*---------------------------------variables----------------------------------*/
gatedClock 0:8e898e1270d6 68 /*---------------------------------parameters---------------------------------*/
gatedClock 0:8e898e1270d6 69 /*-----------------------------------clocks-----------------------------------*/
gatedClock 0:8e898e1270d6 70 /*---------------------------------instances----------------------------------*/
gatedClock 0:8e898e1270d6 71 mux8x8 U01_mux8x8 // data-input selection.
gatedClock 0:8e898e1270d6 72 (
gatedClock 0:8e898e1270d6 73 .iDin7(iParallel7),
gatedClock 0:8e898e1270d6 74 .iDin6(iParallel6),
gatedClock 0:8e898e1270d6 75 .iDin5(iParallel5),
gatedClock 0:8e898e1270d6 76 .iDin4(iParallel4),
gatedClock 0:8e898e1270d6 77 .iDin3(iParallel3),
gatedClock 0:8e898e1270d6 78 .iDin2(iParallel2),
gatedClock 0:8e898e1270d6 79 .iDin1(iParallel1),
gatedClock 0:8e898e1270d6 80 .iDin0(iParallel0),
gatedClock 0:8e898e1270d6 81 .iSel (iSel),
gatedClock 0:8e898e1270d6 82 .oDout(wParallelIn)
gatedClock 0:8e898e1270d6 83 );
gatedClock 0:8e898e1270d6 84 /*-----------------------------------logic------------------------------------*/
gatedClock 0:8e898e1270d6 85 always @ (posedge iClk or negedge iResetN)
gatedClock 0:8e898e1270d6 86 begin
gatedClock 0:8e898e1270d6 87 if (!iResetN) rRegister <= 8'h00;
gatedClock 0:8e898e1270d6 88 else if (iLoadEnable) rRegister <= wParallelIn;
gatedClock 0:8e898e1270d6 89 else if (iShiftEnable) rRegister <= {rRegister[6:0], iSerial};
gatedClock 0:8e898e1270d6 90 else rRegister <= rRegister;
gatedClock 0:8e898e1270d6 91 end
gatedClock 0:8e898e1270d6 92
gatedClock 0:8e898e1270d6 93 assign oParallel = rRegister; // propagate parallel-out.
gatedClock 0:8e898e1270d6 94 assign oSerial = rRegister[7]; // propagate serial-out.
gatedClock 0:8e898e1270d6 95 /*-------------------------------*/endmodule/*--------------------------------*/
gatedClock 0:8e898e1270d6 96
gatedClock 0:8e898e1270d6 97
gatedClock 0:8e898e1270d6 98
gatedClock 0:8e898e1270d6 99
gatedClock 0:8e898e1270d6 100
gatedClock 0:8e898e1270d6 101
gatedClock 0:8e898e1270d6 102
gatedClock 0:8e898e1270d6 103
gatedClock 0:8e898e1270d6 104
gatedClock 0:8e898e1270d6 105
gatedClock 0:8e898e1270d6 106
gatedClock 0:8e898e1270d6 107
gatedClock 0:8e898e1270d6 108
gatedClock 0:8e898e1270d6 109
gatedClock 0:8e898e1270d6 110
gatedClock 0:8e898e1270d6 111
gatedClock 0:8e898e1270d6 112
gatedClock 0:8e898e1270d6 113
gatedClock 0:8e898e1270d6 114
gatedClock 0:8e898e1270d6 115
gatedClock 0:8e898e1270d6 116
gatedClock 0:8e898e1270d6 117
gatedClock 0:8e898e1270d6 118
gatedClock 0:8e898e1270d6 119
gatedClock 0:8e898e1270d6 120
gatedClock 0:8e898e1270d6 121
gatedClock 0:8e898e1270d6 122
gatedClock 0:8e898e1270d6 123
gatedClock 0:8e898e1270d6 124
gatedClock 0:8e898e1270d6 125
gatedClock 0:8e898e1270d6 126
gatedClock 0:8e898e1270d6 127
gatedClock 0:8e898e1270d6 128