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mbed-dev
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targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_dac_ex.c@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 124:6a4a5b7d7324
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f1xx_hal_dac_ex.c |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| bogdanm | 0:9b334a45a8ff | 5 | * @version V1.0.0 |
| bogdanm | 0:9b334a45a8ff | 6 | * @date 15-December-2014 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief DAC HAL module driver. |
| bogdanm | 0:9b334a45a8ff | 8 | * This file provides firmware functions to manage the following |
| bogdanm | 0:9b334a45a8ff | 9 | * functionalities of DAC extension peripheral: |
| bogdanm | 0:9b334a45a8ff | 10 | * + Extended features functions |
| bogdanm | 0:9b334a45a8ff | 11 | * |
| bogdanm | 0:9b334a45a8ff | 12 | * |
| bogdanm | 0:9b334a45a8ff | 13 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 14 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 15 | ##### How to use this driver ##### |
| bogdanm | 0:9b334a45a8ff | 16 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 17 | [..] |
| bogdanm | 0:9b334a45a8ff | 18 | (+) When Dual mode is enabled (i.e DAC Channel1 and Channel2 are used simultaneously) : |
| bogdanm | 0:9b334a45a8ff | 19 | Use HAL_DACEx_DualGetValue() to get digital data to be converted and use |
| bogdanm | 0:9b334a45a8ff | 20 | HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2. |
| bogdanm | 0:9b334a45a8ff | 21 | (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal. |
| bogdanm | 0:9b334a45a8ff | 22 | (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal. |
| bogdanm | 0:9b334a45a8ff | 23 | |
| bogdanm | 0:9b334a45a8ff | 24 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 25 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 26 | * @attention |
| bogdanm | 0:9b334a45a8ff | 27 | * |
| bogdanm | 0:9b334a45a8ff | 28 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 29 | * |
| bogdanm | 0:9b334a45a8ff | 30 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 31 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 32 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 33 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 34 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 35 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 36 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 37 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 38 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 39 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 40 | * |
| bogdanm | 0:9b334a45a8ff | 41 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 42 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 43 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 44 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 45 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 46 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 47 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 48 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 49 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 50 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 51 | * |
| bogdanm | 0:9b334a45a8ff | 52 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 53 | */ |
| bogdanm | 0:9b334a45a8ff | 54 | |
| bogdanm | 0:9b334a45a8ff | 55 | |
| bogdanm | 0:9b334a45a8ff | 56 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 57 | #include "stm32f1xx_hal.h" |
| bogdanm | 0:9b334a45a8ff | 58 | |
| bogdanm | 0:9b334a45a8ff | 59 | /** @addtogroup STM32F1xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 60 | * @{ |
| bogdanm | 0:9b334a45a8ff | 61 | */ |
| bogdanm | 0:9b334a45a8ff | 62 | |
| bogdanm | 0:9b334a45a8ff | 63 | /** @defgroup DACEx DACEx |
| bogdanm | 0:9b334a45a8ff | 64 | * @brief DACEx driver module |
| bogdanm | 0:9b334a45a8ff | 65 | * @{ |
| bogdanm | 0:9b334a45a8ff | 66 | */ |
| bogdanm | 0:9b334a45a8ff | 67 | |
| bogdanm | 0:9b334a45a8ff | 68 | #ifdef HAL_DAC_MODULE_ENABLED |
| bogdanm | 0:9b334a45a8ff | 69 | #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) |
| bogdanm | 0:9b334a45a8ff | 70 | |
| bogdanm | 0:9b334a45a8ff | 71 | /* Private typedef -----------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 72 | /* Private define ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 73 | /* Private macro -------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 74 | /* Private variables ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 75 | /* Private function prototypes -----------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 76 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 77 | |
| bogdanm | 0:9b334a45a8ff | 78 | /** @defgroup DACEx_Exported_Functions DACEx Exported Functions |
| bogdanm | 0:9b334a45a8ff | 79 | * @{ |
| bogdanm | 0:9b334a45a8ff | 80 | */ |
| bogdanm | 0:9b334a45a8ff | 81 | |
| bogdanm | 0:9b334a45a8ff | 82 | /** @defgroup DACEx_Exported_Functions_Group1 Extended features functions |
| bogdanm | 0:9b334a45a8ff | 83 | * @brief Extended features functions |
| bogdanm | 0:9b334a45a8ff | 84 | * |
| bogdanm | 0:9b334a45a8ff | 85 | @verbatim |
| bogdanm | 0:9b334a45a8ff | 86 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 87 | ##### Extended features functions ##### |
| bogdanm | 0:9b334a45a8ff | 88 | ============================================================================== |
| bogdanm | 0:9b334a45a8ff | 89 | [..] This section provides functions allowing to: |
| bogdanm | 0:9b334a45a8ff | 90 | (+) Start conversion. |
| bogdanm | 0:9b334a45a8ff | 91 | (+) Stop conversion. |
| bogdanm | 0:9b334a45a8ff | 92 | (+) Start conversion and enable DMA transfer. |
| bogdanm | 0:9b334a45a8ff | 93 | (+) Stop conversion and disable DMA transfer. |
| bogdanm | 0:9b334a45a8ff | 94 | (+) Get result of conversion. |
| bogdanm | 0:9b334a45a8ff | 95 | (+) Get result of dual mode conversion. |
| bogdanm | 0:9b334a45a8ff | 96 | |
| bogdanm | 0:9b334a45a8ff | 97 | @endverbatim |
| bogdanm | 0:9b334a45a8ff | 98 | * @{ |
| bogdanm | 0:9b334a45a8ff | 99 | */ |
| bogdanm | 0:9b334a45a8ff | 100 | |
| bogdanm | 0:9b334a45a8ff | 101 | /** |
| bogdanm | 0:9b334a45a8ff | 102 | * @brief Returns the last data output value of the selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 103 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 104 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 105 | * @retval The selected DAC channel data output value. |
| bogdanm | 0:9b334a45a8ff | 106 | */ |
| bogdanm | 0:9b334a45a8ff | 107 | uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac) |
| bogdanm | 0:9b334a45a8ff | 108 | { |
| bogdanm | 0:9b334a45a8ff | 109 | uint32_t tmp = 0; |
| bogdanm | 0:9b334a45a8ff | 110 | |
| bogdanm | 0:9b334a45a8ff | 111 | tmp |= hdac->Instance->DOR1; |
| bogdanm | 0:9b334a45a8ff | 112 | |
| bogdanm | 0:9b334a45a8ff | 113 | tmp |= hdac->Instance->DOR2 << 16; |
| bogdanm | 0:9b334a45a8ff | 114 | |
| bogdanm | 0:9b334a45a8ff | 115 | /* Returns the DAC channel data output register value */ |
| bogdanm | 0:9b334a45a8ff | 116 | return tmp; |
| bogdanm | 0:9b334a45a8ff | 117 | } |
| bogdanm | 0:9b334a45a8ff | 118 | |
| bogdanm | 0:9b334a45a8ff | 119 | /** |
| bogdanm | 0:9b334a45a8ff | 120 | * @brief Enables or disables the selected DAC channel wave generation. |
| bogdanm | 0:9b334a45a8ff | 121 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 122 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 123 | * @param Channel: The selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 124 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 125 | * DAC_CHANNEL_1 / DAC_CHANNEL_2 |
| bogdanm | 0:9b334a45a8ff | 126 | * @param Amplitude: Select max triangle amplitude. |
| bogdanm | 0:9b334a45a8ff | 127 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 128 | * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1 |
| bogdanm | 0:9b334a45a8ff | 129 | * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3 |
| bogdanm | 0:9b334a45a8ff | 130 | * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7 |
| bogdanm | 0:9b334a45a8ff | 131 | * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15 |
| bogdanm | 0:9b334a45a8ff | 132 | * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31 |
| bogdanm | 0:9b334a45a8ff | 133 | * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63 |
| bogdanm | 0:9b334a45a8ff | 134 | * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127 |
| bogdanm | 0:9b334a45a8ff | 135 | * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255 |
| bogdanm | 0:9b334a45a8ff | 136 | * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511 |
| bogdanm | 0:9b334a45a8ff | 137 | * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023 |
| bogdanm | 0:9b334a45a8ff | 138 | * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047 |
| bogdanm | 0:9b334a45a8ff | 139 | * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095 |
| bogdanm | 0:9b334a45a8ff | 140 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 141 | */ |
| bogdanm | 0:9b334a45a8ff | 142 | HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude) |
| bogdanm | 0:9b334a45a8ff | 143 | { |
| bogdanm | 0:9b334a45a8ff | 144 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 145 | assert_param(IS_DAC_CHANNEL(Channel)); |
| bogdanm | 0:9b334a45a8ff | 146 | assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude)); |
| bogdanm | 0:9b334a45a8ff | 147 | |
| bogdanm | 0:9b334a45a8ff | 148 | /* Process locked */ |
| bogdanm | 0:9b334a45a8ff | 149 | __HAL_LOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 150 | |
| bogdanm | 0:9b334a45a8ff | 151 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 152 | hdac->State = HAL_DAC_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 153 | |
| bogdanm | 0:9b334a45a8ff | 154 | /* Enable the selected wave generation for the selected DAC channel */ |
| bogdanm | 0:9b334a45a8ff | 155 | MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_WAVE_TRIANGLE | Amplitude) << Channel); |
| bogdanm | 0:9b334a45a8ff | 156 | |
| bogdanm | 0:9b334a45a8ff | 157 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 158 | hdac->State = HAL_DAC_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 159 | |
| bogdanm | 0:9b334a45a8ff | 160 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 161 | __HAL_UNLOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 162 | |
| bogdanm | 0:9b334a45a8ff | 163 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 164 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 165 | } |
| bogdanm | 0:9b334a45a8ff | 166 | |
| bogdanm | 0:9b334a45a8ff | 167 | /** |
| bogdanm | 0:9b334a45a8ff | 168 | * @brief Enables or disables the selected DAC channel wave generation. |
| bogdanm | 0:9b334a45a8ff | 169 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 170 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 171 | * @param Channel: The selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 172 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 173 | * DAC_CHANNEL_1 / DAC_CHANNEL_2 |
| bogdanm | 0:9b334a45a8ff | 174 | * @param Amplitude: Unmask DAC channel LFSR for noise wave generation. |
| bogdanm | 0:9b334a45a8ff | 175 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 176 | * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 177 | * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 178 | * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 179 | * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 180 | * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 181 | * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 182 | * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 183 | * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 184 | * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 185 | * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 186 | * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 187 | * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation |
| bogdanm | 0:9b334a45a8ff | 188 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 189 | */ |
| bogdanm | 0:9b334a45a8ff | 190 | HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude) |
| bogdanm | 0:9b334a45a8ff | 191 | { |
| bogdanm | 0:9b334a45a8ff | 192 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 193 | assert_param(IS_DAC_CHANNEL(Channel)); |
| bogdanm | 0:9b334a45a8ff | 194 | assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude)); |
| bogdanm | 0:9b334a45a8ff | 195 | |
| bogdanm | 0:9b334a45a8ff | 196 | /* Process locked */ |
| bogdanm | 0:9b334a45a8ff | 197 | __HAL_LOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 198 | |
| bogdanm | 0:9b334a45a8ff | 199 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 200 | hdac->State = HAL_DAC_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 201 | |
| bogdanm | 0:9b334a45a8ff | 202 | /* Enable the selected wave generation for the selected DAC channel */ |
| bogdanm | 0:9b334a45a8ff | 203 | MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_WAVE_NOISE | Amplitude) << Channel); |
| bogdanm | 0:9b334a45a8ff | 204 | |
| bogdanm | 0:9b334a45a8ff | 205 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 206 | hdac->State = HAL_DAC_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 207 | |
| bogdanm | 0:9b334a45a8ff | 208 | /* Process unlocked */ |
| bogdanm | 0:9b334a45a8ff | 209 | __HAL_UNLOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 210 | |
| bogdanm | 0:9b334a45a8ff | 211 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 212 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 213 | } |
| bogdanm | 0:9b334a45a8ff | 214 | |
| bogdanm | 0:9b334a45a8ff | 215 | /** |
| bogdanm | 0:9b334a45a8ff | 216 | * @brief Set the specified data holding register value for dual DAC channel. |
| bogdanm | 0:9b334a45a8ff | 217 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 218 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 219 | * @param Alignment: Specifies the data alignment for dual channel DAC. |
| bogdanm | 0:9b334a45a8ff | 220 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 221 | * DAC_ALIGN_8B_R: 8bit right data alignment selected |
| bogdanm | 0:9b334a45a8ff | 222 | * DAC_ALIGN_12B_L: 12bit left data alignment selected |
| bogdanm | 0:9b334a45a8ff | 223 | * DAC_ALIGN_12B_R: 12bit right data alignment selected |
| bogdanm | 0:9b334a45a8ff | 224 | * @param Data1: Data for DAC Channel2 to be loaded in the selected data holding register. |
| bogdanm | 0:9b334a45a8ff | 225 | * @param Data2: Data for DAC Channel1 to be loaded in the selected data holding register. |
| bogdanm | 0:9b334a45a8ff | 226 | * @note In dual mode, a unique register access is required to write in both |
| bogdanm | 0:9b334a45a8ff | 227 | * DAC channels at the same time. |
| bogdanm | 0:9b334a45a8ff | 228 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 229 | */ |
| bogdanm | 0:9b334a45a8ff | 230 | HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2) |
| bogdanm | 0:9b334a45a8ff | 231 | { |
| bogdanm | 0:9b334a45a8ff | 232 | uint32_t data = 0, tmp = 0; |
| bogdanm | 0:9b334a45a8ff | 233 | |
| bogdanm | 0:9b334a45a8ff | 234 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 235 | assert_param(IS_DAC_ALIGN(Alignment)); |
| bogdanm | 0:9b334a45a8ff | 236 | assert_param(IS_DAC_DATA(Data1)); |
| bogdanm | 0:9b334a45a8ff | 237 | assert_param(IS_DAC_DATA(Data2)); |
| bogdanm | 0:9b334a45a8ff | 238 | |
| bogdanm | 0:9b334a45a8ff | 239 | /* Calculate and set dual DAC data holding register value */ |
| bogdanm | 0:9b334a45a8ff | 240 | if (Alignment == DAC_ALIGN_8B_R) |
| bogdanm | 0:9b334a45a8ff | 241 | { |
| bogdanm | 0:9b334a45a8ff | 242 | data = ((uint32_t)Data2 << 8) | Data1; |
| bogdanm | 0:9b334a45a8ff | 243 | } |
| bogdanm | 0:9b334a45a8ff | 244 | else |
| bogdanm | 0:9b334a45a8ff | 245 | { |
| bogdanm | 0:9b334a45a8ff | 246 | data = ((uint32_t)Data2 << 16) | Data1; |
| bogdanm | 0:9b334a45a8ff | 247 | } |
| bogdanm | 0:9b334a45a8ff | 248 | |
| bogdanm | 0:9b334a45a8ff | 249 | tmp = (uint32_t)hdac->Instance; |
| bogdanm | 0:9b334a45a8ff | 250 | tmp += DAC_DHR12RD_ALIGNMENT(Alignment); |
| bogdanm | 0:9b334a45a8ff | 251 | |
| bogdanm | 0:9b334a45a8ff | 252 | /* Set the dual DAC selected data holding register */ |
| bogdanm | 0:9b334a45a8ff | 253 | *(__IO uint32_t *)tmp = data; |
| bogdanm | 0:9b334a45a8ff | 254 | |
| bogdanm | 0:9b334a45a8ff | 255 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 256 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 257 | } |
| bogdanm | 0:9b334a45a8ff | 258 | |
| bogdanm | 0:9b334a45a8ff | 259 | /** |
| bogdanm | 0:9b334a45a8ff | 260 | * @brief Conversion complete callback in non blocking mode for Channel2 |
| bogdanm | 0:9b334a45a8ff | 261 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 262 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 263 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 264 | */ |
| bogdanm | 0:9b334a45a8ff | 265 | __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac) |
| bogdanm | 0:9b334a45a8ff | 266 | { |
| bogdanm | 0:9b334a45a8ff | 267 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 268 | the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 269 | */ |
| bogdanm | 0:9b334a45a8ff | 270 | } |
| bogdanm | 0:9b334a45a8ff | 271 | |
| bogdanm | 0:9b334a45a8ff | 272 | /** |
| bogdanm | 0:9b334a45a8ff | 273 | * @brief Conversion half DMA transfer callback in non blocking mode for Channel2 |
| bogdanm | 0:9b334a45a8ff | 274 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 275 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 276 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 277 | */ |
| bogdanm | 0:9b334a45a8ff | 278 | __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac) |
| bogdanm | 0:9b334a45a8ff | 279 | { |
| bogdanm | 0:9b334a45a8ff | 280 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 281 | the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 282 | */ |
| bogdanm | 0:9b334a45a8ff | 283 | } |
| bogdanm | 0:9b334a45a8ff | 284 | |
| bogdanm | 0:9b334a45a8ff | 285 | /** |
| bogdanm | 0:9b334a45a8ff | 286 | * @brief Error DAC callback for Channel2. |
| bogdanm | 0:9b334a45a8ff | 287 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 288 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 289 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 290 | */ |
| bogdanm | 0:9b334a45a8ff | 291 | __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac) |
| bogdanm | 0:9b334a45a8ff | 292 | { |
| bogdanm | 0:9b334a45a8ff | 293 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 294 | the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 295 | */ |
| bogdanm | 0:9b334a45a8ff | 296 | } |
| bogdanm | 0:9b334a45a8ff | 297 | |
| bogdanm | 0:9b334a45a8ff | 298 | #if defined (STM32F100xB) || defined (STM32F100xE) |
| bogdanm | 0:9b334a45a8ff | 299 | /** |
| bogdanm | 0:9b334a45a8ff | 300 | * @brief DMA underrun DAC callback for channel1. |
| bogdanm | 0:9b334a45a8ff | 301 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
| bogdanm | 0:9b334a45a8ff | 302 | * On these devices, this function uses the interruption of DMA |
| bogdanm | 0:9b334a45a8ff | 303 | * underrun. |
| bogdanm | 0:9b334a45a8ff | 304 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 305 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 306 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 307 | */ |
| bogdanm | 0:9b334a45a8ff | 308 | __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) |
| bogdanm | 0:9b334a45a8ff | 309 | { |
| bogdanm | 0:9b334a45a8ff | 310 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 311 | the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 312 | */ |
| bogdanm | 0:9b334a45a8ff | 313 | } |
| bogdanm | 0:9b334a45a8ff | 314 | |
| bogdanm | 0:9b334a45a8ff | 315 | /** |
| bogdanm | 0:9b334a45a8ff | 316 | * @brief DMA underrun DAC callback for channel2. |
| bogdanm | 0:9b334a45a8ff | 317 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
| bogdanm | 0:9b334a45a8ff | 318 | * On these devices, this function uses the interruption of DMA |
| bogdanm | 0:9b334a45a8ff | 319 | * underrun. |
| bogdanm | 0:9b334a45a8ff | 320 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 321 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 322 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 323 | */ |
| bogdanm | 0:9b334a45a8ff | 324 | __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac) |
| bogdanm | 0:9b334a45a8ff | 325 | { |
| bogdanm | 0:9b334a45a8ff | 326 | /* NOTE : This function Should not be modified, when the callback is needed, |
| bogdanm | 0:9b334a45a8ff | 327 | the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file |
| bogdanm | 0:9b334a45a8ff | 328 | */ |
| bogdanm | 0:9b334a45a8ff | 329 | } |
| bogdanm | 0:9b334a45a8ff | 330 | #endif /* STM32F100xB) || defined (STM32F100xE) */ |
| bogdanm | 0:9b334a45a8ff | 331 | |
| bogdanm | 0:9b334a45a8ff | 332 | /** |
| bogdanm | 0:9b334a45a8ff | 333 | * @} |
| bogdanm | 0:9b334a45a8ff | 334 | */ |
| bogdanm | 0:9b334a45a8ff | 335 | |
| bogdanm | 0:9b334a45a8ff | 336 | #if defined (STM32F100xB) || defined (STM32F100xE) |
| bogdanm | 0:9b334a45a8ff | 337 | /** |
| bogdanm | 0:9b334a45a8ff | 338 | * @brief Enables DAC and starts conversion of channel. |
| bogdanm | 0:9b334a45a8ff | 339 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
| bogdanm | 0:9b334a45a8ff | 340 | * On these devices, this function enables the interruption of DMA |
| bogdanm | 0:9b334a45a8ff | 341 | * underrun. |
| bogdanm | 0:9b334a45a8ff | 342 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 343 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 344 | * @param Channel: The selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 345 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 346 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| bogdanm | 0:9b334a45a8ff | 347 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
| bogdanm | 0:9b334a45a8ff | 348 | * @param pData: The destination peripheral Buffer address. |
| bogdanm | 0:9b334a45a8ff | 349 | * @param Length: The length of data to be transferred from memory to DAC peripheral |
| bogdanm | 0:9b334a45a8ff | 350 | * @param Alignment: Specifies the data alignment for DAC channel. |
| bogdanm | 0:9b334a45a8ff | 351 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 352 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
| bogdanm | 0:9b334a45a8ff | 353 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
| bogdanm | 0:9b334a45a8ff | 354 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
| bogdanm | 0:9b334a45a8ff | 355 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 356 | */ |
| bogdanm | 0:9b334a45a8ff | 357 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment) |
| bogdanm | 0:9b334a45a8ff | 358 | { |
| bogdanm | 0:9b334a45a8ff | 359 | uint32_t tmpreg = 0; |
| bogdanm | 0:9b334a45a8ff | 360 | |
| bogdanm | 0:9b334a45a8ff | 361 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 362 | assert_param(IS_DAC_CHANNEL(Channel)); |
| bogdanm | 0:9b334a45a8ff | 363 | assert_param(IS_DAC_ALIGN(Alignment)); |
| bogdanm | 0:9b334a45a8ff | 364 | |
| bogdanm | 0:9b334a45a8ff | 365 | /* Process locked */ |
| bogdanm | 0:9b334a45a8ff | 366 | __HAL_LOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 367 | |
| bogdanm | 0:9b334a45a8ff | 368 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 369 | hdac->State = HAL_DAC_STATE_BUSY; |
| bogdanm | 0:9b334a45a8ff | 370 | |
| bogdanm | 0:9b334a45a8ff | 371 | if(Channel == DAC_CHANNEL_1) |
| bogdanm | 0:9b334a45a8ff | 372 | { |
| bogdanm | 0:9b334a45a8ff | 373 | /* Set the DMA transfer complete callback for channel1 */ |
| bogdanm | 0:9b334a45a8ff | 374 | hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; |
| bogdanm | 0:9b334a45a8ff | 375 | |
| bogdanm | 0:9b334a45a8ff | 376 | /* Set the DMA half transfer complete callback for channel1 */ |
| bogdanm | 0:9b334a45a8ff | 377 | hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; |
| bogdanm | 0:9b334a45a8ff | 378 | |
| bogdanm | 0:9b334a45a8ff | 379 | /* Set the DMA error callback for channel1 */ |
| bogdanm | 0:9b334a45a8ff | 380 | hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; |
| bogdanm | 0:9b334a45a8ff | 381 | |
| bogdanm | 0:9b334a45a8ff | 382 | /* Enable the selected DAC channel1 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 383 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
| bogdanm | 0:9b334a45a8ff | 384 | |
| bogdanm | 0:9b334a45a8ff | 385 | /* Case of use of channel 1 */ |
| bogdanm | 0:9b334a45a8ff | 386 | switch(Alignment) |
| bogdanm | 0:9b334a45a8ff | 387 | { |
| bogdanm | 0:9b334a45a8ff | 388 | case DAC_ALIGN_12B_R: |
| bogdanm | 0:9b334a45a8ff | 389 | /* Get DHR12R1 address */ |
| bogdanm | 0:9b334a45a8ff | 390 | tmpreg = (uint32_t)&hdac->Instance->DHR12R1; |
| bogdanm | 0:9b334a45a8ff | 391 | break; |
| bogdanm | 0:9b334a45a8ff | 392 | case DAC_ALIGN_12B_L: |
| bogdanm | 0:9b334a45a8ff | 393 | /* Get DHR12L1 address */ |
| bogdanm | 0:9b334a45a8ff | 394 | tmpreg = (uint32_t)&hdac->Instance->DHR12L1; |
| bogdanm | 0:9b334a45a8ff | 395 | break; |
| bogdanm | 0:9b334a45a8ff | 396 | case DAC_ALIGN_8B_R: |
| bogdanm | 0:9b334a45a8ff | 397 | /* Get DHR8R1 address */ |
| bogdanm | 0:9b334a45a8ff | 398 | tmpreg = (uint32_t)&hdac->Instance->DHR8R1; |
| bogdanm | 0:9b334a45a8ff | 399 | break; |
| bogdanm | 0:9b334a45a8ff | 400 | default: |
| bogdanm | 0:9b334a45a8ff | 401 | break; |
| bogdanm | 0:9b334a45a8ff | 402 | } |
| bogdanm | 0:9b334a45a8ff | 403 | } |
| bogdanm | 0:9b334a45a8ff | 404 | else |
| bogdanm | 0:9b334a45a8ff | 405 | { |
| bogdanm | 0:9b334a45a8ff | 406 | /* Set the DMA transfer complete callback for channel2 */ |
| bogdanm | 0:9b334a45a8ff | 407 | hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; |
| bogdanm | 0:9b334a45a8ff | 408 | |
| bogdanm | 0:9b334a45a8ff | 409 | /* Set the DMA half transfer complete callback for channel2 */ |
| bogdanm | 0:9b334a45a8ff | 410 | hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; |
| bogdanm | 0:9b334a45a8ff | 411 | |
| bogdanm | 0:9b334a45a8ff | 412 | /* Set the DMA error callback for channel2 */ |
| bogdanm | 0:9b334a45a8ff | 413 | hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; |
| bogdanm | 0:9b334a45a8ff | 414 | |
| bogdanm | 0:9b334a45a8ff | 415 | /* Enable the selected DAC channel2 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 416 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
| bogdanm | 0:9b334a45a8ff | 417 | |
| bogdanm | 0:9b334a45a8ff | 418 | /* Case of use of channel 2 */ |
| bogdanm | 0:9b334a45a8ff | 419 | switch(Alignment) |
| bogdanm | 0:9b334a45a8ff | 420 | { |
| bogdanm | 0:9b334a45a8ff | 421 | case DAC_ALIGN_12B_R: |
| bogdanm | 0:9b334a45a8ff | 422 | /* Get DHR12R2 address */ |
| bogdanm | 0:9b334a45a8ff | 423 | tmpreg = (uint32_t)&hdac->Instance->DHR12R2; |
| bogdanm | 0:9b334a45a8ff | 424 | break; |
| bogdanm | 0:9b334a45a8ff | 425 | case DAC_ALIGN_12B_L: |
| bogdanm | 0:9b334a45a8ff | 426 | /* Get DHR12L2 address */ |
| bogdanm | 0:9b334a45a8ff | 427 | tmpreg = (uint32_t)&hdac->Instance->DHR12L2; |
| bogdanm | 0:9b334a45a8ff | 428 | break; |
| bogdanm | 0:9b334a45a8ff | 429 | case DAC_ALIGN_8B_R: |
| bogdanm | 0:9b334a45a8ff | 430 | /* Get DHR8R2 address */ |
| bogdanm | 0:9b334a45a8ff | 431 | tmpreg = (uint32_t)&hdac->Instance->DHR8R2; |
| bogdanm | 0:9b334a45a8ff | 432 | break; |
| bogdanm | 0:9b334a45a8ff | 433 | default: |
| bogdanm | 0:9b334a45a8ff | 434 | break; |
| bogdanm | 0:9b334a45a8ff | 435 | } |
| bogdanm | 0:9b334a45a8ff | 436 | } |
| bogdanm | 0:9b334a45a8ff | 437 | |
| bogdanm | 0:9b334a45a8ff | 438 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 439 | if(Channel == DAC_CHANNEL_1) |
| bogdanm | 0:9b334a45a8ff | 440 | { |
| bogdanm | 0:9b334a45a8ff | 441 | /* Enable the DAC DMA underrun interrupt */ |
| bogdanm | 0:9b334a45a8ff | 442 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); |
| bogdanm | 0:9b334a45a8ff | 443 | |
| bogdanm | 0:9b334a45a8ff | 444 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 445 | HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
| bogdanm | 0:9b334a45a8ff | 446 | } |
| bogdanm | 0:9b334a45a8ff | 447 | else |
| bogdanm | 0:9b334a45a8ff | 448 | { |
| bogdanm | 0:9b334a45a8ff | 449 | /* Enable the DAC DMA underrun interrupt */ |
| bogdanm | 0:9b334a45a8ff | 450 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); |
| bogdanm | 0:9b334a45a8ff | 451 | |
| bogdanm | 0:9b334a45a8ff | 452 | /* Enable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 453 | HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); |
| bogdanm | 0:9b334a45a8ff | 454 | } |
| bogdanm | 0:9b334a45a8ff | 455 | |
| bogdanm | 0:9b334a45a8ff | 456 | /* Enable the Peripharal */ |
| bogdanm | 0:9b334a45a8ff | 457 | __HAL_DAC_ENABLE(hdac, Channel); |
| bogdanm | 0:9b334a45a8ff | 458 | |
| bogdanm | 0:9b334a45a8ff | 459 | /* Process Unlocked */ |
| bogdanm | 0:9b334a45a8ff | 460 | __HAL_UNLOCK(hdac); |
| bogdanm | 0:9b334a45a8ff | 461 | |
| bogdanm | 0:9b334a45a8ff | 462 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 463 | return HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 464 | } |
| bogdanm | 0:9b334a45a8ff | 465 | #endif /* STM32F100xB) || defined (STM32F100xE) */ |
| bogdanm | 0:9b334a45a8ff | 466 | |
| bogdanm | 0:9b334a45a8ff | 467 | #if defined (STM32F100xB) || defined (STM32F100xE) |
| bogdanm | 0:9b334a45a8ff | 468 | /** |
| bogdanm | 0:9b334a45a8ff | 469 | * @brief Disables DAC and stop conversion of channel. |
| bogdanm | 0:9b334a45a8ff | 470 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
| bogdanm | 0:9b334a45a8ff | 471 | * On these devices, this function disables the interruption of DMA |
| bogdanm | 0:9b334a45a8ff | 472 | * underrun. |
| bogdanm | 0:9b334a45a8ff | 473 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 474 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 475 | * @param Channel: The selected DAC channel. |
| bogdanm | 0:9b334a45a8ff | 476 | * This parameter can be one of the following values: |
| bogdanm | 0:9b334a45a8ff | 477 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| bogdanm | 0:9b334a45a8ff | 478 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
| bogdanm | 0:9b334a45a8ff | 479 | * @retval HAL status |
| bogdanm | 0:9b334a45a8ff | 480 | */ |
| bogdanm | 0:9b334a45a8ff | 481 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel) |
| bogdanm | 0:9b334a45a8ff | 482 | { |
| bogdanm | 0:9b334a45a8ff | 483 | HAL_StatusTypeDef status = HAL_OK; |
| bogdanm | 0:9b334a45a8ff | 484 | |
| bogdanm | 0:9b334a45a8ff | 485 | /* Check the parameters */ |
| bogdanm | 0:9b334a45a8ff | 486 | assert_param(IS_DAC_CHANNEL(Channel)); |
| bogdanm | 0:9b334a45a8ff | 487 | |
| bogdanm | 0:9b334a45a8ff | 488 | /* Disable the selected DAC channel DMA request */ |
| bogdanm | 0:9b334a45a8ff | 489 | hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << Channel); |
| bogdanm | 0:9b334a45a8ff | 490 | |
| bogdanm | 0:9b334a45a8ff | 491 | /* Disable the Peripharal */ |
| bogdanm | 0:9b334a45a8ff | 492 | __HAL_DAC_DISABLE(hdac, Channel); |
| bogdanm | 0:9b334a45a8ff | 493 | |
| bogdanm | 0:9b334a45a8ff | 494 | /* Disable the DMA Channel */ |
| bogdanm | 0:9b334a45a8ff | 495 | /* Channel1 is used */ |
| bogdanm | 0:9b334a45a8ff | 496 | if(Channel == DAC_CHANNEL_1) |
| bogdanm | 0:9b334a45a8ff | 497 | { |
| bogdanm | 0:9b334a45a8ff | 498 | /* Disable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 499 | status = HAL_DMA_Abort(hdac->DMA_Handle1); |
| bogdanm | 0:9b334a45a8ff | 500 | |
| bogdanm | 0:9b334a45a8ff | 501 | /* Disable the DAC DMA underrun interrupt */ |
| bogdanm | 0:9b334a45a8ff | 502 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1); |
| bogdanm | 0:9b334a45a8ff | 503 | } |
| bogdanm | 0:9b334a45a8ff | 504 | else /* Channel2 is used for */ |
| bogdanm | 0:9b334a45a8ff | 505 | { |
| bogdanm | 0:9b334a45a8ff | 506 | /* Disable the DMA channel */ |
| bogdanm | 0:9b334a45a8ff | 507 | status = HAL_DMA_Abort(hdac->DMA_Handle2); |
| bogdanm | 0:9b334a45a8ff | 508 | |
| bogdanm | 0:9b334a45a8ff | 509 | /* Disable the DAC DMA underrun interrupt */ |
| bogdanm | 0:9b334a45a8ff | 510 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2); |
| bogdanm | 0:9b334a45a8ff | 511 | } |
| bogdanm | 0:9b334a45a8ff | 512 | |
| bogdanm | 0:9b334a45a8ff | 513 | /* Check if DMA Channel effectively disabled */ |
| bogdanm | 0:9b334a45a8ff | 514 | if(status != HAL_OK) |
| bogdanm | 0:9b334a45a8ff | 515 | { |
| bogdanm | 0:9b334a45a8ff | 516 | /* Update ADC state machine to error */ |
| bogdanm | 0:9b334a45a8ff | 517 | hdac->State = HAL_DAC_STATE_ERROR; |
| bogdanm | 0:9b334a45a8ff | 518 | } |
| bogdanm | 0:9b334a45a8ff | 519 | else |
| bogdanm | 0:9b334a45a8ff | 520 | { |
| bogdanm | 0:9b334a45a8ff | 521 | /* Change DAC state */ |
| bogdanm | 0:9b334a45a8ff | 522 | hdac->State = HAL_DAC_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 523 | } |
| bogdanm | 0:9b334a45a8ff | 524 | |
| bogdanm | 0:9b334a45a8ff | 525 | /* Return function status */ |
| bogdanm | 0:9b334a45a8ff | 526 | return status; |
| bogdanm | 0:9b334a45a8ff | 527 | } |
| bogdanm | 0:9b334a45a8ff | 528 | #endif /* STM32F100xB) || defined (STM32F100xE) */ |
| bogdanm | 0:9b334a45a8ff | 529 | |
| bogdanm | 0:9b334a45a8ff | 530 | #if defined (STM32F100xB) || defined (STM32F100xE) |
| bogdanm | 0:9b334a45a8ff | 531 | /** |
| bogdanm | 0:9b334a45a8ff | 532 | * @brief Handles DAC interrupt request |
| bogdanm | 0:9b334a45a8ff | 533 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
| bogdanm | 0:9b334a45a8ff | 534 | * On these devices, this function uses the interruption of DMA |
| bogdanm | 0:9b334a45a8ff | 535 | * underrun. |
| bogdanm | 0:9b334a45a8ff | 536 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 537 | * the configuration information for the specified DAC. |
| bogdanm | 0:9b334a45a8ff | 538 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 539 | */ |
| bogdanm | 0:9b334a45a8ff | 540 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac) |
| bogdanm | 0:9b334a45a8ff | 541 | { |
| bogdanm | 0:9b334a45a8ff | 542 | |
| bogdanm | 0:9b334a45a8ff | 543 | if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1)) |
| bogdanm | 0:9b334a45a8ff | 544 | { |
| bogdanm | 0:9b334a45a8ff | 545 | /* Check underrun flag of DAC channel 1 */ |
| bogdanm | 0:9b334a45a8ff | 546 | if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1)) |
| bogdanm | 0:9b334a45a8ff | 547 | { |
| bogdanm | 0:9b334a45a8ff | 548 | /* Change DAC state to error state */ |
| bogdanm | 0:9b334a45a8ff | 549 | hdac->State = HAL_DAC_STATE_ERROR; |
| bogdanm | 0:9b334a45a8ff | 550 | |
| bogdanm | 0:9b334a45a8ff | 551 | /* Set DAC error code to chanel1 DMA underrun error */ |
| bogdanm | 0:9b334a45a8ff | 552 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1); |
| bogdanm | 0:9b334a45a8ff | 553 | |
| bogdanm | 0:9b334a45a8ff | 554 | /* Clear the underrun flag */ |
| bogdanm | 0:9b334a45a8ff | 555 | __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1); |
| bogdanm | 0:9b334a45a8ff | 556 | |
| bogdanm | 0:9b334a45a8ff | 557 | /* Disable the selected DAC channel1 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 558 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
| bogdanm | 0:9b334a45a8ff | 559 | |
| bogdanm | 0:9b334a45a8ff | 560 | /* Error callback */ |
| bogdanm | 0:9b334a45a8ff | 561 | HAL_DAC_DMAUnderrunCallbackCh1(hdac); |
| bogdanm | 0:9b334a45a8ff | 562 | } |
| bogdanm | 0:9b334a45a8ff | 563 | } |
| bogdanm | 0:9b334a45a8ff | 564 | |
| bogdanm | 0:9b334a45a8ff | 565 | if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2)) |
| bogdanm | 0:9b334a45a8ff | 566 | { |
| bogdanm | 0:9b334a45a8ff | 567 | /* Check underrun flag of DAC channel 2 */ |
| bogdanm | 0:9b334a45a8ff | 568 | if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2)) |
| bogdanm | 0:9b334a45a8ff | 569 | { |
| bogdanm | 0:9b334a45a8ff | 570 | /* Change DAC state to error state */ |
| bogdanm | 0:9b334a45a8ff | 571 | hdac->State = HAL_DAC_STATE_ERROR; |
| bogdanm | 0:9b334a45a8ff | 572 | |
| bogdanm | 0:9b334a45a8ff | 573 | /* Set DAC error code to channel2 DMA underrun error */ |
| bogdanm | 0:9b334a45a8ff | 574 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2); |
| bogdanm | 0:9b334a45a8ff | 575 | |
| bogdanm | 0:9b334a45a8ff | 576 | /* Clear the underrun flag */ |
| bogdanm | 0:9b334a45a8ff | 577 | __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2); |
| bogdanm | 0:9b334a45a8ff | 578 | |
| bogdanm | 0:9b334a45a8ff | 579 | /* Disable the selected DAC channel1 DMA request */ |
| bogdanm | 0:9b334a45a8ff | 580 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
| bogdanm | 0:9b334a45a8ff | 581 | |
| bogdanm | 0:9b334a45a8ff | 582 | /* Error callback */ |
| bogdanm | 0:9b334a45a8ff | 583 | HAL_DACEx_DMAUnderrunCallbackCh2(hdac); |
| bogdanm | 0:9b334a45a8ff | 584 | } |
| bogdanm | 0:9b334a45a8ff | 585 | } |
| bogdanm | 0:9b334a45a8ff | 586 | } |
| bogdanm | 0:9b334a45a8ff | 587 | #endif /* STM32F100xB || STM32F100xE */ |
| bogdanm | 0:9b334a45a8ff | 588 | |
| bogdanm | 0:9b334a45a8ff | 589 | |
| bogdanm | 0:9b334a45a8ff | 590 | /** |
| bogdanm | 0:9b334a45a8ff | 591 | * @} |
| bogdanm | 0:9b334a45a8ff | 592 | */ |
| bogdanm | 0:9b334a45a8ff | 593 | |
| bogdanm | 0:9b334a45a8ff | 594 | /** @defgroup DACEx_Private_Functions DACEx Private Functions |
| bogdanm | 0:9b334a45a8ff | 595 | * @{ |
| bogdanm | 0:9b334a45a8ff | 596 | */ |
| bogdanm | 0:9b334a45a8ff | 597 | |
| bogdanm | 0:9b334a45a8ff | 598 | /** |
| bogdanm | 0:9b334a45a8ff | 599 | * @brief DMA conversion complete callback. |
| bogdanm | 0:9b334a45a8ff | 600 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 601 | * the configuration information for the specified DMA module. |
| bogdanm | 0:9b334a45a8ff | 602 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 603 | */ |
| bogdanm | 0:9b334a45a8ff | 604 | void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma) |
| bogdanm | 0:9b334a45a8ff | 605 | { |
| bogdanm | 0:9b334a45a8ff | 606 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| bogdanm | 0:9b334a45a8ff | 607 | |
| bogdanm | 0:9b334a45a8ff | 608 | HAL_DACEx_ConvCpltCallbackCh2(hdac); |
| bogdanm | 0:9b334a45a8ff | 609 | |
| bogdanm | 0:9b334a45a8ff | 610 | hdac->State= HAL_DAC_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 611 | } |
| bogdanm | 0:9b334a45a8ff | 612 | |
| bogdanm | 0:9b334a45a8ff | 613 | /** |
| bogdanm | 0:9b334a45a8ff | 614 | * @brief DMA half transfer complete callback. |
| bogdanm | 0:9b334a45a8ff | 615 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 616 | * the configuration information for the specified DMA module. |
| bogdanm | 0:9b334a45a8ff | 617 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 618 | */ |
| bogdanm | 0:9b334a45a8ff | 619 | void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma) |
| bogdanm | 0:9b334a45a8ff | 620 | { |
| bogdanm | 0:9b334a45a8ff | 621 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| bogdanm | 0:9b334a45a8ff | 622 | /* Conversion complete callback */ |
| bogdanm | 0:9b334a45a8ff | 623 | HAL_DACEx_ConvHalfCpltCallbackCh2(hdac); |
| bogdanm | 0:9b334a45a8ff | 624 | } |
| bogdanm | 0:9b334a45a8ff | 625 | |
| bogdanm | 0:9b334a45a8ff | 626 | /** |
| bogdanm | 0:9b334a45a8ff | 627 | * @brief DMA error callback |
| bogdanm | 0:9b334a45a8ff | 628 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| bogdanm | 0:9b334a45a8ff | 629 | * the configuration information for the specified DMA module. |
| bogdanm | 0:9b334a45a8ff | 630 | * @retval None |
| bogdanm | 0:9b334a45a8ff | 631 | */ |
| bogdanm | 0:9b334a45a8ff | 632 | void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma) |
| bogdanm | 0:9b334a45a8ff | 633 | { |
| bogdanm | 0:9b334a45a8ff | 634 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| bogdanm | 0:9b334a45a8ff | 635 | |
| bogdanm | 0:9b334a45a8ff | 636 | /* Set DAC error code to DMA error */ |
| bogdanm | 0:9b334a45a8ff | 637 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
| bogdanm | 0:9b334a45a8ff | 638 | |
| bogdanm | 0:9b334a45a8ff | 639 | HAL_DACEx_ErrorCallbackCh2(hdac); |
| bogdanm | 0:9b334a45a8ff | 640 | |
| bogdanm | 0:9b334a45a8ff | 641 | hdac->State= HAL_DAC_STATE_READY; |
| bogdanm | 0:9b334a45a8ff | 642 | } |
| bogdanm | 0:9b334a45a8ff | 643 | |
| bogdanm | 0:9b334a45a8ff | 644 | /** |
| bogdanm | 0:9b334a45a8ff | 645 | * @} |
| bogdanm | 0:9b334a45a8ff | 646 | */ |
| bogdanm | 0:9b334a45a8ff | 647 | |
| bogdanm | 0:9b334a45a8ff | 648 | #endif /* STM32F100xB || STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ |
| bogdanm | 0:9b334a45a8ff | 649 | #endif /* HAL_DAC_MODULE_ENABLED */ |
| bogdanm | 0:9b334a45a8ff | 650 | |
| bogdanm | 0:9b334a45a8ff | 651 | /** |
| bogdanm | 0:9b334a45a8ff | 652 | * @} |
| bogdanm | 0:9b334a45a8ff | 653 | */ |
| bogdanm | 0:9b334a45a8ff | 654 | |
| bogdanm | 0:9b334a45a8ff | 655 | /** |
| bogdanm | 0:9b334a45a8ff | 656 | * @} |
| bogdanm | 0:9b334a45a8ff | 657 | */ |
| bogdanm | 0:9b334a45a8ff | 658 | |
| bogdanm | 0:9b334a45a8ff | 659 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |