Fawwaz Nadzmy / mbed-STM

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targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_usart.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_usart.h@144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f3xx_hal_usart.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.3.0
<> 144:ef7eb2e8f9f7 6 * @date 01-July-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of USART HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F3xx_HAL_USART_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F3xx_HAL_USART_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f3xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F3xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup USART
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @defgroup USART_Exported_Types USART Exported Types
<> 144:ef7eb2e8f9f7 59 * @{
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /**
<> 144:ef7eb2e8f9f7 63 * @brief USART Init Structure definition
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65 typedef struct
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
<> 144:ef7eb2e8f9f7 68 The baud rate is computed using the following formula:
<> 144:ef7eb2e8f9f7 69 Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate))). */
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 144:ef7eb2e8f9f7 72 This parameter can be a value of @ref USARTEx_Word_Length. */
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
<> 144:ef7eb2e8f9f7 75 This parameter can be a value of @ref USART_Stop_Bits. */
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 uint32_t Parity; /*!< Specifies the parity mode.
<> 144:ef7eb2e8f9f7 78 This parameter can be a value of @ref USART_Parity
<> 144:ef7eb2e8f9f7 79 @note When parity is enabled, the computed parity is inserted
<> 144:ef7eb2e8f9f7 80 at the MSB position of the transmitted data (9th bit when
<> 144:ef7eb2e8f9f7 81 the word length is set to 9 data bits; 8th bit when the
<> 144:ef7eb2e8f9f7 82 word length is set to 8 data bits). */
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
<> 144:ef7eb2e8f9f7 85 This parameter can be a value of @ref USART_Mode. */
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
<> 144:ef7eb2e8f9f7 88 This parameter can be a value of @ref USART_Clock_Polarity. */
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
<> 144:ef7eb2e8f9f7 91 This parameter can be a value of @ref USART_Clock_Phase. */
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
<> 144:ef7eb2e8f9f7 94 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
<> 144:ef7eb2e8f9f7 95 This parameter can be a value of @ref USART_Last_Bit. */
<> 144:ef7eb2e8f9f7 96 }USART_InitTypeDef;
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 /**
<> 144:ef7eb2e8f9f7 99 * @brief HAL USART State structures definition
<> 144:ef7eb2e8f9f7 100 */
<> 144:ef7eb2e8f9f7 101 typedef enum
<> 144:ef7eb2e8f9f7 102 {
<> 144:ef7eb2e8f9f7 103 HAL_USART_STATE_RESET = 0x00, /*!< Peripheral is not initialized */
<> 144:ef7eb2e8f9f7 104 HAL_USART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
<> 144:ef7eb2e8f9f7 105 HAL_USART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
<> 144:ef7eb2e8f9f7 106 HAL_USART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
<> 144:ef7eb2e8f9f7 107 HAL_USART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
<> 144:ef7eb2e8f9f7 108 HAL_USART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission Reception process is ongoing */
<> 144:ef7eb2e8f9f7 109 HAL_USART_STATE_TIMEOUT = 0x03, /*!< Timeout state */
<> 144:ef7eb2e8f9f7 110 HAL_USART_STATE_ERROR = 0x04 /*!< Error */
<> 144:ef7eb2e8f9f7 111 }HAL_USART_StateTypeDef;
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 /**
<> 144:ef7eb2e8f9f7 114 * @brief USART clock sources definitions
<> 144:ef7eb2e8f9f7 115 */
<> 144:ef7eb2e8f9f7 116 typedef enum
<> 144:ef7eb2e8f9f7 117 {
<> 144:ef7eb2e8f9f7 118 USART_CLOCKSOURCE_PCLK1 = 0x00, /*!< PCLK1 clock source */
<> 144:ef7eb2e8f9f7 119 USART_CLOCKSOURCE_PCLK2 = 0x01, /*!< PCLK2 clock source */
<> 144:ef7eb2e8f9f7 120 USART_CLOCKSOURCE_HSI = 0x02, /*!< HSI clock source */
<> 144:ef7eb2e8f9f7 121 USART_CLOCKSOURCE_SYSCLK = 0x04, /*!< SYSCLK clock source */
<> 144:ef7eb2e8f9f7 122 USART_CLOCKSOURCE_LSE = 0x08, /*!< LSE clock source */
<> 144:ef7eb2e8f9f7 123 USART_CLOCKSOURCE_UNDEFINED = 0x10 /*!< Undefined clock source */
<> 144:ef7eb2e8f9f7 124 }USART_ClockSourceTypeDef;
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 /**
<> 144:ef7eb2e8f9f7 128 * @brief USART handle Structure definition
<> 144:ef7eb2e8f9f7 129 */
<> 144:ef7eb2e8f9f7 130 typedef struct
<> 144:ef7eb2e8f9f7 131 {
<> 144:ef7eb2e8f9f7 132 USART_TypeDef *Instance; /*!< USART registers base address */
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 USART_InitTypeDef Init; /*!< USART communication parameters */
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 uint16_t TxXferSize; /*!< USART Tx Transfer size */
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 uint16_t TxXferCount; /*!< USART Tx Transfer Counter */
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 uint16_t RxXferSize; /*!< USART Rx Transfer size */
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 uint16_t RxXferCount; /*!< USART Rx Transfer Counter */
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 uint16_t Mask; /*!< USART Rx RDR register mask */
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 HAL_LockTypeDef Lock; /*!< Locking object */
<> 144:ef7eb2e8f9f7 155
<> 144:ef7eb2e8f9f7 156 __IO HAL_USART_StateTypeDef State; /*!< USART communication state */
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 __IO uint32_t ErrorCode; /*!< USART Error code */
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 }USART_HandleTypeDef;
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 /**
<> 144:ef7eb2e8f9f7 163 * @}
<> 144:ef7eb2e8f9f7 164 */
<> 144:ef7eb2e8f9f7 165
<> 144:ef7eb2e8f9f7 166 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 167 /** @defgroup USART_Exported_Constants USART Exported Constants
<> 144:ef7eb2e8f9f7 168 * @{
<> 144:ef7eb2e8f9f7 169 */
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 /** @defgroup USART_Error USART Error
<> 144:ef7eb2e8f9f7 172 * @{
<> 144:ef7eb2e8f9f7 173 */
<> 144:ef7eb2e8f9f7 174 #define HAL_USART_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
<> 144:ef7eb2e8f9f7 175 #define HAL_USART_ERROR_PE ((uint32_t)0x00000001) /*!< Parity error */
<> 144:ef7eb2e8f9f7 176 #define HAL_USART_ERROR_NE ((uint32_t)0x00000002) /*!< Noise error */
<> 144:ef7eb2e8f9f7 177 #define HAL_USART_ERROR_FE ((uint32_t)0x00000004) /*!< frame error */
<> 144:ef7eb2e8f9f7 178 #define HAL_USART_ERROR_ORE ((uint32_t)0x00000008) /*!< Overrun error */
<> 144:ef7eb2e8f9f7 179 #define HAL_USART_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */
<> 144:ef7eb2e8f9f7 180 /**
<> 144:ef7eb2e8f9f7 181 * @}
<> 144:ef7eb2e8f9f7 182 */
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 /** @defgroup USART_Stop_Bits USART Number of Stop Bits
<> 144:ef7eb2e8f9f7 185 * @{
<> 144:ef7eb2e8f9f7 186 */
<> 144:ef7eb2e8f9f7 187 #define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0) /*!< USART frame with 0.5 stop bit */
<> 144:ef7eb2e8f9f7 188 #define USART_STOPBITS_1 ((uint32_t)0x00000000) /*!< USART frame with 1 stop bit */
<> 144:ef7eb2e8f9f7 189 #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1)) /*!< USART frame with 1.5 stop bits */
<> 144:ef7eb2e8f9f7 190 #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) /*!< USART frame with 2 stop bits */
<> 144:ef7eb2e8f9f7 191 /**
<> 144:ef7eb2e8f9f7 192 * @}
<> 144:ef7eb2e8f9f7 193 */
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 /** @defgroup USART_Parity USART Parity
<> 144:ef7eb2e8f9f7 196 * @{
<> 144:ef7eb2e8f9f7 197 */
<> 144:ef7eb2e8f9f7 198 #define USART_PARITY_NONE ((uint32_t)0x00000000) /*!< No parity */
<> 144:ef7eb2e8f9f7 199 #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /*!< Even parity */
<> 144:ef7eb2e8f9f7 200 #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< Odd parity */
<> 144:ef7eb2e8f9f7 201 /**
<> 144:ef7eb2e8f9f7 202 * @}
<> 144:ef7eb2e8f9f7 203 */
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205 /** @defgroup USART_Mode USART Mode
<> 144:ef7eb2e8f9f7 206 * @{
<> 144:ef7eb2e8f9f7 207 */
<> 144:ef7eb2e8f9f7 208 #define USART_MODE_RX ((uint32_t)USART_CR1_RE) /*!< RX mode */
<> 144:ef7eb2e8f9f7 209 #define USART_MODE_TX ((uint32_t)USART_CR1_TE) /*!< TX mode */
<> 144:ef7eb2e8f9f7 210 #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) /*!< RX and TX mode */
<> 144:ef7eb2e8f9f7 211 /**
<> 144:ef7eb2e8f9f7 212 * @}
<> 144:ef7eb2e8f9f7 213 */
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 /** @defgroup USART_Clock USART Clock
<> 144:ef7eb2e8f9f7 216 * @{
<> 144:ef7eb2e8f9f7 217 */
<> 144:ef7eb2e8f9f7 218 #define USART_CLOCK_DISABLE ((uint32_t)0x00000000) /*!< USART clock disable */
<> 144:ef7eb2e8f9f7 219 #define USART_CLOCK_ENABLE ((uint32_t)USART_CR2_CLKEN) /*!< USART clock enable */
<> 144:ef7eb2e8f9f7 220 /**
<> 144:ef7eb2e8f9f7 221 * @}
<> 144:ef7eb2e8f9f7 222 */
<> 144:ef7eb2e8f9f7 223
<> 144:ef7eb2e8f9f7 224 /** @defgroup USART_Clock_Polarity USART Clock Polarity
<> 144:ef7eb2e8f9f7 225 * @{
<> 144:ef7eb2e8f9f7 226 */
<> 144:ef7eb2e8f9f7 227 #define USART_POLARITY_LOW ((uint32_t)0x00000000) /*!< USART Clock signal is steady Low */
<> 144:ef7eb2e8f9f7 228 #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL) /*!< USART Clock signal is steady High */
<> 144:ef7eb2e8f9f7 229 /**
<> 144:ef7eb2e8f9f7 230 * @}
<> 144:ef7eb2e8f9f7 231 */
<> 144:ef7eb2e8f9f7 232
<> 144:ef7eb2e8f9f7 233 /** @defgroup USART_Clock_Phase USART Clock Phase
<> 144:ef7eb2e8f9f7 234 * @{
<> 144:ef7eb2e8f9f7 235 */
<> 144:ef7eb2e8f9f7 236 #define USART_PHASE_1EDGE ((uint32_t)0x00000000) /*!< USART frame phase on first clock transition */
<> 144:ef7eb2e8f9f7 237 #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA) /*!< USART frame phase on second clock transition */
<> 144:ef7eb2e8f9f7 238 /**
<> 144:ef7eb2e8f9f7 239 * @}
<> 144:ef7eb2e8f9f7 240 */
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 /** @defgroup USART_Last_Bit USART Last Bit
<> 144:ef7eb2e8f9f7 243 * @{
<> 144:ef7eb2e8f9f7 244 */
<> 144:ef7eb2e8f9f7 245 #define USART_LASTBIT_DISABLE ((uint32_t)0x00000000) /*!< USART frame last data bit clock pulse not output to SCLK pin */
<> 144:ef7eb2e8f9f7 246 #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL) /*!< USART frame last data bit clock pulse output to SCLK pin */
<> 144:ef7eb2e8f9f7 247 /**
<> 144:ef7eb2e8f9f7 248 * @}
<> 144:ef7eb2e8f9f7 249 */
<> 144:ef7eb2e8f9f7 250
<> 144:ef7eb2e8f9f7 251 /** @defgroup USART_Request_Parameters USART Request Parameters
<> 144:ef7eb2e8f9f7 252 * @{
<> 144:ef7eb2e8f9f7 253 */
<> 144:ef7eb2e8f9f7 254 #define USART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
<> 144:ef7eb2e8f9f7 255 #define USART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
<> 144:ef7eb2e8f9f7 256 /**
<> 144:ef7eb2e8f9f7 257 * @}
<> 144:ef7eb2e8f9f7 258 */
<> 144:ef7eb2e8f9f7 259
<> 144:ef7eb2e8f9f7 260 /** @defgroup USART_Flags USART Flags
<> 144:ef7eb2e8f9f7 261 * Elements values convention: 0xXXXX
<> 144:ef7eb2e8f9f7 262 * - 0xXXXX : Flag mask in the ISR register
<> 144:ef7eb2e8f9f7 263 * @{
<> 144:ef7eb2e8f9f7 264 */
<> 144:ef7eb2e8f9f7 265 #define USART_FLAG_REACK ((uint32_t)0x00400000) /*!< USART receive enable acknowledge flag */
<> 144:ef7eb2e8f9f7 266 #define USART_FLAG_TEACK ((uint32_t)0x00200000) /*!< USART transmit enable acknowledge flag */
<> 144:ef7eb2e8f9f7 267 #define USART_FLAG_BUSY ((uint32_t)0x00010000) /*!< USART busy flag */
<> 144:ef7eb2e8f9f7 268 #define USART_FLAG_CTS ((uint32_t)0x00000400) /*!< USART clear to send flag */
<> 144:ef7eb2e8f9f7 269 #define USART_FLAG_CTSIF ((uint32_t)0x00000200) /*!< USART clear to send interrupt flag */
<> 144:ef7eb2e8f9f7 270 #define USART_FLAG_TXE ((uint32_t)0x00000080) /*!< USART transmit data register empty */
<> 144:ef7eb2e8f9f7 271 #define USART_FLAG_TC ((uint32_t)0x00000040) /*!< USART transmission complete */
<> 144:ef7eb2e8f9f7 272 #define USART_FLAG_RXNE ((uint32_t)0x00000020) /*!< USART read data register not empty */
<> 144:ef7eb2e8f9f7 273 #define USART_FLAG_IDLE ((uint32_t)0x00000010) /*!< USART idle flag */
<> 144:ef7eb2e8f9f7 274 #define USART_FLAG_ORE ((uint32_t)0x00000008) /*!< USART overrun error */
<> 144:ef7eb2e8f9f7 275 #define USART_FLAG_NE ((uint32_t)0x00000004) /*!< USART noise error */
<> 144:ef7eb2e8f9f7 276 #define USART_FLAG_FE ((uint32_t)0x00000002) /*!< USART frame error */
<> 144:ef7eb2e8f9f7 277 #define USART_FLAG_PE ((uint32_t)0x00000001) /*!< USART parity error */
<> 144:ef7eb2e8f9f7 278 /**
<> 144:ef7eb2e8f9f7 279 * @}
<> 144:ef7eb2e8f9f7 280 */
<> 144:ef7eb2e8f9f7 281
<> 144:ef7eb2e8f9f7 282 /** @defgroup USART_Interrupt_definition USART Interrupts Definition
<> 144:ef7eb2e8f9f7 283 * Elements values convention: 0000ZZZZ0XXYYYYYb
<> 144:ef7eb2e8f9f7 284 * - YYYYY : Interrupt source position in the XX register (5bits)
<> 144:ef7eb2e8f9f7 285 * - XX : Interrupt source register (2bits)
<> 144:ef7eb2e8f9f7 286 * - 01: CR1 register
<> 144:ef7eb2e8f9f7 287 * - 10: CR2 register
<> 144:ef7eb2e8f9f7 288 * - 11: CR3 register
<> 144:ef7eb2e8f9f7 289 * - ZZZZ : Flag position in the ISR register(4bits)
<> 144:ef7eb2e8f9f7 290 * @{
<> 144:ef7eb2e8f9f7 291 */
<> 144:ef7eb2e8f9f7 292
<> 144:ef7eb2e8f9f7 293 #define USART_IT_PE ((uint16_t)0x0028) /*!< USART parity error interruption */
<> 144:ef7eb2e8f9f7 294 #define USART_IT_TXE ((uint16_t)0x0727) /*!< USART transmit data register empty interruption */
<> 144:ef7eb2e8f9f7 295 #define USART_IT_TC ((uint16_t)0x0626) /*!< USART transmission complete interruption */
<> 144:ef7eb2e8f9f7 296 #define USART_IT_RXNE ((uint16_t)0x0525) /*!< USART read data register not empty interruption */
<> 144:ef7eb2e8f9f7 297 #define USART_IT_IDLE ((uint16_t)0x0424) /*!< USART idle interruption */
<> 144:ef7eb2e8f9f7 298 #define USART_IT_ERR ((uint16_t)0x0060) /*!< USART error interruption */
<> 144:ef7eb2e8f9f7 299 #define USART_IT_ORE ((uint16_t)0x0300) /*!< USART overrun error interruption */
<> 144:ef7eb2e8f9f7 300 #define USART_IT_NE ((uint16_t)0x0200) /*!< USART noise error interruption */
<> 144:ef7eb2e8f9f7 301 #define USART_IT_FE ((uint16_t)0x0100) /*!< USART frame error interruption */
<> 144:ef7eb2e8f9f7 302 /**
<> 144:ef7eb2e8f9f7 303 * @}
<> 144:ef7eb2e8f9f7 304 */
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags
<> 144:ef7eb2e8f9f7 307 * @{
<> 144:ef7eb2e8f9f7 308 */
<> 144:ef7eb2e8f9f7 309 #define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
<> 144:ef7eb2e8f9f7 310 #define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
<> 144:ef7eb2e8f9f7 311 #define USART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
<> 144:ef7eb2e8f9f7 312 #define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
<> 144:ef7eb2e8f9f7 313 #define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
<> 144:ef7eb2e8f9f7 314 #define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
<> 144:ef7eb2e8f9f7 315 #define USART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
<> 144:ef7eb2e8f9f7 316 /**
<> 144:ef7eb2e8f9f7 317 * @}
<> 144:ef7eb2e8f9f7 318 */
<> 144:ef7eb2e8f9f7 319
<> 144:ef7eb2e8f9f7 320 /** @defgroup USART_Interruption_Mask USART Interruption Flags Mask
<> 144:ef7eb2e8f9f7 321 * @{
<> 144:ef7eb2e8f9f7 322 */
<> 144:ef7eb2e8f9f7 323 #define USART_IT_MASK ((uint16_t)0x001F) /*!< USART interruptions flags mask */
<> 144:ef7eb2e8f9f7 324 /**
<> 144:ef7eb2e8f9f7 325 * @}
<> 144:ef7eb2e8f9f7 326 */
<> 144:ef7eb2e8f9f7 327
<> 144:ef7eb2e8f9f7 328 /**
<> 144:ef7eb2e8f9f7 329 * @}
<> 144:ef7eb2e8f9f7 330 */
<> 144:ef7eb2e8f9f7 331
<> 144:ef7eb2e8f9f7 332 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 333 /** @defgroup USART_Exported_Macros USART Exported Macros
<> 144:ef7eb2e8f9f7 334 * @{
<> 144:ef7eb2e8f9f7 335 */
<> 144:ef7eb2e8f9f7 336
<> 144:ef7eb2e8f9f7 337 /** @brief Reset USART handle state.
<> 144:ef7eb2e8f9f7 338 * @param __HANDLE__: USART handle.
<> 144:ef7eb2e8f9f7 339 * @retval None
<> 144:ef7eb2e8f9f7 340 */
<> 144:ef7eb2e8f9f7 341 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
<> 144:ef7eb2e8f9f7 342
<> 144:ef7eb2e8f9f7 343 /** @brief Flush the USART Data registers.
<> 144:ef7eb2e8f9f7 344 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 345 * @retval None
<> 144:ef7eb2e8f9f7 346 */
<> 144:ef7eb2e8f9f7 347 #define __HAL_USART_FLUSH_DRREGISTER(__HANDLE__) \
<> 144:ef7eb2e8f9f7 348 do{ \
<> 144:ef7eb2e8f9f7 349 SET_BIT((__HANDLE__)->Instance->RQR, USART_RXDATA_FLUSH_REQUEST); \
<> 144:ef7eb2e8f9f7 350 SET_BIT((__HANDLE__)->Instance->RQR, USART_TXDATA_FLUSH_REQUEST); \
<> 144:ef7eb2e8f9f7 351 } while(0)
<> 144:ef7eb2e8f9f7 352
<> 144:ef7eb2e8f9f7 353 /** @brief Check whether the specified USART flag is set or not.
<> 144:ef7eb2e8f9f7 354 * @param __HANDLE__: specifies the USART Handle
<> 144:ef7eb2e8f9f7 355 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 356 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 357 * @arg USART_FLAG_REACK: Receive enable acknowledge flag
<> 144:ef7eb2e8f9f7 358 * @arg USART_FLAG_TEACK: Transmit enable acknowledge flag
<> 144:ef7eb2e8f9f7 359 * @arg USART_FLAG_BUSY: Busy flag
<> 144:ef7eb2e8f9f7 360 * @arg USART_FLAG_CTS: CTS Change flag
<> 144:ef7eb2e8f9f7 361 * @arg USART_FLAG_TXE: Transmit data register empty flag
<> 144:ef7eb2e8f9f7 362 * @arg USART_FLAG_TC: Transmission Complete flag
<> 144:ef7eb2e8f9f7 363 * @arg USART_FLAG_RXNE: Receive data register not empty flag
<> 144:ef7eb2e8f9f7 364 * @arg USART_FLAG_IDLE: Idle Line detection flag
<> 144:ef7eb2e8f9f7 365 * @arg USART_FLAG_ORE: OverRun Error flag
<> 144:ef7eb2e8f9f7 366 * @arg USART_FLAG_NE: Noise Error flag
<> 144:ef7eb2e8f9f7 367 * @arg USART_FLAG_FE: Framing Error flag
<> 144:ef7eb2e8f9f7 368 * @arg USART_FLAG_PE: Parity Error flag
<> 144:ef7eb2e8f9f7 369 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 370 */
<> 144:ef7eb2e8f9f7 371 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 372
<> 144:ef7eb2e8f9f7 373 /** @brief Clear the specified USART pending flag.
<> 144:ef7eb2e8f9f7 374 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 375 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 376 * This parameter can be any combination of the following values:
<> 144:ef7eb2e8f9f7 377 * @arg USART_CLEAR_PEF
<> 144:ef7eb2e8f9f7 378 * @arg USART_CLEAR_FEF
<> 144:ef7eb2e8f9f7 379 * @arg USART_CLEAR_NEF
<> 144:ef7eb2e8f9f7 380 * @arg USART_CLEAR_OREF
<> 144:ef7eb2e8f9f7 381 * @arg USART_CLEAR_IDLEF
<> 144:ef7eb2e8f9f7 382 * @arg USART_CLEAR_TCF
<> 144:ef7eb2e8f9f7 383 * @arg USART_CLEAR_CTSF
<> 144:ef7eb2e8f9f7 384 * @retval None
<> 144:ef7eb2e8f9f7 385 */
<> 144:ef7eb2e8f9f7 386 #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
<> 144:ef7eb2e8f9f7 387
<> 144:ef7eb2e8f9f7 388 /** @brief Clear the USART PE pending flag.
<> 144:ef7eb2e8f9f7 389 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 390 * @retval None
<> 144:ef7eb2e8f9f7 391 */
<> 144:ef7eb2e8f9f7 392 #define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_PEF)
<> 144:ef7eb2e8f9f7 393
<> 144:ef7eb2e8f9f7 394 /** @brief Clear the USART FE pending flag.
<> 144:ef7eb2e8f9f7 395 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 396 * @retval None
<> 144:ef7eb2e8f9f7 397 */
<> 144:ef7eb2e8f9f7 398 #define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_FEF)
<> 144:ef7eb2e8f9f7 399
<> 144:ef7eb2e8f9f7 400 /** @brief Clear the USART NE pending flag.
<> 144:ef7eb2e8f9f7 401 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 402 * @retval None
<> 144:ef7eb2e8f9f7 403 */
<> 144:ef7eb2e8f9f7 404 #define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_NEF)
<> 144:ef7eb2e8f9f7 405
<> 144:ef7eb2e8f9f7 406 /** @brief Clear the USART ORE pending flag.
<> 144:ef7eb2e8f9f7 407 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 408 * @retval None
<> 144:ef7eb2e8f9f7 409 */
<> 144:ef7eb2e8f9f7 410 #define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_OREF)
<> 144:ef7eb2e8f9f7 411
<> 144:ef7eb2e8f9f7 412 /** @brief Clear the USART IDLE pending flag.
<> 144:ef7eb2e8f9f7 413 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 414 * @retval None
<> 144:ef7eb2e8f9f7 415 */
<> 144:ef7eb2e8f9f7 416 #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF)
<> 144:ef7eb2e8f9f7 417
<> 144:ef7eb2e8f9f7 418 /** @brief Enable the specified USART interrupt.
<> 144:ef7eb2e8f9f7 419 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 420 * @param __INTERRUPT__: specifies the USART interrupt source to enable.
<> 144:ef7eb2e8f9f7 421 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 422 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 423 * @arg USART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 424 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 425 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 426 * @arg USART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 427 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 428 * @retval None
<> 144:ef7eb2e8f9f7 429 */
<> 144:ef7eb2e8f9f7 430 #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
<> 144:ef7eb2e8f9f7 431 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
<> 144:ef7eb2e8f9f7 432 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))))
<> 144:ef7eb2e8f9f7 433
<> 144:ef7eb2e8f9f7 434 /** @brief Disable the specified USART interrupt.
<> 144:ef7eb2e8f9f7 435 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 436 * @param __INTERRUPT__: specifies the USART interrupt source to disable.
<> 144:ef7eb2e8f9f7 437 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 438 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 439 * @arg USART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 440 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 441 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 442 * @arg USART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 443 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 444 * @retval None
<> 144:ef7eb2e8f9f7 445 */
<> 144:ef7eb2e8f9f7 446 #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
<> 144:ef7eb2e8f9f7 447 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
<> 144:ef7eb2e8f9f7 448 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))))
<> 144:ef7eb2e8f9f7 449
<> 144:ef7eb2e8f9f7 450
<> 144:ef7eb2e8f9f7 451 /** @brief Check whether the specified USART interrupt has occurred or not.
<> 144:ef7eb2e8f9f7 452 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 453 * @param __IT__: specifies the USART interrupt source to check.
<> 144:ef7eb2e8f9f7 454 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 455 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 456 * @arg USART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 457 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 458 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 459 * @arg USART_IT_ORE: OverRun Error interrupt
<> 144:ef7eb2e8f9f7 460 * @arg USART_IT_NE: Noise Error interrupt
<> 144:ef7eb2e8f9f7 461 * @arg USART_IT_FE: Framing Error interrupt
<> 144:ef7eb2e8f9f7 462 * @arg USART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 463 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 464 */
<> 144:ef7eb2e8f9f7 465 #define __HAL_USART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08)))
<> 144:ef7eb2e8f9f7 466
<> 144:ef7eb2e8f9f7 467 /** @brief Check whether the specified USART interrupt source is enabled or not.
<> 144:ef7eb2e8f9f7 468 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 469 * @param __IT__: specifies the USART interrupt source to check.
<> 144:ef7eb2e8f9f7 470 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 471 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 472 * @arg USART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 473 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 474 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 475 * @arg USART_IT_ORE: OverRun Error interrupt
<> 144:ef7eb2e8f9f7 476 * @arg USART_IT_NE: Noise Error interrupt
<> 144:ef7eb2e8f9f7 477 * @arg USART_IT_FE: Framing Error interrupt
<> 144:ef7eb2e8f9f7 478 * @arg USART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 479 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 480 */
<> 144:ef7eb2e8f9f7 481 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5) == 2)? \
<> 144:ef7eb2e8f9f7 482 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << \
<> 144:ef7eb2e8f9f7 483 (((uint16_t)(__IT__)) & USART_IT_MASK)))
<> 144:ef7eb2e8f9f7 484
<> 144:ef7eb2e8f9f7 485
<> 144:ef7eb2e8f9f7 486 /** @brief Clear the specified USART ISR flag, in setting the proper ICR register flag.
<> 144:ef7eb2e8f9f7 487 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 488 * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
<> 144:ef7eb2e8f9f7 489 * to clear the corresponding interrupt.
<> 144:ef7eb2e8f9f7 490 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 491 * @arg USART_CLEAR_PEF: Parity Error Clear Flag
<> 144:ef7eb2e8f9f7 492 * @arg USART_CLEAR_FEF: Framing Error Clear Flag
<> 144:ef7eb2e8f9f7 493 * @arg USART_CLEAR_NEF: Noise detected Clear Flag
<> 144:ef7eb2e8f9f7 494 * @arg USART_CLEAR_OREF: OverRun Error Clear Flag
<> 144:ef7eb2e8f9f7 495 * @arg USART_CLEAR_IDLEF: IDLE line detected Clear Flag
<> 144:ef7eb2e8f9f7 496 * @arg USART_CLEAR_TCF: Transmission Complete Clear Flag
<> 144:ef7eb2e8f9f7 497 * @arg USART_CLEAR_CTSF: CTS Interrupt Clear Flag
<> 144:ef7eb2e8f9f7 498 * @retval None
<> 144:ef7eb2e8f9f7 499 */
<> 144:ef7eb2e8f9f7 500 #define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
<> 144:ef7eb2e8f9f7 501
<> 144:ef7eb2e8f9f7 502 /** @brief Set a specific USART request flag.
<> 144:ef7eb2e8f9f7 503 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 504 * @param __REQ__: specifies the request flag to set.
<> 144:ef7eb2e8f9f7 505 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 506 * @arg USART_RXDATA_FLUSH_REQUEST: Receive Data flush Request
<> 144:ef7eb2e8f9f7 507 * @arg USART_TXDATA_FLUSH_REQUEST: Transmit data flush Request
<> 144:ef7eb2e8f9f7 508 *
<> 144:ef7eb2e8f9f7 509 * @retval None
<> 144:ef7eb2e8f9f7 510 */
<> 144:ef7eb2e8f9f7 511 #define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (__REQ__))
<> 144:ef7eb2e8f9f7 512
<> 144:ef7eb2e8f9f7 513 /** @brief Enable the USART one bit sample method.
<> 144:ef7eb2e8f9f7 514 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 515 * @retval None
<> 144:ef7eb2e8f9f7 516 */
<> 144:ef7eb2e8f9f7 517 #define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
<> 144:ef7eb2e8f9f7 518
<> 144:ef7eb2e8f9f7 519 /** @brief Disable the USART one bit sample method.
<> 144:ef7eb2e8f9f7 520 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 521 * @retval None
<> 144:ef7eb2e8f9f7 522 */
<> 144:ef7eb2e8f9f7 523 #define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
<> 144:ef7eb2e8f9f7 524
<> 144:ef7eb2e8f9f7 525 /** @brief Enable USART.
<> 144:ef7eb2e8f9f7 526 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 527 * @retval None
<> 144:ef7eb2e8f9f7 528 */
<> 144:ef7eb2e8f9f7 529 #define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
<> 144:ef7eb2e8f9f7 530
<> 144:ef7eb2e8f9f7 531 /** @brief Disable USART.
<> 144:ef7eb2e8f9f7 532 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 533 * @retval None
<> 144:ef7eb2e8f9f7 534 */
<> 144:ef7eb2e8f9f7 535 #define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
<> 144:ef7eb2e8f9f7 536
<> 144:ef7eb2e8f9f7 537 /**
<> 144:ef7eb2e8f9f7 538 * @}
<> 144:ef7eb2e8f9f7 539 */
<> 144:ef7eb2e8f9f7 540
<> 144:ef7eb2e8f9f7 541 /* Private macros --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 542 /** @defgroup USART_Private_Macros USART Private Macros
<> 144:ef7eb2e8f9f7 543 * @{
<> 144:ef7eb2e8f9f7 544 */
<> 144:ef7eb2e8f9f7 545
<> 144:ef7eb2e8f9f7 546 /** @brief Check USART Baud rate.
<> 144:ef7eb2e8f9f7 547 * @param __BAUDRATE__: Baudrate specified by the user.
<> 144:ef7eb2e8f9f7 548 * The maximum Baud Rate is derived from the maximum clock on F3 (i.e. 72 MHz)
<> 144:ef7eb2e8f9f7 549 * divided by the smallest oversampling used on the USART (i.e. 8)
<> 144:ef7eb2e8f9f7 550 * @retval Test result (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 551 */
<> 144:ef7eb2e8f9f7 552 #define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 9000001)
<> 144:ef7eb2e8f9f7 553
<> 144:ef7eb2e8f9f7 554 /**
<> 144:ef7eb2e8f9f7 555 * @brief Ensure that USART frame number of stop bits is valid.
<> 144:ef7eb2e8f9f7 556 * @param __STOPBITS__: USART frame number of stop bits.
<> 144:ef7eb2e8f9f7 557 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
<> 144:ef7eb2e8f9f7 558 */
<> 144:ef7eb2e8f9f7 559 #define IS_USART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == USART_STOPBITS_0_5) || \
<> 144:ef7eb2e8f9f7 560 ((__STOPBITS__) == USART_STOPBITS_1) || \
<> 144:ef7eb2e8f9f7 561 ((__STOPBITS__) == USART_STOPBITS_1_5) || \
<> 144:ef7eb2e8f9f7 562 ((__STOPBITS__) == USART_STOPBITS_2))
<> 144:ef7eb2e8f9f7 563
<> 144:ef7eb2e8f9f7 564 /**
<> 144:ef7eb2e8f9f7 565 * @brief Ensure that USART frame parity is valid.
<> 144:ef7eb2e8f9f7 566 * @param __PARITY__: USART frame parity.
<> 144:ef7eb2e8f9f7 567 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
<> 144:ef7eb2e8f9f7 568 */
<> 144:ef7eb2e8f9f7 569 #define IS_USART_PARITY(__PARITY__) (((__PARITY__) == USART_PARITY_NONE) || \
<> 144:ef7eb2e8f9f7 570 ((__PARITY__) == USART_PARITY_EVEN) || \
<> 144:ef7eb2e8f9f7 571 ((__PARITY__) == USART_PARITY_ODD))
<> 144:ef7eb2e8f9f7 572
<> 144:ef7eb2e8f9f7 573 /**
<> 144:ef7eb2e8f9f7 574 * @brief Ensure that USART communication mode is valid.
<> 144:ef7eb2e8f9f7 575 * @param __MODE__: USART communication mode.
<> 144:ef7eb2e8f9f7 576 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
<> 144:ef7eb2e8f9f7 577 */
<> 144:ef7eb2e8f9f7 578 #define IS_USART_MODE(__MODE__) ((((__MODE__) & (uint32_t)0xFFFFFFF3U) == 0x00) && ((__MODE__) != (uint32_t)0x00))
<> 144:ef7eb2e8f9f7 579
<> 144:ef7eb2e8f9f7 580 /**
<> 144:ef7eb2e8f9f7 581 * @brief Ensure that USART clock state is valid.
<> 144:ef7eb2e8f9f7 582 * @param __CLOCK__: USART clock state.
<> 144:ef7eb2e8f9f7 583 * @retval SET (__CLOCK__ is valid) or RESET (__CLOCK__ is invalid)
<> 144:ef7eb2e8f9f7 584 */
<> 144:ef7eb2e8f9f7 585 #define IS_USART_CLOCK(__CLOCK__) (((__CLOCK__) == USART_CLOCK_DISABLE) || \
<> 144:ef7eb2e8f9f7 586 ((__CLOCK__) == USART_CLOCK_ENABLE))
<> 144:ef7eb2e8f9f7 587
<> 144:ef7eb2e8f9f7 588 /**
<> 144:ef7eb2e8f9f7 589 * @brief Ensure that USART frame polarity is valid.
<> 144:ef7eb2e8f9f7 590 * @param __CPOL__: USART frame polarity.
<> 144:ef7eb2e8f9f7 591 * @retval SET (__CPOL__ is valid) or RESET (__CPOL__ is invalid)
<> 144:ef7eb2e8f9f7 592 */
<> 144:ef7eb2e8f9f7 593 #define IS_USART_POLARITY(__CPOL__) (((__CPOL__) == USART_POLARITY_LOW) || ((__CPOL__) == USART_POLARITY_HIGH))
<> 144:ef7eb2e8f9f7 594
<> 144:ef7eb2e8f9f7 595 /**
<> 144:ef7eb2e8f9f7 596 * @brief Ensure that USART frame phase is valid.
<> 144:ef7eb2e8f9f7 597 * @param __CPHA__: USART frame phase.
<> 144:ef7eb2e8f9f7 598 * @retval SET (__CPHA__ is valid) or RESET (__CPHA__ is invalid)
<> 144:ef7eb2e8f9f7 599 */
<> 144:ef7eb2e8f9f7 600 #define IS_USART_PHASE(__CPHA__) (((__CPHA__) == USART_PHASE_1EDGE) || ((__CPHA__) == USART_PHASE_2EDGE))
<> 144:ef7eb2e8f9f7 601
<> 144:ef7eb2e8f9f7 602 /**
<> 144:ef7eb2e8f9f7 603 * @brief Ensure that USART frame last bit clock pulse setting is valid.
<> 144:ef7eb2e8f9f7 604 * @param __LASTBIT__: USART frame last bit clock pulse setting.
<> 144:ef7eb2e8f9f7 605 * @retval SET (__LASTBIT__ is valid) or RESET (__LASTBIT__ is invalid)
<> 144:ef7eb2e8f9f7 606 */
<> 144:ef7eb2e8f9f7 607 #define IS_USART_LASTBIT(__LASTBIT__) (((__LASTBIT__) == USART_LASTBIT_DISABLE) || \
<> 144:ef7eb2e8f9f7 608 ((__LASTBIT__) == USART_LASTBIT_ENABLE))
<> 144:ef7eb2e8f9f7 609
<> 144:ef7eb2e8f9f7 610 /**
<> 144:ef7eb2e8f9f7 611 * @brief Ensure that USART request parameter is valid.
<> 144:ef7eb2e8f9f7 612 * @param __PARAM__: USART request parameter.
<> 144:ef7eb2e8f9f7 613 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
<> 144:ef7eb2e8f9f7 614 */
<> 144:ef7eb2e8f9f7 615 #define IS_USART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) || \
<> 144:ef7eb2e8f9f7 616 ((__PARAM__) == USART_TXDATA_FLUSH_REQUEST))
<> 144:ef7eb2e8f9f7 617
<> 144:ef7eb2e8f9f7 618 /**
<> 144:ef7eb2e8f9f7 619 * @}
<> 144:ef7eb2e8f9f7 620 */
<> 144:ef7eb2e8f9f7 621
<> 144:ef7eb2e8f9f7 622 /* Include USART HAL Extension module */
<> 144:ef7eb2e8f9f7 623 #include "stm32f3xx_hal_usart_ex.h"
<> 144:ef7eb2e8f9f7 624
<> 144:ef7eb2e8f9f7 625 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 626 /** @addtogroup USART_Exported_Functions USART Exported Functions
<> 144:ef7eb2e8f9f7 627 * @{
<> 144:ef7eb2e8f9f7 628 */
<> 144:ef7eb2e8f9f7 629
<> 144:ef7eb2e8f9f7 630 /** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 631 * @{
<> 144:ef7eb2e8f9f7 632 */
<> 144:ef7eb2e8f9f7 633
<> 144:ef7eb2e8f9f7 634 /* Initialization and de-initialization functions ****************************/
<> 144:ef7eb2e8f9f7 635 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 636 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 637 void HAL_USART_MspInit(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 638 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 639
<> 144:ef7eb2e8f9f7 640 /**
<> 144:ef7eb2e8f9f7 641 * @}
<> 144:ef7eb2e8f9f7 642 */
<> 144:ef7eb2e8f9f7 643
<> 144:ef7eb2e8f9f7 644 /** @addtogroup USART_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 645 * @{
<> 144:ef7eb2e8f9f7 646 */
<> 144:ef7eb2e8f9f7 647
<> 144:ef7eb2e8f9f7 648 /* IO operation functions *****************************************************/
<> 144:ef7eb2e8f9f7 649 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 650 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 651 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 652 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 653 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 654 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 655 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 656 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 657 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 658 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 659 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 660 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 661 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 662 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 663 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 664 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 665 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 666 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 667 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 668
<> 144:ef7eb2e8f9f7 669 /**
<> 144:ef7eb2e8f9f7 670 * @}
<> 144:ef7eb2e8f9f7 671 */
<> 144:ef7eb2e8f9f7 672
<> 144:ef7eb2e8f9f7 673 /* Peripheral Control functions ***********************************************/
<> 144:ef7eb2e8f9f7 674
<> 144:ef7eb2e8f9f7 675 /** @addtogroup USART_Exported_Functions_Group3 Peripheral State and Error functions
<> 144:ef7eb2e8f9f7 676 * @{
<> 144:ef7eb2e8f9f7 677 */
<> 144:ef7eb2e8f9f7 678
<> 144:ef7eb2e8f9f7 679 /* Peripheral State and Error functions ***************************************/
<> 144:ef7eb2e8f9f7 680 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 681 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 682
<> 144:ef7eb2e8f9f7 683 /**
<> 144:ef7eb2e8f9f7 684 * @}
<> 144:ef7eb2e8f9f7 685 */
<> 144:ef7eb2e8f9f7 686
<> 144:ef7eb2e8f9f7 687 /**
<> 144:ef7eb2e8f9f7 688 * @}
<> 144:ef7eb2e8f9f7 689 */
<> 144:ef7eb2e8f9f7 690
<> 144:ef7eb2e8f9f7 691 /**
<> 144:ef7eb2e8f9f7 692 * @}
<> 144:ef7eb2e8f9f7 693 */
<> 144:ef7eb2e8f9f7 694
<> 144:ef7eb2e8f9f7 695 /**
<> 144:ef7eb2e8f9f7 696 * @}
<> 144:ef7eb2e8f9f7 697 */
<> 144:ef7eb2e8f9f7 698
<> 144:ef7eb2e8f9f7 699 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 700 }
<> 144:ef7eb2e8f9f7 701 #endif
<> 144:ef7eb2e8f9f7 702
<> 144:ef7eb2e8f9f7 703 #endif /* __STM32F3xx_HAL_USART_H */
<> 144:ef7eb2e8f9f7 704
<> 144:ef7eb2e8f9f7 705 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 706