Fawwaz Nadzmy / mbed-STM

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targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_irda_ex.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_irda_ex.h@144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f3xx_hal_irda_ex.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.3.0
<> 144:ef7eb2e8f9f7 6 * @date 01-July-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of IRDA HAL Extension module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F3xx_HAL_IRDA_EX_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F3xx_HAL_IRDA_EX_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f3xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F3xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @defgroup IRDAEx IRDAEx
<> 144:ef7eb2e8f9f7 54 * @brief IRDA Extension HAL module driver.
<> 144:ef7eb2e8f9f7 55 * @{
<> 144:ef7eb2e8f9f7 56 */
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 59 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 60 /** @defgroup IRDAEx_Exported_Constants IRDAEx Exported Constants
<> 144:ef7eb2e8f9f7 61 * @{
<> 144:ef7eb2e8f9f7 62 */
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 /** @defgroup IRDAEx_Word_Length IRDA Word Length
<> 144:ef7eb2e8f9f7 65 * @{
<> 144:ef7eb2e8f9f7 66 */
<> 144:ef7eb2e8f9f7 67 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
<> 144:ef7eb2e8f9f7 68 defined(STM32F334x8) || \
<> 144:ef7eb2e8f9f7 69 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
<> 144:ef7eb2e8f9f7 70 #define IRDA_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long frame */
<> 144:ef7eb2e8f9f7 71 #define IRDA_WORDLENGTH_8B ((uint32_t)0x00000000) /*!< 8-bit long frame */
<> 144:ef7eb2e8f9f7 72 #define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long frame */
<> 144:ef7eb2e8f9f7 73 #else
<> 144:ef7eb2e8f9f7 74 #define IRDA_WORDLENGTH_8B ((uint32_t)0x00000000) /*!< 8-bit long frame */
<> 144:ef7eb2e8f9f7 75 #define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M) /*!< 9-bit long frame */
<> 144:ef7eb2e8f9f7 76 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
<> 144:ef7eb2e8f9f7 77 /* STM32F334x8 || */
<> 144:ef7eb2e8f9f7 78 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
<> 144:ef7eb2e8f9f7 79 /**
<> 144:ef7eb2e8f9f7 80 * @}
<> 144:ef7eb2e8f9f7 81 */
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 /**
<> 144:ef7eb2e8f9f7 84 * @}
<> 144:ef7eb2e8f9f7 85 */
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 88 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 91
<> 144:ef7eb2e8f9f7 92 /** @defgroup IRDAEx_Private_Macros IRDAEx Private Macros
<> 144:ef7eb2e8f9f7 93 * @{
<> 144:ef7eb2e8f9f7 94 */
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 /** @brief Report the IRDA clock source.
<> 144:ef7eb2e8f9f7 97 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 98 * @param __CLOCKSOURCE__: output variable.
<> 144:ef7eb2e8f9f7 99 * @retval IRDA clocking source, written in __CLOCKSOURCE__.
<> 144:ef7eb2e8f9f7 100 */
<> 144:ef7eb2e8f9f7 101 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
<> 144:ef7eb2e8f9f7 102 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)
<> 144:ef7eb2e8f9f7 103 #define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
<> 144:ef7eb2e8f9f7 104 do { \
<> 144:ef7eb2e8f9f7 105 if((__HANDLE__)->Instance == USART1) \
<> 144:ef7eb2e8f9f7 106 { \
<> 144:ef7eb2e8f9f7 107 switch(__HAL_RCC_GET_USART1_SOURCE()) \
<> 144:ef7eb2e8f9f7 108 { \
<> 144:ef7eb2e8f9f7 109 case RCC_USART1CLKSOURCE_PCLK2: \
<> 144:ef7eb2e8f9f7 110 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \
<> 144:ef7eb2e8f9f7 111 break; \
<> 144:ef7eb2e8f9f7 112 case RCC_USART1CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 113 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 114 break; \
<> 144:ef7eb2e8f9f7 115 case RCC_USART1CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 116 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 117 break; \
<> 144:ef7eb2e8f9f7 118 case RCC_USART1CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 119 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 120 break; \
<> 144:ef7eb2e8f9f7 121 default: \
<> 144:ef7eb2e8f9f7 122 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 123 break; \
<> 144:ef7eb2e8f9f7 124 } \
<> 144:ef7eb2e8f9f7 125 } \
<> 144:ef7eb2e8f9f7 126 else if((__HANDLE__)->Instance == USART2) \
<> 144:ef7eb2e8f9f7 127 { \
<> 144:ef7eb2e8f9f7 128 switch(__HAL_RCC_GET_USART2_SOURCE()) \
<> 144:ef7eb2e8f9f7 129 { \
<> 144:ef7eb2e8f9f7 130 case RCC_USART2CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 131 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 132 break; \
<> 144:ef7eb2e8f9f7 133 case RCC_USART2CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 134 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 135 break; \
<> 144:ef7eb2e8f9f7 136 case RCC_USART2CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 137 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 138 break; \
<> 144:ef7eb2e8f9f7 139 case RCC_USART2CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 140 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 141 break; \
<> 144:ef7eb2e8f9f7 142 default: \
<> 144:ef7eb2e8f9f7 143 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 144 break; \
<> 144:ef7eb2e8f9f7 145 } \
<> 144:ef7eb2e8f9f7 146 } \
<> 144:ef7eb2e8f9f7 147 else if((__HANDLE__)->Instance == USART3) \
<> 144:ef7eb2e8f9f7 148 { \
<> 144:ef7eb2e8f9f7 149 switch(__HAL_RCC_GET_USART3_SOURCE()) \
<> 144:ef7eb2e8f9f7 150 { \
<> 144:ef7eb2e8f9f7 151 case RCC_USART3CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 152 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 153 break; \
<> 144:ef7eb2e8f9f7 154 case RCC_USART3CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 155 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 156 break; \
<> 144:ef7eb2e8f9f7 157 case RCC_USART3CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 158 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 159 break; \
<> 144:ef7eb2e8f9f7 160 case RCC_USART3CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 161 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 162 break; \
<> 144:ef7eb2e8f9f7 163 default: \
<> 144:ef7eb2e8f9f7 164 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 165 break; \
<> 144:ef7eb2e8f9f7 166 } \
<> 144:ef7eb2e8f9f7 167 } \
<> 144:ef7eb2e8f9f7 168 else if((__HANDLE__)->Instance == UART4) \
<> 144:ef7eb2e8f9f7 169 { \
<> 144:ef7eb2e8f9f7 170 switch(__HAL_RCC_GET_UART4_SOURCE()) \
<> 144:ef7eb2e8f9f7 171 { \
<> 144:ef7eb2e8f9f7 172 case RCC_UART4CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 173 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 174 break; \
<> 144:ef7eb2e8f9f7 175 case RCC_UART4CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 176 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 177 break; \
<> 144:ef7eb2e8f9f7 178 case RCC_UART4CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 179 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 180 break; \
<> 144:ef7eb2e8f9f7 181 case RCC_UART4CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 182 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 183 break; \
<> 144:ef7eb2e8f9f7 184 default: \
<> 144:ef7eb2e8f9f7 185 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 186 break; \
<> 144:ef7eb2e8f9f7 187 } \
<> 144:ef7eb2e8f9f7 188 } \
<> 144:ef7eb2e8f9f7 189 else if ((__HANDLE__)->Instance == UART5) \
<> 144:ef7eb2e8f9f7 190 { \
<> 144:ef7eb2e8f9f7 191 switch(__HAL_RCC_GET_UART5_SOURCE()) \
<> 144:ef7eb2e8f9f7 192 { \
<> 144:ef7eb2e8f9f7 193 case RCC_UART5CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 194 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 195 break; \
<> 144:ef7eb2e8f9f7 196 case RCC_UART5CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 197 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 198 break; \
<> 144:ef7eb2e8f9f7 199 case RCC_UART5CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 200 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 201 break; \
<> 144:ef7eb2e8f9f7 202 case RCC_UART5CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 203 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 204 break; \
<> 144:ef7eb2e8f9f7 205 default: \
<> 144:ef7eb2e8f9f7 206 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 207 break; \
<> 144:ef7eb2e8f9f7 208 } \
<> 144:ef7eb2e8f9f7 209 } \
<> 144:ef7eb2e8f9f7 210 else \
<> 144:ef7eb2e8f9f7 211 { \
<> 144:ef7eb2e8f9f7 212 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 213 } \
<> 144:ef7eb2e8f9f7 214 } while(0)
<> 144:ef7eb2e8f9f7 215 #elif defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
<> 144:ef7eb2e8f9f7 216 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
<> 144:ef7eb2e8f9f7 217 #define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
<> 144:ef7eb2e8f9f7 218 do { \
<> 144:ef7eb2e8f9f7 219 if((__HANDLE__)->Instance == USART1) \
<> 144:ef7eb2e8f9f7 220 { \
<> 144:ef7eb2e8f9f7 221 switch(__HAL_RCC_GET_USART1_SOURCE()) \
<> 144:ef7eb2e8f9f7 222 { \
<> 144:ef7eb2e8f9f7 223 case RCC_USART1CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 224 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 225 break; \
<> 144:ef7eb2e8f9f7 226 case RCC_USART1CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 227 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 228 break; \
<> 144:ef7eb2e8f9f7 229 case RCC_USART1CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 230 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 231 break; \
<> 144:ef7eb2e8f9f7 232 case RCC_USART1CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 233 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 234 break; \
<> 144:ef7eb2e8f9f7 235 default: \
<> 144:ef7eb2e8f9f7 236 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 237 break; \
<> 144:ef7eb2e8f9f7 238 } \
<> 144:ef7eb2e8f9f7 239 } \
<> 144:ef7eb2e8f9f7 240 else if((__HANDLE__)->Instance == USART2) \
<> 144:ef7eb2e8f9f7 241 { \
<> 144:ef7eb2e8f9f7 242 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 243 } \
<> 144:ef7eb2e8f9f7 244 else if((__HANDLE__)->Instance == USART3) \
<> 144:ef7eb2e8f9f7 245 { \
<> 144:ef7eb2e8f9f7 246 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 247 } \
<> 144:ef7eb2e8f9f7 248 else \
<> 144:ef7eb2e8f9f7 249 { \
<> 144:ef7eb2e8f9f7 250 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 251 } \
<> 144:ef7eb2e8f9f7 252 } while(0)
<> 144:ef7eb2e8f9f7 253 #else
<> 144:ef7eb2e8f9f7 254 #define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
<> 144:ef7eb2e8f9f7 255 do { \
<> 144:ef7eb2e8f9f7 256 if((__HANDLE__)->Instance == USART1) \
<> 144:ef7eb2e8f9f7 257 { \
<> 144:ef7eb2e8f9f7 258 switch(__HAL_RCC_GET_USART1_SOURCE()) \
<> 144:ef7eb2e8f9f7 259 { \
<> 144:ef7eb2e8f9f7 260 case RCC_USART1CLKSOURCE_PCLK2: \
<> 144:ef7eb2e8f9f7 261 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \
<> 144:ef7eb2e8f9f7 262 break; \
<> 144:ef7eb2e8f9f7 263 case RCC_USART1CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 264 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 265 break; \
<> 144:ef7eb2e8f9f7 266 case RCC_USART1CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 267 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 268 break; \
<> 144:ef7eb2e8f9f7 269 case RCC_USART1CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 270 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 271 break; \
<> 144:ef7eb2e8f9f7 272 default: \
<> 144:ef7eb2e8f9f7 273 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 274 break; \
<> 144:ef7eb2e8f9f7 275 } \
<> 144:ef7eb2e8f9f7 276 } \
<> 144:ef7eb2e8f9f7 277 else if((__HANDLE__)->Instance == USART2) \
<> 144:ef7eb2e8f9f7 278 { \
<> 144:ef7eb2e8f9f7 279 switch(__HAL_RCC_GET_USART2_SOURCE()) \
<> 144:ef7eb2e8f9f7 280 { \
<> 144:ef7eb2e8f9f7 281 case RCC_USART2CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 282 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 283 break; \
<> 144:ef7eb2e8f9f7 284 case RCC_USART2CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 285 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 286 break; \
<> 144:ef7eb2e8f9f7 287 case RCC_USART2CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 288 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 289 break; \
<> 144:ef7eb2e8f9f7 290 case RCC_USART2CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 291 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 292 break; \
<> 144:ef7eb2e8f9f7 293 default: \
<> 144:ef7eb2e8f9f7 294 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 295 break; \
<> 144:ef7eb2e8f9f7 296 } \
<> 144:ef7eb2e8f9f7 297 } \
<> 144:ef7eb2e8f9f7 298 else if((__HANDLE__)->Instance == USART3) \
<> 144:ef7eb2e8f9f7 299 { \
<> 144:ef7eb2e8f9f7 300 switch(__HAL_RCC_GET_USART3_SOURCE()) \
<> 144:ef7eb2e8f9f7 301 { \
<> 144:ef7eb2e8f9f7 302 case RCC_USART3CLKSOURCE_PCLK1: \
<> 144:ef7eb2e8f9f7 303 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
<> 144:ef7eb2e8f9f7 304 break; \
<> 144:ef7eb2e8f9f7 305 case RCC_USART3CLKSOURCE_HSI: \
<> 144:ef7eb2e8f9f7 306 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
<> 144:ef7eb2e8f9f7 307 break; \
<> 144:ef7eb2e8f9f7 308 case RCC_USART3CLKSOURCE_SYSCLK: \
<> 144:ef7eb2e8f9f7 309 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
<> 144:ef7eb2e8f9f7 310 break; \
<> 144:ef7eb2e8f9f7 311 case RCC_USART3CLKSOURCE_LSE: \
<> 144:ef7eb2e8f9f7 312 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
<> 144:ef7eb2e8f9f7 313 break; \
<> 144:ef7eb2e8f9f7 314 default: \
<> 144:ef7eb2e8f9f7 315 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 316 break; \
<> 144:ef7eb2e8f9f7 317 } \
<> 144:ef7eb2e8f9f7 318 } \
<> 144:ef7eb2e8f9f7 319 else \
<> 144:ef7eb2e8f9f7 320 { \
<> 144:ef7eb2e8f9f7 321 (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
<> 144:ef7eb2e8f9f7 322 } \
<> 144:ef7eb2e8f9f7 323 } while(0)
<> 144:ef7eb2e8f9f7 324 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
<> 144:ef7eb2e8f9f7 325 /* STM32F302xC || STM32F303xC || STM32F358xx || */
<> 144:ef7eb2e8f9f7 326
<> 144:ef7eb2e8f9f7 327
<> 144:ef7eb2e8f9f7 328 /** @brief Compute the mask to apply to retrieve the received data
<> 144:ef7eb2e8f9f7 329 * according to the word length and to the parity bits activation.
<> 144:ef7eb2e8f9f7 330 * @note If PCE = 1, the parity bit is not included in the data extracted
<> 144:ef7eb2e8f9f7 331 * by the reception API().
<> 144:ef7eb2e8f9f7 332 * This masking operation is not carried out in the case of
<> 144:ef7eb2e8f9f7 333 * DMA transfers.
<> 144:ef7eb2e8f9f7 334 * @param __HANDLE__: specifies the IRDA Handle
<> 144:ef7eb2e8f9f7 335 * @retval None, the mask to apply to IRDA RDR register is stored in (__HANDLE__)->Mask field.
<> 144:ef7eb2e8f9f7 336 */
<> 144:ef7eb2e8f9f7 337 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
<> 144:ef7eb2e8f9f7 338 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \
<> 144:ef7eb2e8f9f7 339 defined(STM32F334x8)
<> 144:ef7eb2e8f9f7 340 #define IRDA_MASK_COMPUTATION(__HANDLE__) \
<> 144:ef7eb2e8f9f7 341 do { \
<> 144:ef7eb2e8f9f7 342 if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_9B) \
<> 144:ef7eb2e8f9f7 343 { \
<> 144:ef7eb2e8f9f7 344 if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
<> 144:ef7eb2e8f9f7 345 { \
<> 144:ef7eb2e8f9f7 346 (__HANDLE__)->Mask = 0x01FF ; \
<> 144:ef7eb2e8f9f7 347 } \
<> 144:ef7eb2e8f9f7 348 else \
<> 144:ef7eb2e8f9f7 349 { \
<> 144:ef7eb2e8f9f7 350 (__HANDLE__)->Mask = 0x00FF ; \
<> 144:ef7eb2e8f9f7 351 } \
<> 144:ef7eb2e8f9f7 352 } \
<> 144:ef7eb2e8f9f7 353 else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_8B) \
<> 144:ef7eb2e8f9f7 354 { \
<> 144:ef7eb2e8f9f7 355 if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
<> 144:ef7eb2e8f9f7 356 { \
<> 144:ef7eb2e8f9f7 357 (__HANDLE__)->Mask = 0x00FF ; \
<> 144:ef7eb2e8f9f7 358 } \
<> 144:ef7eb2e8f9f7 359 else \
<> 144:ef7eb2e8f9f7 360 { \
<> 144:ef7eb2e8f9f7 361 (__HANDLE__)->Mask = 0x007F ; \
<> 144:ef7eb2e8f9f7 362 } \
<> 144:ef7eb2e8f9f7 363 } \
<> 144:ef7eb2e8f9f7 364 else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_7B) \
<> 144:ef7eb2e8f9f7 365 { \
<> 144:ef7eb2e8f9f7 366 if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
<> 144:ef7eb2e8f9f7 367 { \
<> 144:ef7eb2e8f9f7 368 (__HANDLE__)->Mask = 0x007F ; \
<> 144:ef7eb2e8f9f7 369 } \
<> 144:ef7eb2e8f9f7 370 else \
<> 144:ef7eb2e8f9f7 371 { \
<> 144:ef7eb2e8f9f7 372 (__HANDLE__)->Mask = 0x003F ; \
<> 144:ef7eb2e8f9f7 373 } \
<> 144:ef7eb2e8f9f7 374 } \
<> 144:ef7eb2e8f9f7 375 } while(0)
<> 144:ef7eb2e8f9f7 376 #else
<> 144:ef7eb2e8f9f7 377 #define IRDA_MASK_COMPUTATION(__HANDLE__) \
<> 144:ef7eb2e8f9f7 378 do { \
<> 144:ef7eb2e8f9f7 379 if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_9B) \
<> 144:ef7eb2e8f9f7 380 { \
<> 144:ef7eb2e8f9f7 381 if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
<> 144:ef7eb2e8f9f7 382 { \
<> 144:ef7eb2e8f9f7 383 (__HANDLE__)->Mask = 0x01FF ; \
<> 144:ef7eb2e8f9f7 384 } \
<> 144:ef7eb2e8f9f7 385 else \
<> 144:ef7eb2e8f9f7 386 { \
<> 144:ef7eb2e8f9f7 387 (__HANDLE__)->Mask = 0x00FF ; \
<> 144:ef7eb2e8f9f7 388 } \
<> 144:ef7eb2e8f9f7 389 } \
<> 144:ef7eb2e8f9f7 390 else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_8B) \
<> 144:ef7eb2e8f9f7 391 { \
<> 144:ef7eb2e8f9f7 392 if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
<> 144:ef7eb2e8f9f7 393 { \
<> 144:ef7eb2e8f9f7 394 (__HANDLE__)->Mask = 0x00FF ; \
<> 144:ef7eb2e8f9f7 395 } \
<> 144:ef7eb2e8f9f7 396 else \
<> 144:ef7eb2e8f9f7 397 { \
<> 144:ef7eb2e8f9f7 398 (__HANDLE__)->Mask = 0x007F ; \
<> 144:ef7eb2e8f9f7 399 } \
<> 144:ef7eb2e8f9f7 400 } \
<> 144:ef7eb2e8f9f7 401 } while(0)
<> 144:ef7eb2e8f9f7 402 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
<> 144:ef7eb2e8f9f7 403 /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
<> 144:ef7eb2e8f9f7 404 /* STM32F334x8 */
<> 144:ef7eb2e8f9f7 405 /**
<> 144:ef7eb2e8f9f7 406 * @brief Ensure that IRDA frame length is valid.
<> 144:ef7eb2e8f9f7 407 * @param __LENGTH__: IRDA frame length.
<> 144:ef7eb2e8f9f7 408 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
<> 144:ef7eb2e8f9f7 409 */
<> 144:ef7eb2e8f9f7 410 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
<> 144:ef7eb2e8f9f7 411 defined(STM32F334x8) || \
<> 144:ef7eb2e8f9f7 412 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
<> 144:ef7eb2e8f9f7 413 #define IS_IRDA_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == IRDA_WORDLENGTH_7B) || \
<> 144:ef7eb2e8f9f7 414 ((__LENGTH__) == IRDA_WORDLENGTH_8B) || \
<> 144:ef7eb2e8f9f7 415 ((__LENGTH__) == IRDA_WORDLENGTH_9B))
<> 144:ef7eb2e8f9f7 416 #else
<> 144:ef7eb2e8f9f7 417 #define IS_IRDA_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == IRDA_WORDLENGTH_8B) || \
<> 144:ef7eb2e8f9f7 418 ((__LENGTH__) == IRDA_WORDLENGTH_9B))
<> 144:ef7eb2e8f9f7 419 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
<> 144:ef7eb2e8f9f7 420 /* STM32F334x8 || */
<> 144:ef7eb2e8f9f7 421 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
<> 144:ef7eb2e8f9f7 422 /**
<> 144:ef7eb2e8f9f7 423 * @}
<> 144:ef7eb2e8f9f7 424 */
<> 144:ef7eb2e8f9f7 425
<> 144:ef7eb2e8f9f7 426 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 427
<> 144:ef7eb2e8f9f7 428 /**
<> 144:ef7eb2e8f9f7 429 * @}
<> 144:ef7eb2e8f9f7 430 */
<> 144:ef7eb2e8f9f7 431
<> 144:ef7eb2e8f9f7 432 /**
<> 144:ef7eb2e8f9f7 433 * @}
<> 144:ef7eb2e8f9f7 434 */
<> 144:ef7eb2e8f9f7 435
<> 144:ef7eb2e8f9f7 436 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 437 }
<> 144:ef7eb2e8f9f7 438 #endif
<> 144:ef7eb2e8f9f7 439
<> 144:ef7eb2e8f9f7 440 #endif /* __STM32F3xx_HAL_IRDA_EX_H */
<> 144:ef7eb2e8f9f7 441
<> 144:ef7eb2e8f9f7 442 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 443