Fawwaz Nadzmy / mbed-STM

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targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_i2c.h@50:a417edff4437, 2016-01-15 (annotated)

Committer:
mbed_official
Date:
Fri Jan 15 07:45:16 2016 +0000
Revision:
50:a417edff4437
Parent:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Synchronized with git revision 6010f32619bfcbb01cc73747d4ff9040863482d9



Full URL: https://github.com/mbedmicro/mbed/commit/6010f32619bfcbb01cc73747d4ff9040863482d9/



Remove doubling of buffer size in realiseEndpoint()

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file em_i2c.h
bogdanm 0:9b334a45a8ff 3 * @brief Inter-intergrated circuit (I2C) peripheral API
mbed_official 50:a417edff4437 4 * @version 4.2.1
bogdanm 0:9b334a45a8ff 5 *******************************************************************************
bogdanm 0:9b334a45a8ff 6 * @section License
mbed_official 50:a417edff4437 7 * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
bogdanm 0:9b334a45a8ff 8 *******************************************************************************
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Permission is granted to anyone to use this software for any purpose,
bogdanm 0:9b334a45a8ff 11 * including commercial applications, and to alter it and redistribute it
bogdanm 0:9b334a45a8ff 12 * freely, subject to the following restrictions:
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * 1. The origin of this software must not be misrepresented; you must not
bogdanm 0:9b334a45a8ff 15 * claim that you wrote the original software.
bogdanm 0:9b334a45a8ff 16 * 2. Altered source versions must be plainly marked as such, and must not be
bogdanm 0:9b334a45a8ff 17 * misrepresented as being the original software.
bogdanm 0:9b334a45a8ff 18 * 3. This notice may not be removed or altered from any source distribution.
bogdanm 0:9b334a45a8ff 19 *
bogdanm 0:9b334a45a8ff 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
bogdanm 0:9b334a45a8ff 21 * obligation to support this Software. Silicon Labs is providing the
bogdanm 0:9b334a45a8ff 22 * Software "AS IS", with no express or implied warranties of any kind,
bogdanm 0:9b334a45a8ff 23 * including, but not limited to, any implied warranties of merchantability
bogdanm 0:9b334a45a8ff 24 * or fitness for any particular purpose or warranties against infringement
bogdanm 0:9b334a45a8ff 25 * of any proprietary rights of a third party.
bogdanm 0:9b334a45a8ff 26 *
bogdanm 0:9b334a45a8ff 27 * Silicon Labs will not be liable for any consequential, incidental, or
bogdanm 0:9b334a45a8ff 28 * special damages, or any other relief, or for any claim by any third party,
bogdanm 0:9b334a45a8ff 29 * arising from your use of this Software.
bogdanm 0:9b334a45a8ff 30 *
bogdanm 0:9b334a45a8ff 31 ******************************************************************************/
bogdanm 0:9b334a45a8ff 32
mbed_official 50:a417edff4437 33 #ifndef __SILICON_LABS_EM_I2C_H__
mbed_official 50:a417edff4437 34 #define __SILICON_LABS_EM_I2C_H__
bogdanm 0:9b334a45a8ff 35
bogdanm 0:9b334a45a8ff 36 #include "em_device.h"
bogdanm 0:9b334a45a8ff 37 #if defined(I2C_COUNT) && (I2C_COUNT > 0)
bogdanm 0:9b334a45a8ff 38
bogdanm 0:9b334a45a8ff 39 #include <stdbool.h>
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 42 extern "C" {
bogdanm 0:9b334a45a8ff 43 #endif
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 46 * @addtogroup EM_Library
bogdanm 0:9b334a45a8ff 47 * @{
bogdanm 0:9b334a45a8ff 48 ******************************************************************************/
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 51 * @addtogroup I2C
bogdanm 0:9b334a45a8ff 52 * @{
bogdanm 0:9b334a45a8ff 53 ******************************************************************************/
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 /*******************************************************************************
bogdanm 0:9b334a45a8ff 56 ******************************* DEFINES ***********************************
bogdanm 0:9b334a45a8ff 57 ******************************************************************************/
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 /**
bogdanm 0:9b334a45a8ff 60 * @brief
bogdanm 0:9b334a45a8ff 61 * Standard mode max frequency assuming using 4:4 ratio for Nlow:Nhigh.
bogdanm 0:9b334a45a8ff 62 * @details
bogdanm 0:9b334a45a8ff 63 * From I2C specification: Min Tlow = 4.7us, min Thigh = 4.0us,
bogdanm 0:9b334a45a8ff 64 * max Trise=1.0us, max Tfall=0.3us. Since ratio is 4:4, have to use
bogdanm 0:9b334a45a8ff 65 * worst case value of Tlow or Thigh as base.
bogdanm 0:9b334a45a8ff 66 *
bogdanm 0:9b334a45a8ff 67 * 1/(Tlow + Thigh + 1us + 0.3us) = 1/(4.7 + 4.7 + 1.3)us = 93458Hz
mbed_official 50:a417edff4437 68 * @note
mbed_official 50:a417edff4437 69 * Due to chip characteristics, the max value is somewhat reduced.
bogdanm 0:9b334a45a8ff 70 */
mbed_official 50:a417edff4437 71 #if defined(_EFM32_GECKO_FAMILY) || defined(_EFM32_TINY_FAMILY) \
mbed_official 50:a417edff4437 72 || defined(_EFM32_ZERO_FAMILY) || defined(_EFM32_HAPPY_FAMILY)
mbed_official 50:a417edff4437 73 #define I2C_FREQ_STANDARD_MAX 93000
mbed_official 50:a417edff4437 74 #elif defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
mbed_official 50:a417edff4437 75 #define I2C_FREQ_STANDARD_MAX 92000
mbed_official 50:a417edff4437 76 #elif defined(_SILICON_LABS_32B_PLATFORM_2)
mbed_official 50:a417edff4437 77 // None of the chips on this platform has been characterized on this parameter.
mbed_official 50:a417edff4437 78 // Use same value as on Wonder until further notice.
mbed_official 50:a417edff4437 79 #define I2C_FREQ_STANDARD_MAX 92000
mbed_official 50:a417edff4437 80 #else
mbed_official 50:a417edff4437 81 #error "Unknown device family."
mbed_official 50:a417edff4437 82 #endif
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 /**
bogdanm 0:9b334a45a8ff 85 * @brief
bogdanm 0:9b334a45a8ff 86 * Fast mode max frequency assuming using 6:3 ratio for Nlow:Nhigh.
bogdanm 0:9b334a45a8ff 87 * @details
bogdanm 0:9b334a45a8ff 88 * From I2C specification: Min Tlow = 1.3us, min Thigh = 0.6us,
bogdanm 0:9b334a45a8ff 89 * max Trise=0.3us, max Tfall=0.3us. Since ratio is 6:3, have to use
bogdanm 0:9b334a45a8ff 90 * worst case value of Tlow or 2xThigh as base.
bogdanm 0:9b334a45a8ff 91 *
bogdanm 0:9b334a45a8ff 92 * 1/(Tlow + Thigh + 0.3us + 0.3us) = 1/(1.3 + 0.65 + 0.6)us = 392157Hz
bogdanm 0:9b334a45a8ff 93 */
mbed_official 50:a417edff4437 94 #define I2C_FREQ_FAST_MAX 392157
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96
bogdanm 0:9b334a45a8ff 97 /**
bogdanm 0:9b334a45a8ff 98 * @brief
bogdanm 0:9b334a45a8ff 99 * Fast mode+ max frequency assuming using 11:6 ratio for Nlow:Nhigh.
bogdanm 0:9b334a45a8ff 100 * @details
bogdanm 0:9b334a45a8ff 101 * From I2C specification: Min Tlow = 0.5us, min Thigh = 0.26us,
mbed_official 50:a417edff4437 102 * max Trise=0.12us, max Tfall=0.12us. Since ratio is 11:6, have to use
bogdanm 0:9b334a45a8ff 103 * worst case value of Tlow or (11/6)xThigh as base.
bogdanm 0:9b334a45a8ff 104 *
bogdanm 0:9b334a45a8ff 105 * 1/(Tlow + Thigh + 0.12us + 0.12us) = 1/(0.5 + 0.273 + 0.24)us = 987167Hz
bogdanm 0:9b334a45a8ff 106 */
mbed_official 50:a417edff4437 107 #define I2C_FREQ_FASTPLUS_MAX 987167
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110 /**
bogdanm 0:9b334a45a8ff 111 * @brief
bogdanm 0:9b334a45a8ff 112 * Indicate plain write sequence: S+ADDR(W)+DATA0+P.
bogdanm 0:9b334a45a8ff 113 * @details
bogdanm 0:9b334a45a8ff 114 * @li S - Start
bogdanm 0:9b334a45a8ff 115 * @li ADDR(W) - address with W/R bit cleared
bogdanm 0:9b334a45a8ff 116 * @li DATA0 - Data taken from buffer with index 0
bogdanm 0:9b334a45a8ff 117 * @li P - Stop
bogdanm 0:9b334a45a8ff 118 */
bogdanm 0:9b334a45a8ff 119 #define I2C_FLAG_WRITE 0x0001
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 /**
bogdanm 0:9b334a45a8ff 122 * @brief
bogdanm 0:9b334a45a8ff 123 * Indicate plain read sequence: S+ADDR(R)+DATA0+P.
bogdanm 0:9b334a45a8ff 124 * @details
bogdanm 0:9b334a45a8ff 125 * @li S - Start
bogdanm 0:9b334a45a8ff 126 * @li ADDR(R) - address with W/R bit set
bogdanm 0:9b334a45a8ff 127 * @li DATA0 - Data read into buffer with index 0
bogdanm 0:9b334a45a8ff 128 * @li P - Stop
bogdanm 0:9b334a45a8ff 129 */
bogdanm 0:9b334a45a8ff 130 #define I2C_FLAG_READ 0x0002
bogdanm 0:9b334a45a8ff 131
bogdanm 0:9b334a45a8ff 132 /**
bogdanm 0:9b334a45a8ff 133 * @brief
bogdanm 0:9b334a45a8ff 134 * Indicate combined write/read sequence: S+ADDR(W)+DATA0+Sr+ADDR(R)+DATA1+P.
bogdanm 0:9b334a45a8ff 135 * @details
bogdanm 0:9b334a45a8ff 136 * @li S - Start
bogdanm 0:9b334a45a8ff 137 * @li Sr - Repeated start
bogdanm 0:9b334a45a8ff 138 * @li ADDR(W) - address with W/R bit cleared
bogdanm 0:9b334a45a8ff 139 * @li ADDR(R) - address with W/R bit set
bogdanm 0:9b334a45a8ff 140 * @li DATAn - Data written from/read into buffer with index n
bogdanm 0:9b334a45a8ff 141 * @li P - Stop
bogdanm 0:9b334a45a8ff 142 */
bogdanm 0:9b334a45a8ff 143 #define I2C_FLAG_WRITE_READ 0x0004
bogdanm 0:9b334a45a8ff 144
bogdanm 0:9b334a45a8ff 145 /**
bogdanm 0:9b334a45a8ff 146 * @brief
bogdanm 0:9b334a45a8ff 147 * Indicate write sequence using two buffers: S+ADDR(W)+DATA0+DATA1+P.
bogdanm 0:9b334a45a8ff 148 * @details
bogdanm 0:9b334a45a8ff 149 * @li S - Start
bogdanm 0:9b334a45a8ff 150 * @li ADDR(W) - address with W/R bit cleared
bogdanm 0:9b334a45a8ff 151 * @li DATAn - Data written from buffer with index n
bogdanm 0:9b334a45a8ff 152 * @li P - Stop
bogdanm 0:9b334a45a8ff 153 */
bogdanm 0:9b334a45a8ff 154 #define I2C_FLAG_WRITE_WRITE 0x0008
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 /** Use 10 bit address. */
bogdanm 0:9b334a45a8ff 157 #define I2C_FLAG_10BIT_ADDR 0x0010
bogdanm 0:9b334a45a8ff 158
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 /*******************************************************************************
bogdanm 0:9b334a45a8ff 161 ******************************** ENUMS ************************************
bogdanm 0:9b334a45a8ff 162 ******************************************************************************/
bogdanm 0:9b334a45a8ff 163
bogdanm 0:9b334a45a8ff 164 /** Clock low to high ratio settings. */
bogdanm 0:9b334a45a8ff 165 typedef enum
bogdanm 0:9b334a45a8ff 166 {
bogdanm 0:9b334a45a8ff 167 i2cClockHLRStandard = _I2C_CTRL_CLHR_STANDARD, /**< Ratio is 4:4 */
bogdanm 0:9b334a45a8ff 168 i2cClockHLRAsymetric = _I2C_CTRL_CLHR_ASYMMETRIC, /**< Ratio is 6:3 */
bogdanm 0:9b334a45a8ff 169 i2cClockHLRFast = _I2C_CTRL_CLHR_FAST /**< Ratio is 11:3 */
bogdanm 0:9b334a45a8ff 170 } I2C_ClockHLR_TypeDef;
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172
bogdanm 0:9b334a45a8ff 173 /** Return codes for single master mode transfer function. */
bogdanm 0:9b334a45a8ff 174 typedef enum
bogdanm 0:9b334a45a8ff 175 {
bogdanm 0:9b334a45a8ff 176 /* In progress code (>0) */
bogdanm 0:9b334a45a8ff 177 i2cTransferInProgress = 1, /**< Transfer in progress. */
bogdanm 0:9b334a45a8ff 178
bogdanm 0:9b334a45a8ff 179 /* Complete code (=0) */
bogdanm 0:9b334a45a8ff 180 i2cTransferDone = 0, /**< Transfer completed successfully. */
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 /* Transfer error codes (<0) */
bogdanm 0:9b334a45a8ff 183 i2cTransferNack = -1, /**< NACK received during transfer. */
bogdanm 0:9b334a45a8ff 184 i2cTransferBusErr = -2, /**< Bus error during transfer (misplaced START/STOP). */
bogdanm 0:9b334a45a8ff 185 i2cTransferArbLost = -3, /**< Arbitration lost during transfer. */
bogdanm 0:9b334a45a8ff 186 i2cTransferUsageFault = -4, /**< Usage fault. */
bogdanm 0:9b334a45a8ff 187 i2cTransferSwFault = -5 /**< SW fault. */
bogdanm 0:9b334a45a8ff 188 } I2C_TransferReturn_TypeDef;
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190
bogdanm 0:9b334a45a8ff 191 /*******************************************************************************
bogdanm 0:9b334a45a8ff 192 ******************************* STRUCTS ***********************************
bogdanm 0:9b334a45a8ff 193 ******************************************************************************/
bogdanm 0:9b334a45a8ff 194
bogdanm 0:9b334a45a8ff 195 /** I2C initialization structure. */
bogdanm 0:9b334a45a8ff 196 typedef struct
bogdanm 0:9b334a45a8ff 197 {
bogdanm 0:9b334a45a8ff 198 /** Enable I2C peripheral when init completed. */
bogdanm 0:9b334a45a8ff 199 bool enable;
bogdanm 0:9b334a45a8ff 200
bogdanm 0:9b334a45a8ff 201 /** Set to master (true) or slave (false) mode */
bogdanm 0:9b334a45a8ff 202 bool master;
bogdanm 0:9b334a45a8ff 203
bogdanm 0:9b334a45a8ff 204 /**
bogdanm 0:9b334a45a8ff 205 * I2C reference clock assumed when configuring bus frequency setup.
bogdanm 0:9b334a45a8ff 206 * Set it to 0 if currently configurated reference clock shall be used
bogdanm 0:9b334a45a8ff 207 * This parameter is only applicable if operating in master mode.
bogdanm 0:9b334a45a8ff 208 */
bogdanm 0:9b334a45a8ff 209 uint32_t refFreq;
bogdanm 0:9b334a45a8ff 210
bogdanm 0:9b334a45a8ff 211 /**
bogdanm 0:9b334a45a8ff 212 * (Max) I2C bus frequency to use. This parameter is only applicable
bogdanm 0:9b334a45a8ff 213 * if operating in master mode.
bogdanm 0:9b334a45a8ff 214 */
bogdanm 0:9b334a45a8ff 215 uint32_t freq;
bogdanm 0:9b334a45a8ff 216
bogdanm 0:9b334a45a8ff 217 /** Clock low/high ratio control. */
bogdanm 0:9b334a45a8ff 218 I2C_ClockHLR_TypeDef clhr;
bogdanm 0:9b334a45a8ff 219 } I2C_Init_TypeDef;
bogdanm 0:9b334a45a8ff 220
bogdanm 0:9b334a45a8ff 221 /** Suggested default config for I2C init structure. */
mbed_official 50:a417edff4437 222 #define I2C_INIT_DEFAULT \
mbed_official 50:a417edff4437 223 { \
mbed_official 50:a417edff4437 224 true, /* Enable when init done */ \
mbed_official 50:a417edff4437 225 true, /* Set to master mode */ \
mbed_official 50:a417edff4437 226 0, /* Use currently configured reference clock */ \
mbed_official 50:a417edff4437 227 I2C_FREQ_STANDARD_MAX, /* Set to standard rate assuring being */ \
mbed_official 50:a417edff4437 228 /* within I2C spec */ \
mbed_official 50:a417edff4437 229 i2cClockHLRStandard /* Set to use 4:4 low/high duty cycle */ \
mbed_official 50:a417edff4437 230 }
bogdanm 0:9b334a45a8ff 231
bogdanm 0:9b334a45a8ff 232
bogdanm 0:9b334a45a8ff 233 /**
bogdanm 0:9b334a45a8ff 234 * @brief
bogdanm 0:9b334a45a8ff 235 * Master mode transfer message structure used to define a complete
bogdanm 0:9b334a45a8ff 236 * I2C transfer sequence (from start to stop).
bogdanm 0:9b334a45a8ff 237 * @details
bogdanm 0:9b334a45a8ff 238 * The structure allows for defining the following types of sequences,
bogdanm 0:9b334a45a8ff 239 * please refer to defines for sequence details.
bogdanm 0:9b334a45a8ff 240 * @li #I2C_FLAG_READ - data read into buf[0].data
bogdanm 0:9b334a45a8ff 241 * @li #I2C_FLAG_WRITE - data written from buf[0].data
bogdanm 0:9b334a45a8ff 242 * @li #I2C_FLAG_WRITE_READ - data written from buf[0].data and read
bogdanm 0:9b334a45a8ff 243 * into buf[1].data
bogdanm 0:9b334a45a8ff 244 * @li #I2C_FLAG_WRITE_WRITE - data written from buf[0].data and
bogdanm 0:9b334a45a8ff 245 * buf[1].data
bogdanm 0:9b334a45a8ff 246 */
bogdanm 0:9b334a45a8ff 247 typedef struct
bogdanm 0:9b334a45a8ff 248 {
bogdanm 0:9b334a45a8ff 249 /**
bogdanm 0:9b334a45a8ff 250 * @brief
bogdanm 0:9b334a45a8ff 251 * Address to use after (repeated) start.
bogdanm 0:9b334a45a8ff 252 * @details
bogdanm 0:9b334a45a8ff 253 * Layout details, A = address bit, X = don't care bit (set to 0):
bogdanm 0:9b334a45a8ff 254 * @li 7 bit address - use format AAAA AAAX.
bogdanm 0:9b334a45a8ff 255 * @li 10 bit address - use format XXXX XAAX AAAA AAAA
bogdanm 0:9b334a45a8ff 256 */
bogdanm 0:9b334a45a8ff 257 uint16_t addr;
bogdanm 0:9b334a45a8ff 258
bogdanm 0:9b334a45a8ff 259 /** Flags defining sequence type and details, see I2C_FLAG_... defines. */
bogdanm 0:9b334a45a8ff 260 uint16_t flags;
bogdanm 0:9b334a45a8ff 261
bogdanm 0:9b334a45a8ff 262 /**
bogdanm 0:9b334a45a8ff 263 * Buffers used to hold data to send from or receive into depending
bogdanm 0:9b334a45a8ff 264 * on sequence type.
bogdanm 0:9b334a45a8ff 265 */
bogdanm 0:9b334a45a8ff 266 struct
bogdanm 0:9b334a45a8ff 267 {
bogdanm 0:9b334a45a8ff 268 /** Buffer used for data to transmit/receive, must be @p len long. */
bogdanm 0:9b334a45a8ff 269 uint8_t *data;
bogdanm 0:9b334a45a8ff 270
bogdanm 0:9b334a45a8ff 271 /**
bogdanm 0:9b334a45a8ff 272 * Number of bytes in @p data to send or receive. Notice that when
bogdanm 0:9b334a45a8ff 273 * receiving data to this buffer, at least 1 byte must be received.
bogdanm 0:9b334a45a8ff 274 * Setting @p len to 0 in the receive case is considered a usage fault.
bogdanm 0:9b334a45a8ff 275 * Transmitting 0 bytes is legal, in which case only the address
bogdanm 0:9b334a45a8ff 276 * is transmitted after the start condition.
bogdanm 0:9b334a45a8ff 277 */
bogdanm 0:9b334a45a8ff 278 uint16_t len;
bogdanm 0:9b334a45a8ff 279 } buf[2];
bogdanm 0:9b334a45a8ff 280 } I2C_TransferSeq_TypeDef;
bogdanm 0:9b334a45a8ff 281
bogdanm 0:9b334a45a8ff 282
bogdanm 0:9b334a45a8ff 283 /*******************************************************************************
bogdanm 0:9b334a45a8ff 284 ***************************** PROTOTYPES **********************************
bogdanm 0:9b334a45a8ff 285 ******************************************************************************/
bogdanm 0:9b334a45a8ff 286
bogdanm 0:9b334a45a8ff 287 uint32_t I2C_BusFreqGet(I2C_TypeDef *i2c);
bogdanm 0:9b334a45a8ff 288 void I2C_BusFreqSet(I2C_TypeDef *i2c,
mbed_official 50:a417edff4437 289 uint32_t freqRef,
mbed_official 50:a417edff4437 290 uint32_t freqScl,
mbed_official 50:a417edff4437 291 I2C_ClockHLR_TypeDef i2cMode);
bogdanm 0:9b334a45a8ff 292 void I2C_Enable(I2C_TypeDef *i2c, bool enable);
bogdanm 0:9b334a45a8ff 293 void I2C_Init(I2C_TypeDef *i2c, const I2C_Init_TypeDef *init);
bogdanm 0:9b334a45a8ff 294
bogdanm 0:9b334a45a8ff 295 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 296 * @brief
bogdanm 0:9b334a45a8ff 297 * Clear one or more pending I2C interrupts.
bogdanm 0:9b334a45a8ff 298 *
bogdanm 0:9b334a45a8ff 299 * @param[in] i2c
bogdanm 0:9b334a45a8ff 300 * Pointer to I2C peripheral register block.
bogdanm 0:9b334a45a8ff 301 *
bogdanm 0:9b334a45a8ff 302 * @param[in] flags
bogdanm 0:9b334a45a8ff 303 * Pending I2C interrupt source to clear. Use a bitwse logic OR combination of
bogdanm 0:9b334a45a8ff 304 * valid interrupt flags for the I2C module (I2C_IF_nnn).
bogdanm 0:9b334a45a8ff 305 ******************************************************************************/
bogdanm 0:9b334a45a8ff 306 __STATIC_INLINE void I2C_IntClear(I2C_TypeDef *i2c, uint32_t flags)
bogdanm 0:9b334a45a8ff 307 {
bogdanm 0:9b334a45a8ff 308 i2c->IFC = flags;
bogdanm 0:9b334a45a8ff 309 }
bogdanm 0:9b334a45a8ff 310
bogdanm 0:9b334a45a8ff 311
bogdanm 0:9b334a45a8ff 312 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 313 * @brief
bogdanm 0:9b334a45a8ff 314 * Disable one or more I2C interrupts.
bogdanm 0:9b334a45a8ff 315 *
bogdanm 0:9b334a45a8ff 316 * @param[in] i2c
bogdanm 0:9b334a45a8ff 317 * Pointer to I2C peripheral register block.
bogdanm 0:9b334a45a8ff 318 *
bogdanm 0:9b334a45a8ff 319 * @param[in] flags
bogdanm 0:9b334a45a8ff 320 * I2C interrupt sources to disable. Use a bitwise logic OR combination of
bogdanm 0:9b334a45a8ff 321 * valid interrupt flags for the I2C module (I2C_IF_nnn).
bogdanm 0:9b334a45a8ff 322 ******************************************************************************/
bogdanm 0:9b334a45a8ff 323 __STATIC_INLINE void I2C_IntDisable(I2C_TypeDef *i2c, uint32_t flags)
bogdanm 0:9b334a45a8ff 324 {
bogdanm 0:9b334a45a8ff 325 i2c->IEN &= ~(flags);
bogdanm 0:9b334a45a8ff 326 }
bogdanm 0:9b334a45a8ff 327
bogdanm 0:9b334a45a8ff 328
bogdanm 0:9b334a45a8ff 329 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 330 * @brief
bogdanm 0:9b334a45a8ff 331 * Enable one or more I2C interrupts.
bogdanm 0:9b334a45a8ff 332 *
bogdanm 0:9b334a45a8ff 333 * @note
bogdanm 0:9b334a45a8ff 334 * Depending on the use, a pending interrupt may already be set prior to
bogdanm 0:9b334a45a8ff 335 * enabling the interrupt. Consider using I2C_IntClear() prior to enabling
bogdanm 0:9b334a45a8ff 336 * if such a pending interrupt should be ignored.
bogdanm 0:9b334a45a8ff 337 *
bogdanm 0:9b334a45a8ff 338 * @param[in] i2c
bogdanm 0:9b334a45a8ff 339 * Pointer to I2C peripheral register block.
bogdanm 0:9b334a45a8ff 340 *
bogdanm 0:9b334a45a8ff 341 * @param[in] flags
bogdanm 0:9b334a45a8ff 342 * I2C interrupt sources to enable. Use a bitwise logic OR combination of
bogdanm 0:9b334a45a8ff 343 * valid interrupt flags for the I2C module (I2C_IF_nnn).
bogdanm 0:9b334a45a8ff 344 ******************************************************************************/
bogdanm 0:9b334a45a8ff 345 __STATIC_INLINE void I2C_IntEnable(I2C_TypeDef *i2c, uint32_t flags)
bogdanm 0:9b334a45a8ff 346 {
bogdanm 0:9b334a45a8ff 347 i2c->IEN |= flags;
bogdanm 0:9b334a45a8ff 348 }
bogdanm 0:9b334a45a8ff 349
bogdanm 0:9b334a45a8ff 350
bogdanm 0:9b334a45a8ff 351 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 352 * @brief
bogdanm 0:9b334a45a8ff 353 * Get pending I2C interrupt flags.
bogdanm 0:9b334a45a8ff 354 *
bogdanm 0:9b334a45a8ff 355 * @note
bogdanm 0:9b334a45a8ff 356 * The event bits are not cleared by the use of this function.
bogdanm 0:9b334a45a8ff 357 *
bogdanm 0:9b334a45a8ff 358 * @param[in] i2c
bogdanm 0:9b334a45a8ff 359 * Pointer to I2C peripheral register block.
bogdanm 0:9b334a45a8ff 360 *
bogdanm 0:9b334a45a8ff 361 * @return
bogdanm 0:9b334a45a8ff 362 * I2C interrupt sources pending. A bitwise logic OR combination of valid
bogdanm 0:9b334a45a8ff 363 * interrupt flags for the I2C module (I2C_IF_nnn).
bogdanm 0:9b334a45a8ff 364 ******************************************************************************/
bogdanm 0:9b334a45a8ff 365 __STATIC_INLINE uint32_t I2C_IntGet(I2C_TypeDef *i2c)
bogdanm 0:9b334a45a8ff 366 {
mbed_official 50:a417edff4437 367 return i2c->IF;
mbed_official 50:a417edff4437 368 }
mbed_official 50:a417edff4437 369
mbed_official 50:a417edff4437 370
mbed_official 50:a417edff4437 371 /***************************************************************************//**
mbed_official 50:a417edff4437 372 * @brief
mbed_official 50:a417edff4437 373 * Get enabled and pending I2C interrupt flags.
mbed_official 50:a417edff4437 374 * Useful for handling more interrupt sources in the same interrupt handler.
mbed_official 50:a417edff4437 375 *
mbed_official 50:a417edff4437 376 * @note
mbed_official 50:a417edff4437 377 * Interrupt flags are not cleared by the use of this function.
mbed_official 50:a417edff4437 378 *
mbed_official 50:a417edff4437 379 * @param[in] i2c
mbed_official 50:a417edff4437 380 * Pointer to I2C peripheral register block.
mbed_official 50:a417edff4437 381 *
mbed_official 50:a417edff4437 382 * @return
mbed_official 50:a417edff4437 383 * Pending and enabled I2C interrupt sources
mbed_official 50:a417edff4437 384 * The return value is the bitwise AND of
mbed_official 50:a417edff4437 385 * - the enabled interrupt sources in I2Cn_IEN and
mbed_official 50:a417edff4437 386 * - the pending interrupt flags I2Cn_IF
mbed_official 50:a417edff4437 387 ******************************************************************************/
mbed_official 50:a417edff4437 388 __STATIC_INLINE uint32_t I2C_IntGetEnabled(I2C_TypeDef *i2c)
mbed_official 50:a417edff4437 389 {
mbed_official 50:a417edff4437 390 uint32_t ien;
mbed_official 50:a417edff4437 391
mbed_official 50:a417edff4437 392 ien = i2c->IEN;
mbed_official 50:a417edff4437 393 return i2c->IF & ien;
bogdanm 0:9b334a45a8ff 394 }
bogdanm 0:9b334a45a8ff 395
bogdanm 0:9b334a45a8ff 396
bogdanm 0:9b334a45a8ff 397 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 398 * @brief
bogdanm 0:9b334a45a8ff 399 * Set one or more pending I2C interrupts from SW.
bogdanm 0:9b334a45a8ff 400 *
bogdanm 0:9b334a45a8ff 401 * @param[in] i2c
bogdanm 0:9b334a45a8ff 402 * Pointer to I2C peripheral register block.
bogdanm 0:9b334a45a8ff 403 *
bogdanm 0:9b334a45a8ff 404 * @param[in] flags
bogdanm 0:9b334a45a8ff 405 * I2C interrupt sources to set to pending. Use a bitwise logic OR combination
bogdanm 0:9b334a45a8ff 406 * of valid interrupt flags for the I2C module (I2C_IF_nnn).
bogdanm 0:9b334a45a8ff 407 ******************************************************************************/
bogdanm 0:9b334a45a8ff 408 __STATIC_INLINE void I2C_IntSet(I2C_TypeDef *i2c, uint32_t flags)
bogdanm 0:9b334a45a8ff 409 {
bogdanm 0:9b334a45a8ff 410 i2c->IFS = flags;
bogdanm 0:9b334a45a8ff 411 }
bogdanm 0:9b334a45a8ff 412
bogdanm 0:9b334a45a8ff 413 void I2C_Reset(I2C_TypeDef *i2c);
bogdanm 0:9b334a45a8ff 414
bogdanm 0:9b334a45a8ff 415 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 416 * @brief
bogdanm 0:9b334a45a8ff 417 * Get slave address used for I2C peripheral (when operating in slave mode).
bogdanm 0:9b334a45a8ff 418 *
bogdanm 0:9b334a45a8ff 419 * @details
bogdanm 0:9b334a45a8ff 420 * For 10 bit addressing mode, the address is split in two bytes, and only
bogdanm 0:9b334a45a8ff 421 * the first byte setting is fetched, effectively only controlling the 2 most
bogdanm 0:9b334a45a8ff 422 * significant bits of the 10 bit address. Full handling of 10 bit addressing
bogdanm 0:9b334a45a8ff 423 * in slave mode requires additional SW handling.
bogdanm 0:9b334a45a8ff 424 *
bogdanm 0:9b334a45a8ff 425 * @param[in] i2c
bogdanm 0:9b334a45a8ff 426 * Pointer to I2C peripheral register block.
bogdanm 0:9b334a45a8ff 427 *
bogdanm 0:9b334a45a8ff 428 * @return
bogdanm 0:9b334a45a8ff 429 * I2C slave address in use. The 7 most significant bits define the actual
bogdanm 0:9b334a45a8ff 430 * address, the least significant bit is reserved and always returned as 0.
bogdanm 0:9b334a45a8ff 431 ******************************************************************************/
bogdanm 0:9b334a45a8ff 432 __STATIC_INLINE uint8_t I2C_SlaveAddressGet(I2C_TypeDef *i2c)
bogdanm 0:9b334a45a8ff 433 {
mbed_official 50:a417edff4437 434 return ((uint8_t)(i2c->SADDR));
bogdanm 0:9b334a45a8ff 435 }
bogdanm 0:9b334a45a8ff 436
bogdanm 0:9b334a45a8ff 437
bogdanm 0:9b334a45a8ff 438 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 439 * @brief
bogdanm 0:9b334a45a8ff 440 * Set slave address to use for I2C peripheral (when operating in slave mode).
bogdanm 0:9b334a45a8ff 441 *
bogdanm 0:9b334a45a8ff 442 * @details
bogdanm 0:9b334a45a8ff 443 * For 10 bit addressing mode, the address is split in two bytes, and only
bogdanm 0:9b334a45a8ff 444 * the first byte is set, effectively only controlling the 2 most significant
bogdanm 0:9b334a45a8ff 445 * bits of the 10 bit address. Full handling of 10 bit addressing in slave
bogdanm 0:9b334a45a8ff 446 * mode requires additional SW handling.
bogdanm 0:9b334a45a8ff 447 *
bogdanm 0:9b334a45a8ff 448 * @param[in] i2c
bogdanm 0:9b334a45a8ff 449 * Pointer to I2C peripheral register block.
bogdanm 0:9b334a45a8ff 450 *
bogdanm 0:9b334a45a8ff 451 * @param[in] addr
bogdanm 0:9b334a45a8ff 452 * I2C slave address to use. The 7 most significant bits define the actual
bogdanm 0:9b334a45a8ff 453 * address, the least significant bit is reserved and always set to 0.
bogdanm 0:9b334a45a8ff 454 ******************************************************************************/
bogdanm 0:9b334a45a8ff 455 __STATIC_INLINE void I2C_SlaveAddressSet(I2C_TypeDef *i2c, uint8_t addr)
bogdanm 0:9b334a45a8ff 456 {
bogdanm 0:9b334a45a8ff 457 i2c->SADDR = (uint32_t)addr & 0xfe;
bogdanm 0:9b334a45a8ff 458 }
bogdanm 0:9b334a45a8ff 459
bogdanm 0:9b334a45a8ff 460
bogdanm 0:9b334a45a8ff 461 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 462 * @brief
bogdanm 0:9b334a45a8ff 463 * Get slave address mask used for I2C peripheral (when operating in slave
bogdanm 0:9b334a45a8ff 464 * mode).
bogdanm 0:9b334a45a8ff 465 *
bogdanm 0:9b334a45a8ff 466 * @details
bogdanm 0:9b334a45a8ff 467 * The address mask defines how the comparator works. A bit position with
bogdanm 0:9b334a45a8ff 468 * value 0 means that the corresponding slave address bit is ignored during
bogdanm 0:9b334a45a8ff 469 * comparison (don't care). A bit position with value 1 means that the
bogdanm 0:9b334a45a8ff 470 * corresponding slave address bit must match.
bogdanm 0:9b334a45a8ff 471 *
bogdanm 0:9b334a45a8ff 472 * For 10 bit addressing mode, the address is split in two bytes, and only
bogdanm 0:9b334a45a8ff 473 * the mask for the first address byte is fetched, effectively only
bogdanm 0:9b334a45a8ff 474 * controlling the 2 most significant bits of the 10 bit address.
bogdanm 0:9b334a45a8ff 475 *
bogdanm 0:9b334a45a8ff 476 * @param[in] i2c
bogdanm 0:9b334a45a8ff 477 * Pointer to I2C peripheral register block.
bogdanm 0:9b334a45a8ff 478 *
bogdanm 0:9b334a45a8ff 479 * @return
bogdanm 0:9b334a45a8ff 480 * I2C slave address mask in use. The 7 most significant bits define the
bogdanm 0:9b334a45a8ff 481 * actual address mask, the least significant bit is reserved and always
bogdanm 0:9b334a45a8ff 482 * returned as 0.
bogdanm 0:9b334a45a8ff 483 ******************************************************************************/
bogdanm 0:9b334a45a8ff 484 __STATIC_INLINE uint8_t I2C_SlaveAddressMaskGet(I2C_TypeDef *i2c)
bogdanm 0:9b334a45a8ff 485 {
mbed_official 50:a417edff4437 486 return ((uint8_t)(i2c->SADDRMASK));
bogdanm 0:9b334a45a8ff 487 }
bogdanm 0:9b334a45a8ff 488
bogdanm 0:9b334a45a8ff 489
bogdanm 0:9b334a45a8ff 490 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 491 * @brief
bogdanm 0:9b334a45a8ff 492 * Set slave address mask used for I2C peripheral (when operating in slave
bogdanm 0:9b334a45a8ff 493 * mode).
bogdanm 0:9b334a45a8ff 494 *
bogdanm 0:9b334a45a8ff 495 * @details
bogdanm 0:9b334a45a8ff 496 * The address mask defines how the comparator works. A bit position with
bogdanm 0:9b334a45a8ff 497 * value 0 means that the corresponding slave address bit is ignored during
bogdanm 0:9b334a45a8ff 498 * comparison (don't care). A bit position with value 1 means that the
bogdanm 0:9b334a45a8ff 499 * corresponding slave address bit must match.
bogdanm 0:9b334a45a8ff 500 *
bogdanm 0:9b334a45a8ff 501 * For 10 bit addressing mode, the address is split in two bytes, and only
bogdanm 0:9b334a45a8ff 502 * the mask for the first address byte is set, effectively only controlling
bogdanm 0:9b334a45a8ff 503 * the 2 most significant bits of the 10 bit address.
bogdanm 0:9b334a45a8ff 504 *
bogdanm 0:9b334a45a8ff 505 * @param[in] i2c
bogdanm 0:9b334a45a8ff 506 * Pointer to I2C peripheral register block.
bogdanm 0:9b334a45a8ff 507 *
bogdanm 0:9b334a45a8ff 508 * @param[in] mask
bogdanm 0:9b334a45a8ff 509 * I2C slave address mask to use. The 7 most significant bits define the
bogdanm 0:9b334a45a8ff 510 * actual address mask, the least significant bit is reserved and should
bogdanm 0:9b334a45a8ff 511 * be 0.
bogdanm 0:9b334a45a8ff 512 ******************************************************************************/
bogdanm 0:9b334a45a8ff 513 __STATIC_INLINE void I2C_SlaveAddressMaskSet(I2C_TypeDef *i2c, uint8_t mask)
bogdanm 0:9b334a45a8ff 514 {
bogdanm 0:9b334a45a8ff 515 i2c->SADDRMASK = (uint32_t)mask & 0xfe;
bogdanm 0:9b334a45a8ff 516 }
bogdanm 0:9b334a45a8ff 517
bogdanm 0:9b334a45a8ff 518
bogdanm 0:9b334a45a8ff 519 I2C_TransferReturn_TypeDef I2C_Transfer(I2C_TypeDef *i2c);
bogdanm 0:9b334a45a8ff 520 I2C_TransferReturn_TypeDef I2C_TransferInit(I2C_TypeDef *i2c,
bogdanm 0:9b334a45a8ff 521 I2C_TransferSeq_TypeDef *seq);
bogdanm 0:9b334a45a8ff 522
bogdanm 0:9b334a45a8ff 523 /** @} (end addtogroup I2C) */
bogdanm 0:9b334a45a8ff 524 /** @} (end addtogroup EM_Library) */
bogdanm 0:9b334a45a8ff 525
bogdanm 0:9b334a45a8ff 526 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 527 }
bogdanm 0:9b334a45a8ff 528 #endif
bogdanm 0:9b334a45a8ff 529
bogdanm 0:9b334a45a8ff 530 #endif /* defined(I2C_COUNT) && (I2C_COUNT > 0) */
mbed_official 50:a417edff4437 531 #endif /* __SILICON_LABS_EM_I2C_H__ */