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targets/hal/TARGET_NXP/TARGET_LPC15XX/spi_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include <math.h>
bogdanm 0:9b334a45a8ff 18
bogdanm 0:9b334a45a8ff 19 #include "spi_api.h"
bogdanm 0:9b334a45a8ff 20 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 21 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 22 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 static const SWM_Map SWM_SPI_SSEL[] = {
bogdanm 0:9b334a45a8ff 25 {4, 0},
bogdanm 0:9b334a45a8ff 26 {5, 24},
bogdanm 0:9b334a45a8ff 27 };
bogdanm 0:9b334a45a8ff 28
bogdanm 0:9b334a45a8ff 29 static const SWM_Map SWM_SPI_SCLK[] = {
bogdanm 0:9b334a45a8ff 30 {3, 8},
bogdanm 0:9b334a45a8ff 31 {5, 0},
bogdanm 0:9b334a45a8ff 32 };
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 static const SWM_Map SWM_SPI_MOSI[] = {
bogdanm 0:9b334a45a8ff 35 {3, 16},
bogdanm 0:9b334a45a8ff 36 {5, 8},
bogdanm 0:9b334a45a8ff 37 };
bogdanm 0:9b334a45a8ff 38
bogdanm 0:9b334a45a8ff 39 static const SWM_Map SWM_SPI_MISO[] = {
bogdanm 0:9b334a45a8ff 40 {3, 24},
bogdanm 0:9b334a45a8ff 41 {5, 16},
bogdanm 0:9b334a45a8ff 42 };
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 // bit flags for used SPIs
bogdanm 0:9b334a45a8ff 45 static unsigned char spi_used = 0;
bogdanm 0:9b334a45a8ff 46 static int get_available_spi(PinName mosi, PinName miso, PinName sclk, PinName ssel)
bogdanm 0:9b334a45a8ff 47 {
bogdanm 0:9b334a45a8ff 48 if (spi_used == 0) {
bogdanm 0:9b334a45a8ff 49 return 0; // The first user
bogdanm 0:9b334a45a8ff 50 }
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52 const SWM_Map *swm;
bogdanm 0:9b334a45a8ff 53 uint32_t regVal;
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 // Investigate if same pins as the used SPI0/1 - to be able to reuse it
bogdanm 0:9b334a45a8ff 56 for (int spi_n = 0; spi_n < 2; spi_n++) {
bogdanm 0:9b334a45a8ff 57 if (spi_used & (1<<spi_n)) {
bogdanm 0:9b334a45a8ff 58 if (sclk != NC) {
bogdanm 0:9b334a45a8ff 59 swm = &SWM_SPI_SCLK[spi_n];
bogdanm 0:9b334a45a8ff 60 regVal = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
bogdanm 0:9b334a45a8ff 61 if (regVal != (sclk << swm->offset)) {
bogdanm 0:9b334a45a8ff 62 // Existing pin is not the same as the one we want
bogdanm 0:9b334a45a8ff 63 continue;
bogdanm 0:9b334a45a8ff 64 }
bogdanm 0:9b334a45a8ff 65 }
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 if (mosi != NC) {
bogdanm 0:9b334a45a8ff 68 swm = &SWM_SPI_MOSI[spi_n];
bogdanm 0:9b334a45a8ff 69 regVal = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
bogdanm 0:9b334a45a8ff 70 if (regVal != (mosi << swm->offset)) {
bogdanm 0:9b334a45a8ff 71 // Existing pin is not the same as the one we want
bogdanm 0:9b334a45a8ff 72 continue;
bogdanm 0:9b334a45a8ff 73 }
bogdanm 0:9b334a45a8ff 74 }
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 if (miso != NC) {
bogdanm 0:9b334a45a8ff 77 swm = &SWM_SPI_MISO[spi_n];
bogdanm 0:9b334a45a8ff 78 regVal = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
bogdanm 0:9b334a45a8ff 79 if (regVal != (miso << swm->offset)) {
bogdanm 0:9b334a45a8ff 80 // Existing pin is not the same as the one we want
bogdanm 0:9b334a45a8ff 81 continue;
bogdanm 0:9b334a45a8ff 82 }
bogdanm 0:9b334a45a8ff 83 }
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 if (ssel != NC) {
bogdanm 0:9b334a45a8ff 86 swm = &SWM_SPI_SSEL[spi_n];
bogdanm 0:9b334a45a8ff 87 regVal = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
bogdanm 0:9b334a45a8ff 88 if (regVal != (ssel << swm->offset)) {
bogdanm 0:9b334a45a8ff 89 // Existing pin is not the same as the one we want
bogdanm 0:9b334a45a8ff 90 continue;
bogdanm 0:9b334a45a8ff 91 }
bogdanm 0:9b334a45a8ff 92 }
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 // The pins for the currently used SPIx are the same as the
bogdanm 0:9b334a45a8ff 95 // ones we want so we will reuse it
bogdanm 0:9b334a45a8ff 96 return spi_n;
bogdanm 0:9b334a45a8ff 97 }
bogdanm 0:9b334a45a8ff 98 }
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 // None of the existing SPIx pin setups match the pins we want
bogdanm 0:9b334a45a8ff 101 // so the last hope is to select one unused SPIx
bogdanm 0:9b334a45a8ff 102 if ((spi_used & 1) == 0) {
bogdanm 0:9b334a45a8ff 103 return 0;
bogdanm 0:9b334a45a8ff 104 } else if ((spi_used & 2) == 0) {
bogdanm 0:9b334a45a8ff 105 return 1;
bogdanm 0:9b334a45a8ff 106 }
bogdanm 0:9b334a45a8ff 107
bogdanm 0:9b334a45a8ff 108 // No matching setup and no free SPIx
bogdanm 0:9b334a45a8ff 109 return -1;
bogdanm 0:9b334a45a8ff 110 }
bogdanm 0:9b334a45a8ff 111
bogdanm 0:9b334a45a8ff 112 static inline void spi_disable(spi_t *obj);
bogdanm 0:9b334a45a8ff 113 static inline void spi_enable(spi_t *obj);
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
bogdanm 0:9b334a45a8ff 116 {
bogdanm 0:9b334a45a8ff 117 int spi_n = get_available_spi(mosi, miso, sclk, ssel);
bogdanm 0:9b334a45a8ff 118 if (spi_n == -1) {
bogdanm 0:9b334a45a8ff 119 error("No available SPI");
bogdanm 0:9b334a45a8ff 120 }
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 obj->spi_n = spi_n;
bogdanm 0:9b334a45a8ff 123 spi_used |= (1 << spi_n);
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 obj->spi = (spi_n) ? (LPC_SPI0_Type *)(LPC_SPI1_BASE) : (LPC_SPI0_Type *)(LPC_SPI0_BASE);
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 const SWM_Map *swm;
bogdanm 0:9b334a45a8ff 128 uint32_t regVal;
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 if (sclk != NC) {
bogdanm 0:9b334a45a8ff 131 swm = &SWM_SPI_SCLK[obj->spi_n];
bogdanm 0:9b334a45a8ff 132 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
bogdanm 0:9b334a45a8ff 133 LPC_SWM->PINASSIGN[swm->n] = regVal | (sclk << swm->offset);
bogdanm 0:9b334a45a8ff 134 }
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 if (mosi != NC) {
bogdanm 0:9b334a45a8ff 137 swm = &SWM_SPI_MOSI[obj->spi_n];
bogdanm 0:9b334a45a8ff 138 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
bogdanm 0:9b334a45a8ff 139 LPC_SWM->PINASSIGN[swm->n] = regVal | (mosi << swm->offset);
bogdanm 0:9b334a45a8ff 140 }
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 if (miso != NC) {
bogdanm 0:9b334a45a8ff 143 swm = &SWM_SPI_MISO[obj->spi_n];
bogdanm 0:9b334a45a8ff 144 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
bogdanm 0:9b334a45a8ff 145 LPC_SWM->PINASSIGN[swm->n] = regVal | (miso << swm->offset);
bogdanm 0:9b334a45a8ff 146 }
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 if (ssel != NC) {
bogdanm 0:9b334a45a8ff 149 swm = &SWM_SPI_SSEL[obj->spi_n];
bogdanm 0:9b334a45a8ff 150 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
bogdanm 0:9b334a45a8ff 151 LPC_SWM->PINASSIGN[swm->n] = regVal | (ssel << swm->offset);
bogdanm 0:9b334a45a8ff 152 }
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 // clear interrupts
bogdanm 0:9b334a45a8ff 155 obj->spi->INTENCLR = 0x3f;
bogdanm 0:9b334a45a8ff 156
bogdanm 0:9b334a45a8ff 157 // enable power and clocking
bogdanm 0:9b334a45a8ff 158 LPC_SYSCON->SYSAHBCLKCTRL1 |= (0x1 << (obj->spi_n + 9));
bogdanm 0:9b334a45a8ff 159 LPC_SYSCON->PRESETCTRL1 |= (0x1 << (obj->spi_n + 9));
bogdanm 0:9b334a45a8ff 160 LPC_SYSCON->PRESETCTRL1 &= ~(0x1 << (obj->spi_n + 9));
bogdanm 0:9b334a45a8ff 161 }
bogdanm 0:9b334a45a8ff 162
bogdanm 0:9b334a45a8ff 163 void spi_free(spi_t *obj)
bogdanm 0:9b334a45a8ff 164 {
bogdanm 0:9b334a45a8ff 165 }
bogdanm 0:9b334a45a8ff 166
bogdanm 0:9b334a45a8ff 167 void spi_format(spi_t *obj, int bits, int mode, int slave)
bogdanm 0:9b334a45a8ff 168 {
bogdanm 0:9b334a45a8ff 169 spi_disable(obj);
bogdanm 0:9b334a45a8ff 170 MBED_ASSERT((bits >= 1 && bits <= 16) && (mode >= 0 && mode <= 3));
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172 int polarity = (mode & 0x2) ? 1 : 0;
bogdanm 0:9b334a45a8ff 173 int phase = (mode & 0x1) ? 1 : 0;
bogdanm 0:9b334a45a8ff 174
bogdanm 0:9b334a45a8ff 175 // set it up
bogdanm 0:9b334a45a8ff 176 int LEN = bits - 1; // LEN - Data Length
bogdanm 0:9b334a45a8ff 177 int CPOL = (polarity) ? 1 : 0; // CPOL - Clock Polarity select
bogdanm 0:9b334a45a8ff 178 int CPHA = (phase) ? 1 : 0; // CPHA - Clock Phase select
bogdanm 0:9b334a45a8ff 179
bogdanm 0:9b334a45a8ff 180 uint32_t tmp = obj->spi->CFG;
bogdanm 0:9b334a45a8ff 181 tmp &= ~((1 << 5) | (1 << 4) | (1 << 2));
bogdanm 0:9b334a45a8ff 182 tmp |= (CPOL << 5) | (CPHA << 4) | ((slave ? 0 : 1) << 2);
bogdanm 0:9b334a45a8ff 183 obj->spi->CFG = tmp;
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 // select frame length
bogdanm 0:9b334a45a8ff 186 tmp = obj->spi->TXCTL;
bogdanm 0:9b334a45a8ff 187 tmp &= ~(0xf << 24);
bogdanm 0:9b334a45a8ff 188 tmp |= (LEN << 24);
bogdanm 0:9b334a45a8ff 189 obj->spi->TXCTL = tmp;
bogdanm 0:9b334a45a8ff 190
bogdanm 0:9b334a45a8ff 191 spi_enable(obj);
bogdanm 0:9b334a45a8ff 192 }
bogdanm 0:9b334a45a8ff 193
bogdanm 0:9b334a45a8ff 194 void spi_frequency(spi_t *obj, int hz)
bogdanm 0:9b334a45a8ff 195 {
bogdanm 0:9b334a45a8ff 196 spi_disable(obj);
bogdanm 0:9b334a45a8ff 197
bogdanm 0:9b334a45a8ff 198 // rise DIV value if it cannot be divided
bogdanm 0:9b334a45a8ff 199 obj->spi->DIV = (SystemCoreClock + (hz - 1))/hz - 1;
bogdanm 0:9b334a45a8ff 200 obj->spi->DLY = 0;
bogdanm 0:9b334a45a8ff 201
bogdanm 0:9b334a45a8ff 202 spi_enable(obj);
bogdanm 0:9b334a45a8ff 203 }
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205 static inline void spi_disable(spi_t *obj)
bogdanm 0:9b334a45a8ff 206 {
bogdanm 0:9b334a45a8ff 207 obj->spi->CFG &= ~(1 << 0);
bogdanm 0:9b334a45a8ff 208 }
bogdanm 0:9b334a45a8ff 209
bogdanm 0:9b334a45a8ff 210 static inline void spi_enable(spi_t *obj)
bogdanm 0:9b334a45a8ff 211 {
bogdanm 0:9b334a45a8ff 212 obj->spi->CFG |= (1 << 0);
bogdanm 0:9b334a45a8ff 213 }
bogdanm 0:9b334a45a8ff 214
bogdanm 0:9b334a45a8ff 215 static inline int spi_readable(spi_t *obj)
bogdanm 0:9b334a45a8ff 216 {
bogdanm 0:9b334a45a8ff 217 return obj->spi->STAT & (1 << 0);
bogdanm 0:9b334a45a8ff 218 }
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 static inline int spi_writeable(spi_t *obj)
bogdanm 0:9b334a45a8ff 221 {
bogdanm 0:9b334a45a8ff 222 return obj->spi->STAT & (1 << 1);
bogdanm 0:9b334a45a8ff 223 }
bogdanm 0:9b334a45a8ff 224
bogdanm 0:9b334a45a8ff 225 static inline void spi_write(spi_t *obj, int value)
bogdanm 0:9b334a45a8ff 226 {
bogdanm 0:9b334a45a8ff 227 while (!spi_writeable(obj));
bogdanm 0:9b334a45a8ff 228 // end of transfer
bogdanm 0:9b334a45a8ff 229 obj->spi->TXCTL |= (1 << 20);
bogdanm 0:9b334a45a8ff 230 obj->spi->TXDAT = (value & 0xffff);
bogdanm 0:9b334a45a8ff 231 }
bogdanm 0:9b334a45a8ff 232
bogdanm 0:9b334a45a8ff 233 static inline int spi_read(spi_t *obj)
bogdanm 0:9b334a45a8ff 234 {
bogdanm 0:9b334a45a8ff 235 while (!spi_readable(obj));
bogdanm 0:9b334a45a8ff 236 return obj->spi->RXDAT & 0xffff; // Only the lower 16 bits contain data
bogdanm 0:9b334a45a8ff 237 }
bogdanm 0:9b334a45a8ff 238
bogdanm 0:9b334a45a8ff 239 int spi_busy(spi_t *obj)
bogdanm 0:9b334a45a8ff 240 {
bogdanm 0:9b334a45a8ff 241 // checking RXOV(Receiver Overrun interrupt flag)
bogdanm 0:9b334a45a8ff 242 return obj->spi->STAT & (1 << 2);
bogdanm 0:9b334a45a8ff 243 }
bogdanm 0:9b334a45a8ff 244
bogdanm 0:9b334a45a8ff 245 int spi_master_write(spi_t *obj, int value)
bogdanm 0:9b334a45a8ff 246 {
bogdanm 0:9b334a45a8ff 247 spi_write(obj, value);
bogdanm 0:9b334a45a8ff 248 return spi_read(obj);
bogdanm 0:9b334a45a8ff 249 }
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 int spi_slave_receive(spi_t *obj)
bogdanm 0:9b334a45a8ff 252 {
bogdanm 0:9b334a45a8ff 253 return (spi_readable(obj) && !spi_busy(obj)) ? (1) : (0);
bogdanm 0:9b334a45a8ff 254 }
bogdanm 0:9b334a45a8ff 255
bogdanm 0:9b334a45a8ff 256 int spi_slave_read(spi_t *obj)
bogdanm 0:9b334a45a8ff 257 {
bogdanm 0:9b334a45a8ff 258 return obj->spi->RXDAT & 0xffff; // Only the lower 16 bits contain data
bogdanm 0:9b334a45a8ff 259 }
bogdanm 0:9b334a45a8ff 260
bogdanm 0:9b334a45a8ff 261 void spi_slave_write(spi_t *obj, int value)
bogdanm 0:9b334a45a8ff 262 {
bogdanm 0:9b334a45a8ff 263 while (spi_writeable(obj) == 0) ;
bogdanm 0:9b334a45a8ff 264 obj->spi->TXDAT = value;
bogdanm 0:9b334a45a8ff 265 }