Fawwaz Nadzmy / mbed-STM

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by mbed official

targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_irq_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /*******************************************************************************
bogdanm 0:9b334a45a8ff 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Permission is hereby granted, free of charge, to any person obtaining a
bogdanm 0:9b334a45a8ff 5 * copy of this software and associated documentation files (the "Software"),
bogdanm 0:9b334a45a8ff 6 * to deal in the Software without restriction, including without limitation
bogdanm 0:9b334a45a8ff 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
bogdanm 0:9b334a45a8ff 8 * and/or sell copies of the Software, and to permit persons to whom the
bogdanm 0:9b334a45a8ff 9 * Software is furnished to do so, subject to the following conditions:
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * The above copyright notice and this permission notice shall be included
bogdanm 0:9b334a45a8ff 12 * in all copies or substantial portions of the Software.
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
bogdanm 0:9b334a45a8ff 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
bogdanm 0:9b334a45a8ff 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
bogdanm 0:9b334a45a8ff 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
bogdanm 0:9b334a45a8ff 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
bogdanm 0:9b334a45a8ff 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
bogdanm 0:9b334a45a8ff 20 * OTHER DEALINGS IN THE SOFTWARE.
bogdanm 0:9b334a45a8ff 21 *
bogdanm 0:9b334a45a8ff 22 * Except as contained in this notice, the name of Maxim Integrated
bogdanm 0:9b334a45a8ff 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
bogdanm 0:9b334a45a8ff 24 * Products, Inc. Branding Policy.
bogdanm 0:9b334a45a8ff 25 *
bogdanm 0:9b334a45a8ff 26 * The mere transfer of this software does not imply any licenses
bogdanm 0:9b334a45a8ff 27 * of trade secrets, proprietary technology, copyrights, patents,
bogdanm 0:9b334a45a8ff 28 * trademarks, maskwork rights, or any other form of intellectual
bogdanm 0:9b334a45a8ff 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
bogdanm 0:9b334a45a8ff 30 * ownership rights.
bogdanm 0:9b334a45a8ff 31 *******************************************************************************
bogdanm 0:9b334a45a8ff 32 */
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 #include <stddef.h>
bogdanm 0:9b334a45a8ff 35 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 36 #include "gpio_irq_api.h"
bogdanm 0:9b334a45a8ff 37 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 38
bogdanm 0:9b334a45a8ff 39 #define NUM_PORTS 8
bogdanm 0:9b334a45a8ff 40 #define NUM_PINS_PER_PORT 8
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 static uint32_t ids[NUM_PORTS][NUM_PINS_PER_PORT] = {{0}};
bogdanm 0:9b334a45a8ff 43 static gpio_irq_handler irq_handler;
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 static void handle_irq(unsigned int port)
bogdanm 0:9b334a45a8ff 46 {
bogdanm 0:9b334a45a8ff 47 uint32_t intfl, in_val;
bogdanm 0:9b334a45a8ff 48 uint32_t mask;
bogdanm 0:9b334a45a8ff 49 unsigned int pin;
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 /* Read pin state */
bogdanm 0:9b334a45a8ff 52 in_val = MXC_GPIO->in_val[port];
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 /* Read interrupts */
bogdanm 0:9b334a45a8ff 55 intfl = MXC_GPIO->intfl[port] & MXC_GPIO->inten[port];
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 mask = 1;
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 for (pin = 0; pin < NUM_PINS_PER_PORT; pin++) {
bogdanm 0:9b334a45a8ff 60 if (intfl & mask) {
bogdanm 0:9b334a45a8ff 61 if (ids[port][pin]) {
bogdanm 0:9b334a45a8ff 62 if (in_val & mask) {
bogdanm 0:9b334a45a8ff 63 irq_handler(ids[port][pin], IRQ_RISE);
bogdanm 0:9b334a45a8ff 64 } else {
bogdanm 0:9b334a45a8ff 65 irq_handler(ids[port][pin], IRQ_FALL);
bogdanm 0:9b334a45a8ff 66 }
bogdanm 0:9b334a45a8ff 67 }
bogdanm 0:9b334a45a8ff 68 MXC_GPIO->intfl[port] = mask; /* clear interrupt */
bogdanm 0:9b334a45a8ff 69 }
bogdanm 0:9b334a45a8ff 70 mask <<= 1;
bogdanm 0:9b334a45a8ff 71 }
bogdanm 0:9b334a45a8ff 72 }
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 void gpio_irq_0(void) { handle_irq(0); }
bogdanm 0:9b334a45a8ff 75 void gpio_irq_1(void) { handle_irq(1); }
bogdanm 0:9b334a45a8ff 76 void gpio_irq_2(void) { handle_irq(2); }
bogdanm 0:9b334a45a8ff 77 void gpio_irq_3(void) { handle_irq(3); }
bogdanm 0:9b334a45a8ff 78 void gpio_irq_4(void) { handle_irq(4); }
bogdanm 0:9b334a45a8ff 79 void gpio_irq_5(void) { handle_irq(5); }
bogdanm 0:9b334a45a8ff 80 void gpio_irq_6(void) { handle_irq(6); }
bogdanm 0:9b334a45a8ff 81 void gpio_irq_7(void) { handle_irq(7); }
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 int gpio_irq_init(gpio_irq_t *obj, PinName name, gpio_irq_handler handler, uint32_t id)
bogdanm 0:9b334a45a8ff 84 {
bogdanm 0:9b334a45a8ff 85 if (name == NC)
bogdanm 0:9b334a45a8ff 86 return -1;
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 uint8_t port = PINNAME_TO_PORT(name);
bogdanm 0:9b334a45a8ff 89 uint8_t pin = PINNAME_TO_PIN(name);
bogdanm 0:9b334a45a8ff 90
bogdanm 0:9b334a45a8ff 91 if ((port > NUM_PORTS) || (pin > NUM_PINS_PER_PORT)) {
bogdanm 0:9b334a45a8ff 92 return 1;
bogdanm 0:9b334a45a8ff 93 }
bogdanm 0:9b334a45a8ff 94
bogdanm 0:9b334a45a8ff 95 obj->port = port;
bogdanm 0:9b334a45a8ff 96 obj->pin = pin;
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 irq_handler = handler;
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 ids[port][pin] = id;
bogdanm 0:9b334a45a8ff 101
bogdanm 0:9b334a45a8ff 102 /* register handlers */
bogdanm 0:9b334a45a8ff 103 NVIC_SetVector(GPIO_P0_IRQn, (uint32_t)gpio_irq_0);
bogdanm 0:9b334a45a8ff 104 NVIC_SetVector(GPIO_P1_IRQn, (uint32_t)gpio_irq_1);
bogdanm 0:9b334a45a8ff 105 NVIC_SetVector(GPIO_P2_IRQn, (uint32_t)gpio_irq_2);
bogdanm 0:9b334a45a8ff 106 NVIC_SetVector(GPIO_P3_IRQn, (uint32_t)gpio_irq_3);
bogdanm 0:9b334a45a8ff 107 NVIC_SetVector(GPIO_P4_IRQn, (uint32_t)gpio_irq_4);
bogdanm 0:9b334a45a8ff 108 NVIC_SetVector(GPIO_P5_IRQn, (uint32_t)gpio_irq_5);
bogdanm 0:9b334a45a8ff 109 NVIC_SetVector(GPIO_P6_IRQn, (uint32_t)gpio_irq_6);
bogdanm 0:9b334a45a8ff 110 NVIC_SetVector(GPIO_P7_IRQn, (uint32_t)gpio_irq_7);
bogdanm 0:9b334a45a8ff 111
bogdanm 0:9b334a45a8ff 112 /* disable the interrupt locally */
bogdanm 0:9b334a45a8ff 113 MXC_GPIO->int_mode[port] &= ~(0xF << (pin*4));
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 /* clear a pending request */
bogdanm 0:9b334a45a8ff 116 MXC_GPIO->intfl[port] = 1 << pin;
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 /* enable the requested interrupt */
bogdanm 0:9b334a45a8ff 119 MXC_GPIO->inten[port] |= (1 << pin);
bogdanm 0:9b334a45a8ff 120 NVIC_EnableIRQ((IRQn_Type)((uint32_t)GPIO_P0_IRQn + port));
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 return 0;
bogdanm 0:9b334a45a8ff 123 }
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 void gpio_irq_free(gpio_irq_t *obj)
bogdanm 0:9b334a45a8ff 126 {
bogdanm 0:9b334a45a8ff 127 /* disable interrupt */
bogdanm 0:9b334a45a8ff 128 MXC_GPIO->inten[obj->port] &= ~(1 << obj->pin);
bogdanm 0:9b334a45a8ff 129 MXC_GPIO->int_mode[obj->port] &= ~(0xF << (obj->pin*4));
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 ids[obj->port][obj->pin] = 0;
bogdanm 0:9b334a45a8ff 132 }
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
bogdanm 0:9b334a45a8ff 135 {
bogdanm 0:9b334a45a8ff 136 uint32_t int_mode = MXC_GPIO->int_mode[obj->port];
bogdanm 0:9b334a45a8ff 137 uint32_t curr_mode = (int_mode >> (obj->pin*4)) & 0x3; /* only supporting edge interrupts */
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 uint32_t new_mode = curr_mode;
bogdanm 0:9b334a45a8ff 140 if (event == IRQ_FALL) {
bogdanm 0:9b334a45a8ff 141 if (enable) {
bogdanm 0:9b334a45a8ff 142 new_mode |= 0x1;
bogdanm 0:9b334a45a8ff 143 } else {
bogdanm 0:9b334a45a8ff 144 new_mode &= ~0x1;
bogdanm 0:9b334a45a8ff 145 }
bogdanm 0:9b334a45a8ff 146 } else if (event == IRQ_RISE) {
bogdanm 0:9b334a45a8ff 147 if (enable) {
bogdanm 0:9b334a45a8ff 148 new_mode |= 0x2;
bogdanm 0:9b334a45a8ff 149 } else {
bogdanm 0:9b334a45a8ff 150 new_mode &= ~0x2;
bogdanm 0:9b334a45a8ff 151 }
bogdanm 0:9b334a45a8ff 152 }
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 int_mode &= ~(0xF << (obj->pin*4));
bogdanm 0:9b334a45a8ff 155 int_mode |= (new_mode << (obj->pin*4));
bogdanm 0:9b334a45a8ff 156 MXC_GPIO->int_mode[obj->port] = int_mode;
bogdanm 0:9b334a45a8ff 157 }
bogdanm 0:9b334a45a8ff 158
bogdanm 0:9b334a45a8ff 159 void gpio_irq_enable(gpio_irq_t *obj)
bogdanm 0:9b334a45a8ff 160 {
bogdanm 0:9b334a45a8ff 161 MXC_GPIO->inten[obj->port] |= (1 << obj->pin);
bogdanm 0:9b334a45a8ff 162 }
bogdanm 0:9b334a45a8ff 163
bogdanm 0:9b334a45a8ff 164 void gpio_irq_disable(gpio_irq_t *obj)
bogdanm 0:9b334a45a8ff 165 {
bogdanm 0:9b334a45a8ff 166 MXC_GPIO->inten[obj->port] &= ~(1 << obj->pin);
bogdanm 0:9b334a45a8ff 167 }