Fawwaz Nadzmy / mbed-STM

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_K20XX/spi_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2015 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include "spi_api.h"
bogdanm 0:9b334a45a8ff 18
bogdanm 0:9b334a45a8ff 19 #include <math.h>
bogdanm 0:9b334a45a8ff 20
bogdanm 0:9b334a45a8ff 21 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 22 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 23 #include "clk_freqs.h"
bogdanm 0:9b334a45a8ff 24 #include "PeripheralPins.h"
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
bogdanm 0:9b334a45a8ff 27 // determine the SPI to use
bogdanm 0:9b334a45a8ff 28 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
bogdanm 0:9b334a45a8ff 29 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
bogdanm 0:9b334a45a8ff 30 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
bogdanm 0:9b334a45a8ff 31 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
bogdanm 0:9b334a45a8ff 32 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
bogdanm 0:9b334a45a8ff 33 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35 obj->spi = (SPI_Type*)pinmap_merge(spi_data, spi_cntl);
bogdanm 0:9b334a45a8ff 36 MBED_ASSERT((int)obj->spi != NC);
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK;
bogdanm 0:9b334a45a8ff 39 SIM->SCGC6 |= SIM_SCGC6_SPI0_MASK;
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 obj->spi->MCR &= ~(SPI_MCR_MDIS_MASK | SPI_MCR_HALT_MASK);
bogdanm 0:9b334a45a8ff 42 //obj->spi->MCR |= SPI_MCR_DIS_RXF_MASK | SPI_MCR_DIS_TXF_MASK;
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 // not halt in the debug mode
bogdanm 0:9b334a45a8ff 45 obj->spi->SR |= SPI_SR_EOQF_MASK;
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 // pin out the spi pins
bogdanm 0:9b334a45a8ff 48 pinmap_pinout(mosi, PinMap_SPI_MOSI);
bogdanm 0:9b334a45a8ff 49 pinmap_pinout(miso, PinMap_SPI_MISO);
bogdanm 0:9b334a45a8ff 50 pinmap_pinout(sclk, PinMap_SPI_SCLK);
bogdanm 0:9b334a45a8ff 51 if (ssel != NC) {
bogdanm 0:9b334a45a8ff 52 pinmap_pinout(ssel, PinMap_SPI_SSEL);
bogdanm 0:9b334a45a8ff 53 }
bogdanm 0:9b334a45a8ff 54 }
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 void spi_free(spi_t *obj) {
bogdanm 0:9b334a45a8ff 57 // [TODO]
bogdanm 0:9b334a45a8ff 58 }
bogdanm 0:9b334a45a8ff 59 void spi_format(spi_t *obj, int bits, int mode, int slave) {
bogdanm 0:9b334a45a8ff 60 MBED_ASSERT((bits > 4) || (bits < 16));
bogdanm 0:9b334a45a8ff 61 MBED_ASSERT((mode >= 0) && (mode <= 3));
bogdanm 0:9b334a45a8ff 62
bogdanm 0:9b334a45a8ff 63 uint8_t polarity = (mode & 0x2) ? 1 : 0;
bogdanm 0:9b334a45a8ff 64 uint8_t phase = (mode & 0x1) ? 1 : 0;
bogdanm 0:9b334a45a8ff 65 uint8_t old_polarity = (obj->spi->CTAR[0] & SPI_CTAR_CPOL_MASK) != 0;
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 // set master/slave
bogdanm 0:9b334a45a8ff 68 if (slave) {
bogdanm 0:9b334a45a8ff 69 obj->spi->MCR &= ~SPI_MCR_MSTR_MASK;
bogdanm 0:9b334a45a8ff 70 } else {
bogdanm 0:9b334a45a8ff 71 obj->spi->MCR |= (1UL << SPI_MCR_MSTR_SHIFT);
bogdanm 0:9b334a45a8ff 72 }
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 // CTAR0 is used
bogdanm 0:9b334a45a8ff 75 obj->spi->CTAR[0] &= ~(SPI_CTAR_CPHA_MASK | SPI_CTAR_CPOL_MASK | SPI_CTAR_FMSZ_MASK);
bogdanm 0:9b334a45a8ff 76 obj->spi->CTAR[0] |= (polarity << SPI_CTAR_CPOL_SHIFT) | (phase << SPI_CTAR_CPHA_SHIFT) | ((bits - 1) << SPI_CTAR_FMSZ_SHIFT);
bogdanm 0:9b334a45a8ff 77
bogdanm 0:9b334a45a8ff 78 //If clk idle state was changed, start a dummy transmission
bogdanm 0:9b334a45a8ff 79 //This is a 'feature' in DSPI: https://community.freescale.com/thread/105526
bogdanm 0:9b334a45a8ff 80 if ((old_polarity != polarity) && (slave == 0)) {
bogdanm 0:9b334a45a8ff 81 //Start transfer (CS should be high, so shouldn't matter)
bogdanm 0:9b334a45a8ff 82 spi_master_write(obj, 0xFFFF);
bogdanm 0:9b334a45a8ff 83 }
bogdanm 0:9b334a45a8ff 84 }
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 static const uint8_t baudrate_prescaler[] = {2,3,5,7};
bogdanm 0:9b334a45a8ff 87 static const uint16_t baudrate_scaler[] = {2,4,6,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768};
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 void spi_frequency(spi_t *obj, int hz) {
bogdanm 0:9b334a45a8ff 90 uint32_t f_error = 0;
bogdanm 0:9b334a45a8ff 91 uint32_t p_error = 0xffffffff;
bogdanm 0:9b334a45a8ff 92 uint32_t ref = 0;
bogdanm 0:9b334a45a8ff 93 uint32_t br = 0;
bogdanm 0:9b334a45a8ff 94 uint32_t ref_spr = 0;
bogdanm 0:9b334a45a8ff 95 uint32_t ref_prescaler = 0;
bogdanm 0:9b334a45a8ff 96 uint32_t ref_dr = 0;
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 // bus clk
bogdanm 0:9b334a45a8ff 99 uint32_t PCLK = bus_frequency();
bogdanm 0:9b334a45a8ff 100
bogdanm 0:9b334a45a8ff 101 for (uint32_t i = 0; i < 4; i++) {
bogdanm 0:9b334a45a8ff 102 for (br = 0; br <= 15; br++) {
bogdanm 0:9b334a45a8ff 103 for (uint32_t dr = 0; dr < 2; dr++) {
bogdanm 0:9b334a45a8ff 104 ref = (PCLK * (1U + dr) / baudrate_prescaler[i]) / baudrate_scaler[br];
bogdanm 0:9b334a45a8ff 105 if (ref > (uint32_t)hz)
bogdanm 0:9b334a45a8ff 106 continue;
bogdanm 0:9b334a45a8ff 107 f_error = hz - ref;
bogdanm 0:9b334a45a8ff 108 if (f_error < p_error) {
bogdanm 0:9b334a45a8ff 109 ref_spr = br;
bogdanm 0:9b334a45a8ff 110 ref_prescaler = i;
bogdanm 0:9b334a45a8ff 111 ref_dr = dr;
bogdanm 0:9b334a45a8ff 112 p_error = f_error;
bogdanm 0:9b334a45a8ff 113 }
bogdanm 0:9b334a45a8ff 114 }
bogdanm 0:9b334a45a8ff 115 }
bogdanm 0:9b334a45a8ff 116 }
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 // set PBR and BR
bogdanm 0:9b334a45a8ff 119 obj->spi->CTAR[0] &= ~(SPI_CTAR_PBR_MASK | SPI_CTAR_BR_MASK | SPI_CTAR_DBR_MASK);
bogdanm 0:9b334a45a8ff 120 obj->spi->CTAR[0] |= (ref_prescaler << SPI_CTAR_PBR_SHIFT) | (ref_spr << SPI_CTAR_BR_SHIFT) | (ref_dr << SPI_CTAR_DBR_SHIFT);
bogdanm 0:9b334a45a8ff 121 }
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 static inline int spi_writeable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 124 return (obj->spi->SR & SPI_SR_TFFF_MASK) ? 1 : 0;
bogdanm 0:9b334a45a8ff 125 }
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 static inline int spi_readable(spi_t *obj) {
bogdanm 0:9b334a45a8ff 128 return (obj->spi->SR & SPI_SR_RFDF_MASK) ? 1 : 0;
bogdanm 0:9b334a45a8ff 129 }
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 int spi_master_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 132 //clear RX buffer flag
bogdanm 0:9b334a45a8ff 133 obj->spi->SR |= SPI_SR_RFDF_MASK;
bogdanm 0:9b334a45a8ff 134 // wait tx buffer empty
bogdanm 0:9b334a45a8ff 135 while(!spi_writeable(obj));
bogdanm 0:9b334a45a8ff 136 obj->spi->PUSHR = SPI_PUSHR_TXDATA(value & 0xffff) /*| SPI_PUSHR_EOQ_MASK*/;
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138 // wait rx buffer full
bogdanm 0:9b334a45a8ff 139 while (!spi_readable(obj));
bogdanm 0:9b334a45a8ff 140 return obj->spi->POPR;
bogdanm 0:9b334a45a8ff 141 }
bogdanm 0:9b334a45a8ff 142
bogdanm 0:9b334a45a8ff 143 int spi_slave_receive(spi_t *obj) {
bogdanm 0:9b334a45a8ff 144 return spi_readable(obj);
bogdanm 0:9b334a45a8ff 145 }
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147 int spi_slave_read(spi_t *obj) {
bogdanm 0:9b334a45a8ff 148 obj->spi->SR |= SPI_SR_RFDF_MASK;
bogdanm 0:9b334a45a8ff 149 return obj->spi->POPR;
bogdanm 0:9b334a45a8ff 150 }
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152 void spi_slave_write(spi_t *obj, int value) {
bogdanm 0:9b334a45a8ff 153 while (!spi_writeable(obj));
bogdanm 0:9b334a45a8ff 154 }