mbed-STM - mbed library sources. Supersedes mbed-src.

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mbed library sources. Supersedes mbed-src.

targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_uart.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:: bogdanm
Date:: Thu Oct 01 15:25:22 2015 +0300
Revision:: 0:9b334a45a8ff
Child:: 144:ef7eb2e8f9f7

Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32f0xx_hal_uart.c
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
bogdanm	0:9b334a45a8ff	5	* @version V1.3.0
bogdanm	0:9b334a45a8ff	6	* @date 26-June-2015
bogdanm	0:9b334a45a8ff	7	* @brief UART HAL module driver.
bogdanm	0:9b334a45a8ff	8	* This file provides firmware functions to manage the following
bogdanm	0:9b334a45a8ff	9	* functionalities of the Universal Asynchronous Receiver Transmitter (UART) peripheral:
bogdanm	0:9b334a45a8ff	10	* + Initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	11	* + IO operation functions
bogdanm	0:9b334a45a8ff	12	* + Peripheral Control functions
bogdanm	0:9b334a45a8ff	13	* + Peripheral State and Errors functions
bogdanm	0:9b334a45a8ff	14	*
bogdanm	0:9b334a45a8ff	15	@verbatim
bogdanm	0:9b334a45a8ff	16	===============================================================================
bogdanm	0:9b334a45a8ff	17	##### How to use this driver #####
bogdanm	0:9b334a45a8ff	18	===============================================================================
bogdanm	0:9b334a45a8ff	19	[..]
bogdanm	0:9b334a45a8ff	20	The UART HAL driver can be used as follows:
bogdanm	0:9b334a45a8ff	21
bogdanm	0:9b334a45a8ff	22	(#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart).
bogdanm	0:9b334a45a8ff	23	(#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
bogdanm	0:9b334a45a8ff	24	(++) Enable the USARTx interface clock.
bogdanm	0:9b334a45a8ff	25	(++) UART pins configuration:
bogdanm	0:9b334a45a8ff	26	(+++) Enable the clock for the UART GPIOs.
bogdanm	0:9b334a45a8ff	27	(+++) Configure these UART pins as alternate function pull-up.
bogdanm	0:9b334a45a8ff	28	(++) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
bogdanm	0:9b334a45a8ff	29	and HAL_UART_Receive_IT() APIs):
bogdanm	0:9b334a45a8ff	30	(+++) Configure the USARTx interrupt priority.
bogdanm	0:9b334a45a8ff	31	(+++) Enable the NVIC USART IRQ handle.
bogdanm	0:9b334a45a8ff	32	(++) UART interrupts handling:
bogdanm	0:9b334a45a8ff	33	-@@- The specific UART interrupts (Transmission complete interrupt,
bogdanm	0:9b334a45a8ff	34	RXNE interrupt and Error Interrupts) are managed using the macros
bogdanm	0:9b334a45a8ff	35	__HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit and receive processes.
bogdanm	0:9b334a45a8ff	36	(++) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
bogdanm	0:9b334a45a8ff	37	and HAL_UART_Receive_DMA() APIs):
bogdanm	0:9b334a45a8ff	38	(+++) Declare a DMA handle structure for the Tx/Rx channel.
bogdanm	0:9b334a45a8ff	39	(+++) Enable the DMAx interface clock.
bogdanm	0:9b334a45a8ff	40	(+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
bogdanm	0:9b334a45a8ff	41	(+++) Configure the DMA Tx/Rx channel.
bogdanm	0:9b334a45a8ff	42	(+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
bogdanm	0:9b334a45a8ff	43	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
bogdanm	0:9b334a45a8ff	44
bogdanm	0:9b334a45a8ff	45	(#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
bogdanm	0:9b334a45a8ff	46	flow control and Mode (Receiver/Transmitter) in the huart handle Init structure.
bogdanm	0:9b334a45a8ff	47
bogdanm	0:9b334a45a8ff	48	(#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...)
bogdanm	0:9b334a45a8ff	49	in the huart handle AdvancedInit structure.
bogdanm	0:9b334a45a8ff	50
bogdanm	0:9b334a45a8ff	51	(#) For the UART asynchronous mode, initialize the UART registers by calling
bogdanm	0:9b334a45a8ff	52	the HAL_UART_Init() API.
bogdanm	0:9b334a45a8ff	53
bogdanm	0:9b334a45a8ff	54	(#) For the UART Half duplex mode, initialize the UART registers by calling
bogdanm	0:9b334a45a8ff	55	the HAL_HalfDuplex_Init() API.
bogdanm	0:9b334a45a8ff	56
bogdanm	0:9b334a45a8ff	57	(#) For the UART Multiprocessor mode, initialize the UART registers
bogdanm	0:9b334a45a8ff	58	by calling the HAL_MultiProcessor_Init() API.
bogdanm	0:9b334a45a8ff	59
bogdanm	0:9b334a45a8ff	60	(#) For the UART RS485 Driver Enabled mode, initialize the UART registers
bogdanm	0:9b334a45a8ff	61	by calling the HAL_RS485Ex_Init() API.
bogdanm	0:9b334a45a8ff	62
bogdanm	0:9b334a45a8ff	63	[..]
bogdanm	0:9b334a45a8ff	64	(@) These APIs(HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_MultiProcessor_Init(),
bogdanm	0:9b334a45a8ff	65	also configure the low level Hardware GPIO, CLOCK, CORTEX...etc) by
bogdanm	0:9b334a45a8ff	66	calling the customized HAL_UART_MspInit() API.
bogdanm	0:9b334a45a8ff	67
bogdanm	0:9b334a45a8ff	68	Three operation modes are available within this driver :
bogdanm	0:9b334a45a8ff	69
bogdanm	0:9b334a45a8ff	70	* Polling mode IO operation *
bogdanm	0:9b334a45a8ff	71	=================================
bogdanm	0:9b334a45a8ff	72	[..]
bogdanm	0:9b334a45a8ff	73	(+) Send an amount of data in blocking mode using HAL_UART_Transmit()
bogdanm	0:9b334a45a8ff	74	(+) Receive an amount of data in blocking mode using HAL_UART_Receive()
bogdanm	0:9b334a45a8ff	75
bogdanm	0:9b334a45a8ff	76	* Interrupt mode IO operation *
bogdanm	0:9b334a45a8ff	77	===================================
bogdanm	0:9b334a45a8ff	78	[..]
bogdanm	0:9b334a45a8ff	79	(+) Send an amount of data in non blocking mode using HAL_UART_Transmit_IT()
bogdanm	0:9b334a45a8ff	80	(+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	81	add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback
bogdanm	0:9b334a45a8ff	82	(+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	83	add his own code by customization of function pointer HAL_UART_TxCpltCallback
bogdanm	0:9b334a45a8ff	84	(+) Receive an amount of data in non blocking mode using HAL_UART_Receive_IT()
bogdanm	0:9b334a45a8ff	85	(+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	86	add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback
bogdanm	0:9b334a45a8ff	87	(+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	88	add his own code by customization of function pointer HAL_UART_RxCpltCallback
bogdanm	0:9b334a45a8ff	89	(+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	90	add his own code by customization of function pointer HAL_UART_ErrorCallback
bogdanm	0:9b334a45a8ff	91
bogdanm	0:9b334a45a8ff	92	* DMA mode IO operation *
bogdanm	0:9b334a45a8ff	93	==============================
bogdanm	0:9b334a45a8ff	94	[..]
bogdanm	0:9b334a45a8ff	95	(+) Send an amount of data in non blocking mode (DMA) using HAL_UART_Transmit_DMA()
bogdanm	0:9b334a45a8ff	96	(+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	97	add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback
bogdanm	0:9b334a45a8ff	98	(+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	99	add his own code by customization of function pointer HAL_UART_TxCpltCallback
bogdanm	0:9b334a45a8ff	100	(+) Receive an amount of data in non blocking mode (DMA) using HAL_UART_Receive_DMA()
bogdanm	0:9b334a45a8ff	101	(+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	102	add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback
bogdanm	0:9b334a45a8ff	103	(+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
bogdanm	0:9b334a45a8ff	104	add his own code by customization of function pointer HAL_UART_RxCpltCallback
bogdanm	0:9b334a45a8ff	105	(+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
bogdanm	0:9b334a45a8ff	106	add his own code by customization of function pointer HAL_UART_ErrorCallback
bogdanm	0:9b334a45a8ff	107	(+) Pause the DMA Transfer using HAL_UART_DMAPause()
bogdanm	0:9b334a45a8ff	108	(+) Resume the DMA Transfer using HAL_UART_DMAResume()
bogdanm	0:9b334a45a8ff	109	(+) Stop the DMA Transfer using HAL_UART_DMAStop()
bogdanm	0:9b334a45a8ff	110
bogdanm	0:9b334a45a8ff	111	* UART HAL driver macros list *
bogdanm	0:9b334a45a8ff	112	=============================================
bogdanm	0:9b334a45a8ff	113	[..]
bogdanm	0:9b334a45a8ff	114	Below the list of most used macros in UART HAL driver.
bogdanm	0:9b334a45a8ff	115
bogdanm	0:9b334a45a8ff	116	(+) __HAL_UART_ENABLE: Enable the UART peripheral
bogdanm	0:9b334a45a8ff	117	(+) __HAL_UART_DISABLE: Disable the UART peripheral
bogdanm	0:9b334a45a8ff	118	(+) __HAL_UART_GET_FLAG : Check whether the specified UART flag is set or not
bogdanm	0:9b334a45a8ff	119	(+) __HAL_UART_CLEAR_FLAG : Clear the specified UART pending flag
bogdanm	0:9b334a45a8ff	120	(+) __HAL_UART_ENABLE_IT: Enable the specified UART interrupt
bogdanm	0:9b334a45a8ff	121	(+) __HAL_UART_DISABLE_IT: Disable the specified UART interrupt
bogdanm	0:9b334a45a8ff	122
bogdanm	0:9b334a45a8ff	123	[..]
bogdanm	0:9b334a45a8ff	124	(@) You can refer to the UART HAL driver header file for more useful macros
bogdanm	0:9b334a45a8ff	125
bogdanm	0:9b334a45a8ff	126	@endverbatim
bogdanm	0:9b334a45a8ff	127	******************************************************************************
bogdanm	0:9b334a45a8ff	128	* @attention
bogdanm	0:9b334a45a8ff	129	*
bogdanm	0:9b334a45a8ff	130	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	131	*
bogdanm	0:9b334a45a8ff	132	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	133	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	134	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	135	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	136	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	137	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	138	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	139	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	140	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	141	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	142	*
bogdanm	0:9b334a45a8ff	143	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	144	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	145	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	146	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	147	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	148	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	149	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	150	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	151	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	152	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	153	*
bogdanm	0:9b334a45a8ff	154	******************************************************************************
bogdanm	0:9b334a45a8ff	155	*/
bogdanm	0:9b334a45a8ff	156
bogdanm	0:9b334a45a8ff	157	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	158	#include "stm32f0xx_hal.h"
bogdanm	0:9b334a45a8ff	159
bogdanm	0:9b334a45a8ff	160	/** @addtogroup STM32F0xx_HAL_Driver
bogdanm	0:9b334a45a8ff	161	* @{
bogdanm	0:9b334a45a8ff	162	*/
bogdanm	0:9b334a45a8ff	163
bogdanm	0:9b334a45a8ff	164	/** @defgroup UART UART
bogdanm	0:9b334a45a8ff	165	* @brief HAL UART module driver
bogdanm	0:9b334a45a8ff	166	* @{
bogdanm	0:9b334a45a8ff	167	*/
bogdanm	0:9b334a45a8ff	168
bogdanm	0:9b334a45a8ff	169	#ifdef HAL_UART_MODULE_ENABLED
bogdanm	0:9b334a45a8ff	170
bogdanm	0:9b334a45a8ff	171	/* Private typedef -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	172	/* Private define ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	173	/** @defgroup UART_Private_Constants UART Private Constants
bogdanm	0:9b334a45a8ff	174	* @{
bogdanm	0:9b334a45a8ff	175	*/
bogdanm	0:9b334a45a8ff	176	#define UART_TEACK_REACK_TIMEOUT ((uint32_t) 1000) /!< UART TX or RX enable acknowledge time-out value /
bogdanm	0:9b334a45a8ff	177	#define UART_TXDMA_TIMEOUTVALUE 22000
bogdanm	0:9b334a45a8ff	178	#define UART_CR1_FIELDS ((uint32_t)(USART_CR1_M \| USART_CR1_PCE \| USART_CR1_PS \| \
bogdanm	0:9b334a45a8ff	179	USART_CR1_TE \| USART_CR1_RE \| USART_CR1_OVER8)) /!< UART or USART CR1 fields of parameters set by UART_SetConfig API /
bogdanm	0:9b334a45a8ff	180	/**
bogdanm	0:9b334a45a8ff	181	* @}
bogdanm	0:9b334a45a8ff	182	*/
bogdanm	0:9b334a45a8ff	183
bogdanm	0:9b334a45a8ff	184	/* Private macros ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	185	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	186	/* Private function prototypes -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	187	/** @addtogroup UART_Private_Functions UART Private Functions
bogdanm	0:9b334a45a8ff	188	* @{
bogdanm	0:9b334a45a8ff	189	*/
bogdanm	0:9b334a45a8ff	190	static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	191	static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	192	static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	193	static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	194	static void UART_DMAError(DMA_HandleTypeDef *hdma);
bogdanm	0:9b334a45a8ff	195	/**
bogdanm	0:9b334a45a8ff	196	* @}
bogdanm	0:9b334a45a8ff	197	*/
bogdanm	0:9b334a45a8ff	198
bogdanm	0:9b334a45a8ff	199	/* Exported functions --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	200
bogdanm	0:9b334a45a8ff	201	/** @defgroup UART_Exported_Functions UART Exported Functions
bogdanm	0:9b334a45a8ff	202	* @{
bogdanm	0:9b334a45a8ff	203	*/
bogdanm	0:9b334a45a8ff	204
bogdanm	0:9b334a45a8ff	205	/** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm	0:9b334a45a8ff	206	* @brief Initialization and Configuration functions
bogdanm	0:9b334a45a8ff	207	*
bogdanm	0:9b334a45a8ff	208	@verbatim
bogdanm	0:9b334a45a8ff	209	===============================================================================
bogdanm	0:9b334a45a8ff	210	##### Initialization and Configuration functions #####
bogdanm	0:9b334a45a8ff	211	===============================================================================
bogdanm	0:9b334a45a8ff	212	[..]
bogdanm	0:9b334a45a8ff	213	This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
bogdanm	0:9b334a45a8ff	214	in asynchronous mode.
bogdanm	0:9b334a45a8ff	215	(+) For the asynchronous mode the parameters below can be configured:
bogdanm	0:9b334a45a8ff	216	(++) Baud Rate
bogdanm	0:9b334a45a8ff	217	(++) Word Length
bogdanm	0:9b334a45a8ff	218	(++) Stop Bit
bogdanm	0:9b334a45a8ff	219	(++) Parity: If the parity is enabled, then the MSB bit of the data written
bogdanm	0:9b334a45a8ff	220	in the data register is transmitted but is changed by the parity bit.
bogdanm	0:9b334a45a8ff	221	According to device capability (support or not of 7-bit word length),
bogdanm	0:9b334a45a8ff	222	frame length is either defined by the M bit (8-bits or 9-bits)
bogdanm	0:9b334a45a8ff	223	or by the M1 and M0 bits (7-bit, 8-bit or 9-bit).
bogdanm	0:9b334a45a8ff	224	Possible UART frame formats are as listed in the following table:
bogdanm	0:9b334a45a8ff	225
bogdanm	0:9b334a45a8ff	226	(+++) Table 1. UART frame format.
bogdanm	0:9b334a45a8ff	227	(+++) +-----------------------------------------------------------------------+
bogdanm	0:9b334a45a8ff	228	(+++) \| M bit \| PCE bit \| UART frame \|
bogdanm	0:9b334a45a8ff	229	(+++) \|-------------------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	230	(+++) \| 0 \| 0 \| \| SB \| 8-bit data \| STB \| \|
bogdanm	0:9b334a45a8ff	231	(+++) \|-------------------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	232	(+++) \| 0 \| 1 \| \| SB \| 7-bit data \| PB \| STB \| \|
bogdanm	0:9b334a45a8ff	233	(+++) \|-------------------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	234	(+++) \| 1 \| 0 \| \| SB \| 9-bit data \| STB \| \|
bogdanm	0:9b334a45a8ff	235	(+++) \|-------------------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	236	(+++) \| 1 \| 1 \| \| SB \| 8-bit data \| PB \| STB \| \|
bogdanm	0:9b334a45a8ff	237	(+++) +-----------------------------------------------------------------------+
bogdanm	0:9b334a45a8ff	238	(+++) \| M1 bit \| M0 bit \| PCE bit \| UART frame \|
bogdanm	0:9b334a45a8ff	239	(+++) \|---------\|---------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	240	(+++) \| 0 \| 0 \| 0 \| \| SB \| 8 bit data \| STB \| \|
bogdanm	0:9b334a45a8ff	241	(+++) \|---------\|---------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	242	(+++) \| 0 \| 0 \| 1 \| \| SB \| 7 bit data \| PB \| STB \| \|
bogdanm	0:9b334a45a8ff	243	(+++) \|---------\|---------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	244	(+++) \| 0 \| 1 \| 0 \| \| SB \| 9 bit data \| STB \| \|
bogdanm	0:9b334a45a8ff	245	(+++) \|---------\|---------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	246	(+++) \| 0 \| 1 \| 1 \| \| SB \| 8 bit data \| PB \| STB \| \|
bogdanm	0:9b334a45a8ff	247	(+++) \|---------\|---------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	248	(+++) \| 1 \| 0 \| 0 \| \| SB \| 7 bit data \| STB \| \|
bogdanm	0:9b334a45a8ff	249	(+++) \|---------\|---------\|-----------\|---------------------------------------\|
bogdanm	0:9b334a45a8ff	250	(+++) \| 1 \| 0 \| 1 \| \| SB \| 6 bit data \| PB \| STB \| \|
bogdanm	0:9b334a45a8ff	251	(+++) +-----------------------------------------------------------------------+
bogdanm	0:9b334a45a8ff	252	(++) Hardware flow control
bogdanm	0:9b334a45a8ff	253	(++) Receiver/transmitter modes
bogdanm	0:9b334a45a8ff	254	(++) Over Sampling Method
bogdanm	0:9b334a45a8ff	255	(++) One-Bit Sampling Method
bogdanm	0:9b334a45a8ff	256	(+) For the asynchronous mode, the following advanced features can be configured as well:
bogdanm	0:9b334a45a8ff	257	(++) TX and/or RX pin level inversion
bogdanm	0:9b334a45a8ff	258	(++) data logical level inversion
bogdanm	0:9b334a45a8ff	259	(++) RX and TX pins swap
bogdanm	0:9b334a45a8ff	260	(++) RX overrun detection disabling
bogdanm	0:9b334a45a8ff	261	(++) DMA disabling on RX error
bogdanm	0:9b334a45a8ff	262	(++) MSB first on communication line
bogdanm	0:9b334a45a8ff	263	(++) auto Baud rate detection
bogdanm	0:9b334a45a8ff	264	[..]
bogdanm	0:9b334a45a8ff	265	The HAL_UART_Init(), HAL_HalfDuplex_Init() and HAL_MultiProcessor_Init()
bogdanm	0:9b334a45a8ff	266	API follow respectively the UART asynchronous, UART Half duplex and multiprocessor mode
bogdanm	0:9b334a45a8ff	267	configuration procedures (details for the procedures are available in reference manual).
bogdanm	0:9b334a45a8ff	268
bogdanm	0:9b334a45a8ff	269	@endverbatim
bogdanm	0:9b334a45a8ff	270	* @{
bogdanm	0:9b334a45a8ff	271	*/
bogdanm	0:9b334a45a8ff	272
bogdanm	0:9b334a45a8ff	273	/**
bogdanm	0:9b334a45a8ff	274	* @brief Initialize the UART mode according to the specified
bogdanm	0:9b334a45a8ff	275	* parameters in the UART_InitTypeDef and initialize the associated handle.
bogdanm	0:9b334a45a8ff	276	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	277	* @retval HAL status
bogdanm	0:9b334a45a8ff	278	*/
bogdanm	0:9b334a45a8ff	279	HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	280	{
bogdanm	0:9b334a45a8ff	281	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	282	if(huart == NULL)
bogdanm	0:9b334a45a8ff	283	{
bogdanm	0:9b334a45a8ff	284	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	285	}
bogdanm	0:9b334a45a8ff	286
bogdanm	0:9b334a45a8ff	287	if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
bogdanm	0:9b334a45a8ff	288	{
bogdanm	0:9b334a45a8ff	289	/* Check the parameters */
bogdanm	0:9b334a45a8ff	290	assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	291	}
bogdanm	0:9b334a45a8ff	292	else
bogdanm	0:9b334a45a8ff	293	{
bogdanm	0:9b334a45a8ff	294	/* Check the parameters */
bogdanm	0:9b334a45a8ff	295	assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	296	}
bogdanm	0:9b334a45a8ff	297
bogdanm	0:9b334a45a8ff	298	if(huart->State == HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	299	{
bogdanm	0:9b334a45a8ff	300	/* Allocate lock resource and initialize it */
bogdanm	0:9b334a45a8ff	301	huart->Lock = HAL_UNLOCKED;
bogdanm	0:9b334a45a8ff	302
bogdanm	0:9b334a45a8ff	303	/* Init the low level hardware : GPIO, CLOCK */
bogdanm	0:9b334a45a8ff	304	HAL_UART_MspInit(huart);
bogdanm	0:9b334a45a8ff	305	}
bogdanm	0:9b334a45a8ff	306
bogdanm	0:9b334a45a8ff	307	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	308
bogdanm	0:9b334a45a8ff	309	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	310	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	311
bogdanm	0:9b334a45a8ff	312	/* Set the UART Communication parameters */
bogdanm	0:9b334a45a8ff	313	if (UART_SetConfig(huart) == HAL_ERROR)
bogdanm	0:9b334a45a8ff	314	{
bogdanm	0:9b334a45a8ff	315	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	316	}
bogdanm	0:9b334a45a8ff	317
bogdanm	0:9b334a45a8ff	318	if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
bogdanm	0:9b334a45a8ff	319	{
bogdanm	0:9b334a45a8ff	320	UART_AdvFeatureConfig(huart);
bogdanm	0:9b334a45a8ff	321	}
bogdanm	0:9b334a45a8ff	322
bogdanm	0:9b334a45a8ff	323	/* In asynchronous mode, the following bits must be kept cleared:
bogdanm	0:9b334a45a8ff	324	- LINEN and CLKEN bits in the USART_CR2 register,
bogdanm	0:9b334a45a8ff	325	- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
bogdanm	0:9b334a45a8ff	326	huart->Instance->CR2 &= ~(USART_CR2_LINEN \| USART_CR2_CLKEN);
bogdanm	0:9b334a45a8ff	327	huart->Instance->CR3 &= ~(USART_CR3_SCEN \| USART_CR3_HDSEL \| USART_CR3_IREN);
bogdanm	0:9b334a45a8ff	328
bogdanm	0:9b334a45a8ff	329	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	330	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	331
bogdanm	0:9b334a45a8ff	332	/* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm	0:9b334a45a8ff	333	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	334	}
bogdanm	0:9b334a45a8ff	335
bogdanm	0:9b334a45a8ff	336	/**
bogdanm	0:9b334a45a8ff	337	* @brief Initialize the half-duplex mode according to the specified
bogdanm	0:9b334a45a8ff	338	* parameters in the UART_InitTypeDef and creates the associated handle.
bogdanm	0:9b334a45a8ff	339	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	340	* @retval HAL status
bogdanm	0:9b334a45a8ff	341	*/
bogdanm	0:9b334a45a8ff	342	HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	343	{
bogdanm	0:9b334a45a8ff	344	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	345	if(huart == NULL)
bogdanm	0:9b334a45a8ff	346	{
bogdanm	0:9b334a45a8ff	347	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	348	}
bogdanm	0:9b334a45a8ff	349
bogdanm	0:9b334a45a8ff	350	/* Check UART instance */
bogdanm	0:9b334a45a8ff	351	assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	352
bogdanm	0:9b334a45a8ff	353	if(huart->State == HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	354	{
bogdanm	0:9b334a45a8ff	355	/* Allocate lock resource and initialize it */
bogdanm	0:9b334a45a8ff	356	huart->Lock = HAL_UNLOCKED;
bogdanm	0:9b334a45a8ff	357
bogdanm	0:9b334a45a8ff	358	/* Init the low level hardware : GPIO, CLOCK */
bogdanm	0:9b334a45a8ff	359	HAL_UART_MspInit(huart);
bogdanm	0:9b334a45a8ff	360	}
bogdanm	0:9b334a45a8ff	361
bogdanm	0:9b334a45a8ff	362	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	363
bogdanm	0:9b334a45a8ff	364	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	365	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	366
bogdanm	0:9b334a45a8ff	367	/* Set the UART Communication parameters */
bogdanm	0:9b334a45a8ff	368	if (UART_SetConfig(huart) == HAL_ERROR)
bogdanm	0:9b334a45a8ff	369	{
bogdanm	0:9b334a45a8ff	370	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	371	}
bogdanm	0:9b334a45a8ff	372
bogdanm	0:9b334a45a8ff	373	if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
bogdanm	0:9b334a45a8ff	374	{
bogdanm	0:9b334a45a8ff	375	UART_AdvFeatureConfig(huart);
bogdanm	0:9b334a45a8ff	376	}
bogdanm	0:9b334a45a8ff	377
bogdanm	0:9b334a45a8ff	378	/* In half-duplex mode, the following bits must be kept cleared:
bogdanm	0:9b334a45a8ff	379	- LINEN and CLKEN bits in the USART_CR2 register,
bogdanm	0:9b334a45a8ff	380	- SCEN and IREN bits in the USART_CR3 register.*/
bogdanm	0:9b334a45a8ff	381	huart->Instance->CR2 &= ~(USART_CR2_LINEN \| USART_CR2_CLKEN);
bogdanm	0:9b334a45a8ff	382	huart->Instance->CR3 &= ~(USART_CR3_IREN \| USART_CR3_SCEN);
bogdanm	0:9b334a45a8ff	383
bogdanm	0:9b334a45a8ff	384	/* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
bogdanm	0:9b334a45a8ff	385	huart->Instance->CR3 \|= USART_CR3_HDSEL;
bogdanm	0:9b334a45a8ff	386
bogdanm	0:9b334a45a8ff	387	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	388	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	389
bogdanm	0:9b334a45a8ff	390	/* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm	0:9b334a45a8ff	391	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	392	}
bogdanm	0:9b334a45a8ff	393
bogdanm	0:9b334a45a8ff	394
bogdanm	0:9b334a45a8ff	395	/**
bogdanm	0:9b334a45a8ff	396	* @brief Initialize the multiprocessor mode according to the specified
bogdanm	0:9b334a45a8ff	397	* parameters in the UART_InitTypeDef and initialize the associated handle.
bogdanm	0:9b334a45a8ff	398	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	399	* @param Address: UART node address (4-, 6-, 7- or 8-bit long).
bogdanm	0:9b334a45a8ff	400	* @param WakeUpMethod: specifies the UART wakeup method.
bogdanm	0:9b334a45a8ff	401	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	402	* @arg UART_WAKEUPMETHOD_IDLELINE: WakeUp by an idle line detection
bogdanm	0:9b334a45a8ff	403	* @arg UART_WAKEUPMETHOD_ADDRESSMARK: WakeUp by an address mark
bogdanm	0:9b334a45a8ff	404	* @note If the user resorts to idle line detection wake up, the Address parameter
bogdanm	0:9b334a45a8ff	405	* is useless and ignored by the initialization function.
bogdanm	0:9b334a45a8ff	406	* @note If the user resorts to address mark wake up, the address length detection
bogdanm	0:9b334a45a8ff	407	* is configured by default to 4 bits only. For the UART to be able to
bogdanm	0:9b334a45a8ff	408	* manage 6-, 7- or 8-bit long addresses detection, the API
bogdanm	0:9b334a45a8ff	409	* HAL_MultiProcessorEx_AddressLength_Set() must be called after
bogdanm	0:9b334a45a8ff	410	* HAL_MultiProcessor_Init().
bogdanm	0:9b334a45a8ff	411	* @retval HAL status
bogdanm	0:9b334a45a8ff	412	*/
bogdanm	0:9b334a45a8ff	413	HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
bogdanm	0:9b334a45a8ff	414	{
bogdanm	0:9b334a45a8ff	415	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	416	if(huart == NULL)
bogdanm	0:9b334a45a8ff	417	{
bogdanm	0:9b334a45a8ff	418	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	419	}
bogdanm	0:9b334a45a8ff	420
bogdanm	0:9b334a45a8ff	421	/* Check the wake up method parameter */
bogdanm	0:9b334a45a8ff	422	assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
bogdanm	0:9b334a45a8ff	423
bogdanm	0:9b334a45a8ff	424	if(huart->State == HAL_UART_STATE_RESET)
bogdanm	0:9b334a45a8ff	425	{
bogdanm	0:9b334a45a8ff	426	/* Allocate lock resource and initialize it */
bogdanm	0:9b334a45a8ff	427	huart->Lock = HAL_UNLOCKED;
bogdanm	0:9b334a45a8ff	428
bogdanm	0:9b334a45a8ff	429	/* Init the low level hardware : GPIO, CLOCK */
bogdanm	0:9b334a45a8ff	430	HAL_UART_MspInit(huart);
bogdanm	0:9b334a45a8ff	431	}
bogdanm	0:9b334a45a8ff	432
bogdanm	0:9b334a45a8ff	433	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	434
bogdanm	0:9b334a45a8ff	435	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	436	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	437
bogdanm	0:9b334a45a8ff	438	/* Set the UART Communication parameters */
bogdanm	0:9b334a45a8ff	439	if (UART_SetConfig(huart) == HAL_ERROR)
bogdanm	0:9b334a45a8ff	440	{
bogdanm	0:9b334a45a8ff	441	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	442	}
bogdanm	0:9b334a45a8ff	443
bogdanm	0:9b334a45a8ff	444	if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
bogdanm	0:9b334a45a8ff	445	{
bogdanm	0:9b334a45a8ff	446	UART_AdvFeatureConfig(huart);
bogdanm	0:9b334a45a8ff	447	}
bogdanm	0:9b334a45a8ff	448
bogdanm	0:9b334a45a8ff	449	/* In multiprocessor mode, the following bits must be kept cleared:
bogdanm	0:9b334a45a8ff	450	- LINEN and CLKEN bits in the USART_CR2 register,
bogdanm	0:9b334a45a8ff	451	- SCEN, HDSEL and IREN bits in the USART_CR3 register. */
bogdanm	0:9b334a45a8ff	452	huart->Instance->CR2 &= ~(USART_CR2_LINEN \| USART_CR2_CLKEN);
bogdanm	0:9b334a45a8ff	453	huart->Instance->CR3 &= ~(USART_CR3_SCEN \| USART_CR3_HDSEL \| USART_CR3_IREN);
bogdanm	0:9b334a45a8ff	454
bogdanm	0:9b334a45a8ff	455	if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK)
bogdanm	0:9b334a45a8ff	456	{
bogdanm	0:9b334a45a8ff	457	/* If address mark wake up method is chosen, set the USART address node */
bogdanm	0:9b334a45a8ff	458	MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS));
bogdanm	0:9b334a45a8ff	459	}
bogdanm	0:9b334a45a8ff	460
bogdanm	0:9b334a45a8ff	461	/* Set the wake up method by setting the WAKE bit in the CR1 register */
bogdanm	0:9b334a45a8ff	462	MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
bogdanm	0:9b334a45a8ff	463
bogdanm	0:9b334a45a8ff	464	/* Enable the Peripheral */
bogdanm	0:9b334a45a8ff	465	__HAL_UART_ENABLE(huart);
bogdanm	0:9b334a45a8ff	466
bogdanm	0:9b334a45a8ff	467	/* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm	0:9b334a45a8ff	468	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	469	}
bogdanm	0:9b334a45a8ff	470
bogdanm	0:9b334a45a8ff	471	/**
bogdanm	0:9b334a45a8ff	472	* @brief DeInitialize the UART peripheral.
bogdanm	0:9b334a45a8ff	473	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	474	* @retval HAL status
bogdanm	0:9b334a45a8ff	475	*/
bogdanm	0:9b334a45a8ff	476	HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	477	{
bogdanm	0:9b334a45a8ff	478	/* Check the UART handle allocation */
bogdanm	0:9b334a45a8ff	479	if(huart == NULL)
bogdanm	0:9b334a45a8ff	480	{
bogdanm	0:9b334a45a8ff	481	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	482	}
bogdanm	0:9b334a45a8ff	483
bogdanm	0:9b334a45a8ff	484	/* Check the parameters */
bogdanm	0:9b334a45a8ff	485	assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	486
bogdanm	0:9b334a45a8ff	487	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	488
bogdanm	0:9b334a45a8ff	489	/* Disable the Peripheral */
bogdanm	0:9b334a45a8ff	490	__HAL_UART_DISABLE(huart);
bogdanm	0:9b334a45a8ff	491
bogdanm	0:9b334a45a8ff	492	huart->Instance->CR1 = 0x0;
bogdanm	0:9b334a45a8ff	493	huart->Instance->CR2 = 0x0;
bogdanm	0:9b334a45a8ff	494	huart->Instance->CR3 = 0x0;
bogdanm	0:9b334a45a8ff	495
bogdanm	0:9b334a45a8ff	496	/* DeInit the low level hardware */
bogdanm	0:9b334a45a8ff	497	HAL_UART_MspDeInit(huart);
bogdanm	0:9b334a45a8ff	498
bogdanm	0:9b334a45a8ff	499	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	500	huart->State = HAL_UART_STATE_RESET;
bogdanm	0:9b334a45a8ff	501
bogdanm	0:9b334a45a8ff	502	/* Process Unlock */
bogdanm	0:9b334a45a8ff	503	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	504
bogdanm	0:9b334a45a8ff	505	return HAL_OK;
bogdanm	0:9b334a45a8ff	506	}
bogdanm	0:9b334a45a8ff	507
bogdanm	0:9b334a45a8ff	508	/**
bogdanm	0:9b334a45a8ff	509	* @brief Initialize the UART MSP.
bogdanm	0:9b334a45a8ff	510	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	511	* @retval None
bogdanm	0:9b334a45a8ff	512	*/
bogdanm	0:9b334a45a8ff	513	__weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	514	{
bogdanm	0:9b334a45a8ff	515	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	516	the HAL_UART_MspInit can be implemented in the user file
bogdanm	0:9b334a45a8ff	517	*/
bogdanm	0:9b334a45a8ff	518	}
bogdanm	0:9b334a45a8ff	519
bogdanm	0:9b334a45a8ff	520	/**
bogdanm	0:9b334a45a8ff	521	* @brief DeInitialize the UART MSP.
bogdanm	0:9b334a45a8ff	522	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	523	* @retval None
bogdanm	0:9b334a45a8ff	524	*/
bogdanm	0:9b334a45a8ff	525	__weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	526	{
bogdanm	0:9b334a45a8ff	527	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	528	the HAL_UART_MspDeInit can be implemented in the user file
bogdanm	0:9b334a45a8ff	529	*/
bogdanm	0:9b334a45a8ff	530	}
bogdanm	0:9b334a45a8ff	531
bogdanm	0:9b334a45a8ff	532	/**
bogdanm	0:9b334a45a8ff	533	* @}
bogdanm	0:9b334a45a8ff	534	*/
bogdanm	0:9b334a45a8ff	535
bogdanm	0:9b334a45a8ff	536	/** @defgroup UART_Exported_Functions_Group2 IO operation functions
bogdanm	0:9b334a45a8ff	537	* @brief UART Transmit/Receive functions
bogdanm	0:9b334a45a8ff	538	*
bogdanm	0:9b334a45a8ff	539	@verbatim
bogdanm	0:9b334a45a8ff	540	===============================================================================
bogdanm	0:9b334a45a8ff	541	##### IO operation functions #####
bogdanm	0:9b334a45a8ff	542	===============================================================================
bogdanm	0:9b334a45a8ff	543	This subsection provides a set of functions allowing to manage the UART asynchronous
bogdanm	0:9b334a45a8ff	544	and Half duplex data transfers.
bogdanm	0:9b334a45a8ff	545
bogdanm	0:9b334a45a8ff	546	(#) There are two mode of transfer:
bogdanm	0:9b334a45a8ff	547	(+) Blocking mode: The communication is performed in polling mode.
bogdanm	0:9b334a45a8ff	548	The HAL status of all data processing is returned by the same function
bogdanm	0:9b334a45a8ff	549	after finishing transfer.
bogdanm	0:9b334a45a8ff	550	(+) No-Blocking mode: The communication is performed using Interrupts
bogdanm	0:9b334a45a8ff	551	or DMA, These API's return the HAL status.
bogdanm	0:9b334a45a8ff	552	The end of the data processing will be indicated through the
bogdanm	0:9b334a45a8ff	553	dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
bogdanm	0:9b334a45a8ff	554	using DMA mode.
bogdanm	0:9b334a45a8ff	555	The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
bogdanm	0:9b334a45a8ff	556	will be executed respectively at the end of the transmit or Receive process
bogdanm	0:9b334a45a8ff	557	The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected
bogdanm	0:9b334a45a8ff	558
bogdanm	0:9b334a45a8ff	559	(#) Blocking mode API's are :
bogdanm	0:9b334a45a8ff	560	(+) HAL_UART_Transmit()
bogdanm	0:9b334a45a8ff	561	(+) HAL_UART_Receive()
bogdanm	0:9b334a45a8ff	562
bogdanm	0:9b334a45a8ff	563	(#) Non-Blocking mode API's with Interrupt are :
bogdanm	0:9b334a45a8ff	564	(+) HAL_UART_Transmit_IT()
bogdanm	0:9b334a45a8ff	565	(+) HAL_UART_Receive_IT()
bogdanm	0:9b334a45a8ff	566	(+) HAL_UART_IRQHandler()
bogdanm	0:9b334a45a8ff	567
bogdanm	0:9b334a45a8ff	568	(#) No-Blocking mode API's with DMA are :
bogdanm	0:9b334a45a8ff	569	(+) HAL_UART_Transmit_DMA()
bogdanm	0:9b334a45a8ff	570	(+) HAL_UART_Receive_DMA()
bogdanm	0:9b334a45a8ff	571	(+) HAL_UART_DMAPause()
bogdanm	0:9b334a45a8ff	572	(+) HAL_UART_DMAResume()
bogdanm	0:9b334a45a8ff	573	(+) HAL_UART_DMAStop()
bogdanm	0:9b334a45a8ff	574
bogdanm	0:9b334a45a8ff	575	(#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
bogdanm	0:9b334a45a8ff	576	(+) HAL_UART_TxHalfCpltCallback()
bogdanm	0:9b334a45a8ff	577	(+) HAL_UART_TxCpltCallback()
bogdanm	0:9b334a45a8ff	578	(+) HAL_UART_RxHalfCpltCallback()
bogdanm	0:9b334a45a8ff	579	(+) HAL_UART_RxCpltCallback()
bogdanm	0:9b334a45a8ff	580	(+) HAL_UART_ErrorCallback()
bogdanm	0:9b334a45a8ff	581
bogdanm	0:9b334a45a8ff	582
bogdanm	0:9b334a45a8ff	583	-@- In the Half duplex communication, it is forbidden to run the transmit
bogdanm	0:9b334a45a8ff	584	and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful.
bogdanm	0:9b334a45a8ff	585
bogdanm	0:9b334a45a8ff	586	@endverbatim
bogdanm	0:9b334a45a8ff	587	* @{
bogdanm	0:9b334a45a8ff	588	*/
bogdanm	0:9b334a45a8ff	589
bogdanm	0:9b334a45a8ff	590	/**
bogdanm	0:9b334a45a8ff	591	* @brief Send an amount of data in blocking mode.
bogdanm	0:9b334a45a8ff	592	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	593	* @param pData: Pointer to data buffer.
bogdanm	0:9b334a45a8ff	594	* @param Size: Amount of data to be sent.
bogdanm	0:9b334a45a8ff	595	* @param Timeout: Timeout duration.
bogdanm	0:9b334a45a8ff	596	* @retval HAL status
bogdanm	0:9b334a45a8ff	597	*/
bogdanm	0:9b334a45a8ff	598	HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	599	{
bogdanm	0:9b334a45a8ff	600	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	601
bogdanm	0:9b334a45a8ff	602	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_RX))
bogdanm	0:9b334a45a8ff	603	{
bogdanm	0:9b334a45a8ff	604	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	605	{
bogdanm	0:9b334a45a8ff	606	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	607	}
bogdanm	0:9b334a45a8ff	608
bogdanm	0:9b334a45a8ff	609	/* Process Locked */
bogdanm	0:9b334a45a8ff	610	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	611
bogdanm	0:9b334a45a8ff	612	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	613	/* Check if a non-blocking receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	614	if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	615	{
bogdanm	0:9b334a45a8ff	616	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	617	}
bogdanm	0:9b334a45a8ff	618	else
bogdanm	0:9b334a45a8ff	619	{
bogdanm	0:9b334a45a8ff	620	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	621	}
bogdanm	0:9b334a45a8ff	622
bogdanm	0:9b334a45a8ff	623	huart->TxXferSize = Size;
bogdanm	0:9b334a45a8ff	624	huart->TxXferCount = Size;
bogdanm	0:9b334a45a8ff	625	while(huart->TxXferCount > 0)
bogdanm	0:9b334a45a8ff	626	{
bogdanm	0:9b334a45a8ff	627	huart->TxXferCount--;
bogdanm	0:9b334a45a8ff	628	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	629	{
bogdanm	0:9b334a45a8ff	630	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	631	}
bogdanm	0:9b334a45a8ff	632	if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm	0:9b334a45a8ff	633	{
bogdanm	0:9b334a45a8ff	634	tmp = (uint16_t*) pData;
bogdanm	0:9b334a45a8ff	635	huart->Instance->TDR = (*tmp & (uint16_t)0x01FF);
bogdanm	0:9b334a45a8ff	636	pData += 2;
bogdanm	0:9b334a45a8ff	637	}
bogdanm	0:9b334a45a8ff	638	else
bogdanm	0:9b334a45a8ff	639	{
bogdanm	0:9b334a45a8ff	640	huart->Instance->TDR = (*pData++ & (uint8_t)0xFF);
bogdanm	0:9b334a45a8ff	641	}
bogdanm	0:9b334a45a8ff	642	}
bogdanm	0:9b334a45a8ff	643	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	644	{
bogdanm	0:9b334a45a8ff	645	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	646	}
bogdanm	0:9b334a45a8ff	647	/* Check if a non-blocking receive Process is ongoing or not */
bogdanm	0:9b334a45a8ff	648	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	649	{
bogdanm	0:9b334a45a8ff	650	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	651	}
bogdanm	0:9b334a45a8ff	652	else
bogdanm	0:9b334a45a8ff	653	{
bogdanm	0:9b334a45a8ff	654	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	655	}
bogdanm	0:9b334a45a8ff	656
bogdanm	0:9b334a45a8ff	657	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	658	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	659
bogdanm	0:9b334a45a8ff	660	return HAL_OK;
bogdanm	0:9b334a45a8ff	661	}
bogdanm	0:9b334a45a8ff	662	else
bogdanm	0:9b334a45a8ff	663	{
bogdanm	0:9b334a45a8ff	664	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	665	}
bogdanm	0:9b334a45a8ff	666	}
bogdanm	0:9b334a45a8ff	667
bogdanm	0:9b334a45a8ff	668	/**
bogdanm	0:9b334a45a8ff	669	* @brief Receive an amount of data in blocking mode.
bogdanm	0:9b334a45a8ff	670	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	671	* @param pData: pointer to data buffer.
bogdanm	0:9b334a45a8ff	672	* @param Size: amount of data to be received.
bogdanm	0:9b334a45a8ff	673	* @param Timeout: Timeout duration.
bogdanm	0:9b334a45a8ff	674	* @retval HAL status
bogdanm	0:9b334a45a8ff	675	*/
bogdanm	0:9b334a45a8ff	676	HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	677	{
bogdanm	0:9b334a45a8ff	678	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	679	uint16_t uhMask;
bogdanm	0:9b334a45a8ff	680
bogdanm	0:9b334a45a8ff	681	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_TX))
bogdanm	0:9b334a45a8ff	682	{
bogdanm	0:9b334a45a8ff	683	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	684	{
bogdanm	0:9b334a45a8ff	685	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	686	}
bogdanm	0:9b334a45a8ff	687
bogdanm	0:9b334a45a8ff	688	/* Process Locked */
bogdanm	0:9b334a45a8ff	689	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	690
bogdanm	0:9b334a45a8ff	691	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	692	/* Check if a non-blocking transmit process is ongoing or not */
bogdanm	0:9b334a45a8ff	693	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	694	{
bogdanm	0:9b334a45a8ff	695	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	696	}
bogdanm	0:9b334a45a8ff	697	else
bogdanm	0:9b334a45a8ff	698	{
bogdanm	0:9b334a45a8ff	699	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	700	}
bogdanm	0:9b334a45a8ff	701
bogdanm	0:9b334a45a8ff	702	huart->RxXferSize = Size;
bogdanm	0:9b334a45a8ff	703	huart->RxXferCount = Size;
bogdanm	0:9b334a45a8ff	704
bogdanm	0:9b334a45a8ff	705	/* Computation of UART mask to apply to RDR register */
bogdanm	0:9b334a45a8ff	706	UART_MASK_COMPUTATION(huart);
bogdanm	0:9b334a45a8ff	707	uhMask = huart->Mask;
bogdanm	0:9b334a45a8ff	708
bogdanm	0:9b334a45a8ff	709	/* as long as data have to be received */
bogdanm	0:9b334a45a8ff	710	while(huart->RxXferCount > 0)
bogdanm	0:9b334a45a8ff	711	{
bogdanm	0:9b334a45a8ff	712	huart->RxXferCount--;
bogdanm	0:9b334a45a8ff	713	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm	0:9b334a45a8ff	714	{
bogdanm	0:9b334a45a8ff	715	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	716	}
bogdanm	0:9b334a45a8ff	717	if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm	0:9b334a45a8ff	718	{
bogdanm	0:9b334a45a8ff	719	tmp = (uint16_t*) pData ;
bogdanm	0:9b334a45a8ff	720	*tmp = (uint16_t)(huart->Instance->RDR & uhMask);
bogdanm	0:9b334a45a8ff	721	pData +=2;
bogdanm	0:9b334a45a8ff	722	}
bogdanm	0:9b334a45a8ff	723	else
bogdanm	0:9b334a45a8ff	724	{
bogdanm	0:9b334a45a8ff	725	*pData++ = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
bogdanm	0:9b334a45a8ff	726	}
bogdanm	0:9b334a45a8ff	727	}
bogdanm	0:9b334a45a8ff	728
bogdanm	0:9b334a45a8ff	729	/* Check if a non-blocking transmit Process is ongoing or not */
bogdanm	0:9b334a45a8ff	730	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	731	{
bogdanm	0:9b334a45a8ff	732	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	733	}
bogdanm	0:9b334a45a8ff	734	else
bogdanm	0:9b334a45a8ff	735	{
bogdanm	0:9b334a45a8ff	736	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	737	}
bogdanm	0:9b334a45a8ff	738	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	739	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	740
bogdanm	0:9b334a45a8ff	741	return HAL_OK;
bogdanm	0:9b334a45a8ff	742	}
bogdanm	0:9b334a45a8ff	743	else
bogdanm	0:9b334a45a8ff	744	{
bogdanm	0:9b334a45a8ff	745	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	746	}
bogdanm	0:9b334a45a8ff	747	}
bogdanm	0:9b334a45a8ff	748
bogdanm	0:9b334a45a8ff	749	/**
bogdanm	0:9b334a45a8ff	750	* @brief Send an amount of data in interrupt mode.
bogdanm	0:9b334a45a8ff	751	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	752	* @param pData: pointer to data buffer.
bogdanm	0:9b334a45a8ff	753	* @param Size: amount of data to be sent.
bogdanm	0:9b334a45a8ff	754	* @retval HAL status
bogdanm	0:9b334a45a8ff	755	*/
bogdanm	0:9b334a45a8ff	756	HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	757	{
bogdanm	0:9b334a45a8ff	758	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_RX))
bogdanm	0:9b334a45a8ff	759	{
bogdanm	0:9b334a45a8ff	760	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	761	{
bogdanm	0:9b334a45a8ff	762	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	763	}
bogdanm	0:9b334a45a8ff	764
bogdanm	0:9b334a45a8ff	765	/* Process Locked */
bogdanm	0:9b334a45a8ff	766	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	767
bogdanm	0:9b334a45a8ff	768	huart->pTxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	769	huart->TxXferSize = Size;
bogdanm	0:9b334a45a8ff	770	huart->TxXferCount = Size;
bogdanm	0:9b334a45a8ff	771
bogdanm	0:9b334a45a8ff	772	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	773	/* Check if a receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	774	if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	775	{
bogdanm	0:9b334a45a8ff	776	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	777	}
bogdanm	0:9b334a45a8ff	778	else
bogdanm	0:9b334a45a8ff	779	{
bogdanm	0:9b334a45a8ff	780	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	781	}
bogdanm	0:9b334a45a8ff	782
bogdanm	0:9b334a45a8ff	783	/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm	0:9b334a45a8ff	784	__HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	785
bogdanm	0:9b334a45a8ff	786	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	787	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	788
bogdanm	0:9b334a45a8ff	789	/* Enable the UART Transmit Data Register Empty Interrupt */
bogdanm	0:9b334a45a8ff	790	__HAL_UART_ENABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	791
bogdanm	0:9b334a45a8ff	792	return HAL_OK;
bogdanm	0:9b334a45a8ff	793	}
bogdanm	0:9b334a45a8ff	794	else
bogdanm	0:9b334a45a8ff	795	{
bogdanm	0:9b334a45a8ff	796	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	797	}
bogdanm	0:9b334a45a8ff	798	}
bogdanm	0:9b334a45a8ff	799
bogdanm	0:9b334a45a8ff	800	/**
bogdanm	0:9b334a45a8ff	801	* @brief Receive an amount of data in interrupt mode.
bogdanm	0:9b334a45a8ff	802	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	803	* @param pData: pointer to data buffer.
bogdanm	0:9b334a45a8ff	804	* @param Size: amount of data to be received.
bogdanm	0:9b334a45a8ff	805	* @retval HAL status
bogdanm	0:9b334a45a8ff	806	*/
bogdanm	0:9b334a45a8ff	807	HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	808	{
bogdanm	0:9b334a45a8ff	809	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_TX))
bogdanm	0:9b334a45a8ff	810	{
bogdanm	0:9b334a45a8ff	811	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	812	{
bogdanm	0:9b334a45a8ff	813	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	814	}
bogdanm	0:9b334a45a8ff	815
bogdanm	0:9b334a45a8ff	816	/* Process Locked */
bogdanm	0:9b334a45a8ff	817	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	818
bogdanm	0:9b334a45a8ff	819	huart->pRxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	820	huart->RxXferSize = Size;
bogdanm	0:9b334a45a8ff	821	huart->RxXferCount = Size;
bogdanm	0:9b334a45a8ff	822
bogdanm	0:9b334a45a8ff	823	/* Computation of UART mask to apply to RDR register */
bogdanm	0:9b334a45a8ff	824	UART_MASK_COMPUTATION(huart);
bogdanm	0:9b334a45a8ff	825
bogdanm	0:9b334a45a8ff	826	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	827	/* Check if a transmit process is ongoing or not */
bogdanm	0:9b334a45a8ff	828	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	829	{
bogdanm	0:9b334a45a8ff	830	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	831	}
bogdanm	0:9b334a45a8ff	832	else
bogdanm	0:9b334a45a8ff	833	{
bogdanm	0:9b334a45a8ff	834	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	835	}
bogdanm	0:9b334a45a8ff	836
bogdanm	0:9b334a45a8ff	837	/* Enable the UART Parity Error Interrupt */
bogdanm	0:9b334a45a8ff	838	__HAL_UART_ENABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	839
bogdanm	0:9b334a45a8ff	840	/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm	0:9b334a45a8ff	841	__HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	842
bogdanm	0:9b334a45a8ff	843	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	844	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	845
bogdanm	0:9b334a45a8ff	846	/* Enable the UART Data Register not empty Interrupt */
bogdanm	0:9b334a45a8ff	847	__HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	848
bogdanm	0:9b334a45a8ff	849	return HAL_OK;
bogdanm	0:9b334a45a8ff	850	}
bogdanm	0:9b334a45a8ff	851	else
bogdanm	0:9b334a45a8ff	852	{
bogdanm	0:9b334a45a8ff	853	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	854	}
bogdanm	0:9b334a45a8ff	855	}
bogdanm	0:9b334a45a8ff	856
bogdanm	0:9b334a45a8ff	857	/**
bogdanm	0:9b334a45a8ff	858	* @brief Send an amount of data in DMA mode.
bogdanm	0:9b334a45a8ff	859	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	860	* @param pData: pointer to data buffer.
bogdanm	0:9b334a45a8ff	861	* @param Size: amount of data to be sent.
bogdanm	0:9b334a45a8ff	862	* @retval HAL status
bogdanm	0:9b334a45a8ff	863	*/
bogdanm	0:9b334a45a8ff	864	HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	865	{
bogdanm	0:9b334a45a8ff	866	uint32_t *tmp;
bogdanm	0:9b334a45a8ff	867
bogdanm	0:9b334a45a8ff	868	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_RX))
bogdanm	0:9b334a45a8ff	869	{
bogdanm	0:9b334a45a8ff	870	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	871	{
bogdanm	0:9b334a45a8ff	872	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	873	}
bogdanm	0:9b334a45a8ff	874
bogdanm	0:9b334a45a8ff	875	/* Process Locked */
bogdanm	0:9b334a45a8ff	876	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	877
bogdanm	0:9b334a45a8ff	878	huart->pTxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	879	huart->TxXferSize = Size;
bogdanm	0:9b334a45a8ff	880	huart->TxXferCount = Size;
bogdanm	0:9b334a45a8ff	881
bogdanm	0:9b334a45a8ff	882	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	883	/* Check if a receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	884	if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	885	{
bogdanm	0:9b334a45a8ff	886	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	887	}
bogdanm	0:9b334a45a8ff	888	else
bogdanm	0:9b334a45a8ff	889	{
bogdanm	0:9b334a45a8ff	890	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	891	}
bogdanm	0:9b334a45a8ff	892
bogdanm	0:9b334a45a8ff	893	/* Set the UART DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	894	huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
bogdanm	0:9b334a45a8ff	895
bogdanm	0:9b334a45a8ff	896	/* Set the UART DMA Half transfer complete callback */
bogdanm	0:9b334a45a8ff	897	huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
bogdanm	0:9b334a45a8ff	898
bogdanm	0:9b334a45a8ff	899	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	900	huart->hdmatx->XferErrorCallback = UART_DMAError;
bogdanm	0:9b334a45a8ff	901
bogdanm	0:9b334a45a8ff	902	/* Enable the UART transmit DMA channel */
bogdanm	0:9b334a45a8ff	903	tmp = (uint32_t*)&pData;
bogdanm	0:9b334a45a8ff	904	HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)tmp, (uint32_t)&huart->Instance->TDR, Size);
bogdanm	0:9b334a45a8ff	905
bogdanm	0:9b334a45a8ff	906	/* Clear the TC flag in the ICR register */
bogdanm	0:9b334a45a8ff	907	__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
bogdanm	0:9b334a45a8ff	908
bogdanm	0:9b334a45a8ff	909	/* Enable the DMA transfer for transmit request by setting the DMAT bit
bogdanm	0:9b334a45a8ff	910	in the UART CR3 register */
bogdanm	0:9b334a45a8ff	911	huart->Instance->CR3 \|= USART_CR3_DMAT;
bogdanm	0:9b334a45a8ff	912
bogdanm	0:9b334a45a8ff	913	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	914	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	915
bogdanm	0:9b334a45a8ff	916	return HAL_OK;
bogdanm	0:9b334a45a8ff	917	}
bogdanm	0:9b334a45a8ff	918	else
bogdanm	0:9b334a45a8ff	919	{
bogdanm	0:9b334a45a8ff	920	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	921	}
bogdanm	0:9b334a45a8ff	922	}
bogdanm	0:9b334a45a8ff	923
bogdanm	0:9b334a45a8ff	924	/**
bogdanm	0:9b334a45a8ff	925	* @brief Receive an amount of data in DMA mode.
bogdanm	0:9b334a45a8ff	926	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	927	* @param pData: pointer to data buffer.
bogdanm	0:9b334a45a8ff	928	* @param Size: amount of data to be received.
bogdanm	0:9b334a45a8ff	929	* @note When the UART parity is enabled (PCE = 1), the received data contain
bogdanm	0:9b334a45a8ff	930	* the parity bit (MSB position).
bogdanm	0:9b334a45a8ff	931	* @retval HAL status
bogdanm	0:9b334a45a8ff	932	*/
bogdanm	0:9b334a45a8ff	933	HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
bogdanm	0:9b334a45a8ff	934	{
bogdanm	0:9b334a45a8ff	935	uint32_t *tmp;
bogdanm	0:9b334a45a8ff	936
bogdanm	0:9b334a45a8ff	937	if((huart->State == HAL_UART_STATE_READY) \|\| (huart->State == HAL_UART_STATE_BUSY_TX))
bogdanm	0:9b334a45a8ff	938	{
bogdanm	0:9b334a45a8ff	939	if((pData == NULL ) \|\| (Size == 0))
bogdanm	0:9b334a45a8ff	940	{
bogdanm	0:9b334a45a8ff	941	return HAL_ERROR;
bogdanm	0:9b334a45a8ff	942	}
bogdanm	0:9b334a45a8ff	943
bogdanm	0:9b334a45a8ff	944	/* Process Locked */
bogdanm	0:9b334a45a8ff	945	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	946
bogdanm	0:9b334a45a8ff	947	huart->pRxBuffPtr = pData;
bogdanm	0:9b334a45a8ff	948	huart->RxXferSize = Size;
bogdanm	0:9b334a45a8ff	949
bogdanm	0:9b334a45a8ff	950	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	951	/* Check if a transmit process is ongoing or not */
bogdanm	0:9b334a45a8ff	952	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	953	{
bogdanm	0:9b334a45a8ff	954	huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm	0:9b334a45a8ff	955	}
bogdanm	0:9b334a45a8ff	956	else
bogdanm	0:9b334a45a8ff	957	{
bogdanm	0:9b334a45a8ff	958	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	959	}
bogdanm	0:9b334a45a8ff	960
bogdanm	0:9b334a45a8ff	961	/* Set the UART DMA transfer complete callback */
bogdanm	0:9b334a45a8ff	962	huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
bogdanm	0:9b334a45a8ff	963
bogdanm	0:9b334a45a8ff	964	/* Set the UART DMA Half transfer complete callback */
bogdanm	0:9b334a45a8ff	965	huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
bogdanm	0:9b334a45a8ff	966
bogdanm	0:9b334a45a8ff	967	/* Set the DMA error callback */
bogdanm	0:9b334a45a8ff	968	huart->hdmarx->XferErrorCallback = UART_DMAError;
bogdanm	0:9b334a45a8ff	969
bogdanm	0:9b334a45a8ff	970	/* Enable the DMA channel */
bogdanm	0:9b334a45a8ff	971	tmp = (uint32_t*)&pData;
bogdanm	0:9b334a45a8ff	972	HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)tmp, Size);
bogdanm	0:9b334a45a8ff	973
bogdanm	0:9b334a45a8ff	974	/* Enable the DMA transfer for the receiver request by setting the DMAR bit
bogdanm	0:9b334a45a8ff	975	in the UART CR3 register */
bogdanm	0:9b334a45a8ff	976	huart->Instance->CR3 \|= USART_CR3_DMAR;
bogdanm	0:9b334a45a8ff	977
bogdanm	0:9b334a45a8ff	978	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	979	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	980
bogdanm	0:9b334a45a8ff	981	return HAL_OK;
bogdanm	0:9b334a45a8ff	982	}
bogdanm	0:9b334a45a8ff	983	else
bogdanm	0:9b334a45a8ff	984	{
bogdanm	0:9b334a45a8ff	985	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	986	}
bogdanm	0:9b334a45a8ff	987	}
bogdanm	0:9b334a45a8ff	988
bogdanm	0:9b334a45a8ff	989	/**
bogdanm	0:9b334a45a8ff	990	* @brief Pause the DMA Transfer.
bogdanm	0:9b334a45a8ff	991	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	992	* @retval HAL status
bogdanm	0:9b334a45a8ff	993	*/
bogdanm	0:9b334a45a8ff	994	HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	995	{
bogdanm	0:9b334a45a8ff	996	/* Process Locked */
bogdanm	0:9b334a45a8ff	997	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	998
bogdanm	0:9b334a45a8ff	999	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	1000	{
bogdanm	0:9b334a45a8ff	1001	/* Disable the UART DMA Tx request */
bogdanm	0:9b334a45a8ff	1002	huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT);
bogdanm	0:9b334a45a8ff	1003	}
bogdanm	0:9b334a45a8ff	1004	else if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	1005	{
bogdanm	0:9b334a45a8ff	1006	/* Disable the UART DMA Rx request */
bogdanm	0:9b334a45a8ff	1007	huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR);
bogdanm	0:9b334a45a8ff	1008	}
bogdanm	0:9b334a45a8ff	1009	else if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1010	{
bogdanm	0:9b334a45a8ff	1011	/* Disable the UART DMA Tx request */
bogdanm	0:9b334a45a8ff	1012	huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT);
bogdanm	0:9b334a45a8ff	1013	/* Disable the UART DMA Rx request */
bogdanm	0:9b334a45a8ff	1014	huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR);
bogdanm	0:9b334a45a8ff	1015	}
bogdanm	0:9b334a45a8ff	1016
bogdanm	0:9b334a45a8ff	1017	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1018	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1019
bogdanm	0:9b334a45a8ff	1020	return HAL_OK;
bogdanm	0:9b334a45a8ff	1021	}
bogdanm	0:9b334a45a8ff	1022
bogdanm	0:9b334a45a8ff	1023	/**
bogdanm	0:9b334a45a8ff	1024	* @brief Resume the DMA Transfer.
bogdanm	0:9b334a45a8ff	1025	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1026	* @retval HAL status
bogdanm	0:9b334a45a8ff	1027	*/
bogdanm	0:9b334a45a8ff	1028	HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1029	{
bogdanm	0:9b334a45a8ff	1030	/* Process Locked */
bogdanm	0:9b334a45a8ff	1031	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1032
bogdanm	0:9b334a45a8ff	1033	if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm	0:9b334a45a8ff	1034	{
bogdanm	0:9b334a45a8ff	1035	/* Enable the UART DMA Tx request */
bogdanm	0:9b334a45a8ff	1036	huart->Instance->CR3 \|= USART_CR3_DMAT;
bogdanm	0:9b334a45a8ff	1037	}
bogdanm	0:9b334a45a8ff	1038	else if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm	0:9b334a45a8ff	1039	{
bogdanm	0:9b334a45a8ff	1040	/* Clear the Overrun flag before resumming the Rx transfer*/
bogdanm	0:9b334a45a8ff	1041	__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
bogdanm	0:9b334a45a8ff	1042
bogdanm	0:9b334a45a8ff	1043	/* Enable the UART DMA Rx request */
bogdanm	0:9b334a45a8ff	1044	huart->Instance->CR3 \|= USART_CR3_DMAR;
bogdanm	0:9b334a45a8ff	1045	}
bogdanm	0:9b334a45a8ff	1046	else if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1047	{
bogdanm	0:9b334a45a8ff	1048	/* Clear the Overrun flag before resumming the Rx transfer*/
bogdanm	0:9b334a45a8ff	1049	__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
bogdanm	0:9b334a45a8ff	1050
bogdanm	0:9b334a45a8ff	1051	/* Enable the UART DMA Rx request before the DMA Tx request */
bogdanm	0:9b334a45a8ff	1052	huart->Instance->CR3 \|= USART_CR3_DMAR;
bogdanm	0:9b334a45a8ff	1053
bogdanm	0:9b334a45a8ff	1054	/* Enable the UART DMA Tx request */
bogdanm	0:9b334a45a8ff	1055	huart->Instance->CR3 \|= USART_CR3_DMAT;
bogdanm	0:9b334a45a8ff	1056	}
bogdanm	0:9b334a45a8ff	1057
bogdanm	0:9b334a45a8ff	1058	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1059	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1060
bogdanm	0:9b334a45a8ff	1061	return HAL_OK;
bogdanm	0:9b334a45a8ff	1062	}
bogdanm	0:9b334a45a8ff	1063
bogdanm	0:9b334a45a8ff	1064	/**
bogdanm	0:9b334a45a8ff	1065	* @brief Stop the DMA Transfer.
bogdanm	0:9b334a45a8ff	1066	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1067	* @retval HAL status
bogdanm	0:9b334a45a8ff	1068	*/
bogdanm	0:9b334a45a8ff	1069	HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1070	{
bogdanm	0:9b334a45a8ff	1071	/* The Lock is not implemented on this API to allow the user application
bogdanm	0:9b334a45a8ff	1072	to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() /
bogdanm	0:9b334a45a8ff	1073	HAL_UART_TxHalfCpltCallback() / HAL_UART_RxHalfCpltCallback ():
bogdanm	0:9b334a45a8ff	1074	indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete interrupt is
bogdanm	0:9b334a45a8ff	1075	generated if the DMA transfer interruption occurs at the middle or at the end of the stream
bogdanm	0:9b334a45a8ff	1076	and the corresponding call back is executed.
bogdanm	0:9b334a45a8ff	1077	*/
bogdanm	0:9b334a45a8ff	1078
bogdanm	0:9b334a45a8ff	1079	/* Disable the UART Tx/Rx DMA requests */
bogdanm	0:9b334a45a8ff	1080	huart->Instance->CR3 &= ~USART_CR3_DMAT;
bogdanm	0:9b334a45a8ff	1081	huart->Instance->CR3 &= ~USART_CR3_DMAR;
bogdanm	0:9b334a45a8ff	1082
bogdanm	0:9b334a45a8ff	1083	/* Abort the UART DMA tx channel */
bogdanm	0:9b334a45a8ff	1084	if(huart->hdmatx != NULL)
bogdanm	0:9b334a45a8ff	1085	{
bogdanm	0:9b334a45a8ff	1086	HAL_DMA_Abort(huart->hdmatx);
bogdanm	0:9b334a45a8ff	1087	}
bogdanm	0:9b334a45a8ff	1088	/* Abort the UART DMA rx channel */
bogdanm	0:9b334a45a8ff	1089	if(huart->hdmarx != NULL)
bogdanm	0:9b334a45a8ff	1090	{
bogdanm	0:9b334a45a8ff	1091	HAL_DMA_Abort(huart->hdmarx);
bogdanm	0:9b334a45a8ff	1092	}
bogdanm	0:9b334a45a8ff	1093
bogdanm	0:9b334a45a8ff	1094	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1095
bogdanm	0:9b334a45a8ff	1096	return HAL_OK;
bogdanm	0:9b334a45a8ff	1097	}
bogdanm	0:9b334a45a8ff	1098
bogdanm	0:9b334a45a8ff	1099	/**
bogdanm	0:9b334a45a8ff	1100	* @brief Tx Transfer completed callback.
bogdanm	0:9b334a45a8ff	1101	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1102	* @retval None
bogdanm	0:9b334a45a8ff	1103	*/
bogdanm	0:9b334a45a8ff	1104	__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1105	{
bogdanm	0:9b334a45a8ff	1106	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1107	the HAL_UART_TxCpltCallback can be implemented in the user file.
bogdanm	0:9b334a45a8ff	1108	*/
bogdanm	0:9b334a45a8ff	1109	}
bogdanm	0:9b334a45a8ff	1110
bogdanm	0:9b334a45a8ff	1111	/**
bogdanm	0:9b334a45a8ff	1112	* @brief Tx Half Transfer completed callback.
bogdanm	0:9b334a45a8ff	1113	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1114	* @retval None
bogdanm	0:9b334a45a8ff	1115	*/
bogdanm	0:9b334a45a8ff	1116	__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1117	{
bogdanm	0:9b334a45a8ff	1118	/* NOTE: This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1119	the HAL_UART_TxHalfCpltCallback can be implemented in the user file.
bogdanm	0:9b334a45a8ff	1120	*/
bogdanm	0:9b334a45a8ff	1121	}
bogdanm	0:9b334a45a8ff	1122
bogdanm	0:9b334a45a8ff	1123	/**
bogdanm	0:9b334a45a8ff	1124	* @brief Rx Transfer completed callback.
bogdanm	0:9b334a45a8ff	1125	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1126	* @retval None
bogdanm	0:9b334a45a8ff	1127	*/
bogdanm	0:9b334a45a8ff	1128	__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1129	{
bogdanm	0:9b334a45a8ff	1130	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1131	the HAL_UART_RxCpltCallback can be implemented in the user file.
bogdanm	0:9b334a45a8ff	1132	*/
bogdanm	0:9b334a45a8ff	1133	}
bogdanm	0:9b334a45a8ff	1134
bogdanm	0:9b334a45a8ff	1135	/**
bogdanm	0:9b334a45a8ff	1136	* @brief Rx Half Transfer completed callback.
bogdanm	0:9b334a45a8ff	1137	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1138	* @retval None
bogdanm	0:9b334a45a8ff	1139	*/
bogdanm	0:9b334a45a8ff	1140	__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1141	{
bogdanm	0:9b334a45a8ff	1142	/* NOTE: This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1143	the HAL_UART_RxHalfCpltCallback can be implemented in the user file.
bogdanm	0:9b334a45a8ff	1144	*/
bogdanm	0:9b334a45a8ff	1145	}
bogdanm	0:9b334a45a8ff	1146
bogdanm	0:9b334a45a8ff	1147	/**
bogdanm	0:9b334a45a8ff	1148	* @brief UART error callback.
bogdanm	0:9b334a45a8ff	1149	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1150	* @retval None
bogdanm	0:9b334a45a8ff	1151	*/
bogdanm	0:9b334a45a8ff	1152	__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1153	{
bogdanm	0:9b334a45a8ff	1154	/* NOTE : This function should not be modified, when the callback is needed,
bogdanm	0:9b334a45a8ff	1155	the HAL_UART_ErrorCallback can be implemented in the user file.
bogdanm	0:9b334a45a8ff	1156	*/
bogdanm	0:9b334a45a8ff	1157	}
bogdanm	0:9b334a45a8ff	1158
bogdanm	0:9b334a45a8ff	1159	/**
bogdanm	0:9b334a45a8ff	1160	* @}
bogdanm	0:9b334a45a8ff	1161	*/
bogdanm	0:9b334a45a8ff	1162
bogdanm	0:9b334a45a8ff	1163	/** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
bogdanm	0:9b334a45a8ff	1164	* @brief UART control functions
bogdanm	0:9b334a45a8ff	1165	*
bogdanm	0:9b334a45a8ff	1166	@verbatim
bogdanm	0:9b334a45a8ff	1167	===============================================================================
bogdanm	0:9b334a45a8ff	1168	##### Peripheral Control functions #####
bogdanm	0:9b334a45a8ff	1169	===============================================================================
bogdanm	0:9b334a45a8ff	1170	[..]
bogdanm	0:9b334a45a8ff	1171	This subsection provides a set of functions allowing to control the UART.
bogdanm	0:9b334a45a8ff	1172	(+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode
bogdanm	0:9b334a45a8ff	1173	(+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode
bogdanm	0:9b334a45a8ff	1174	(+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode
bogdanm	0:9b334a45a8ff	1175	(+) HAL_HalfDuplex_EnableTransmitter() API disables receiver and enables transmitter
bogdanm	0:9b334a45a8ff	1176	(+) HAL_HalfDuplex_EnableReceiver() API disables transmitter and enables receiver
bogdanm	0:9b334a45a8ff	1177	@endverbatim
bogdanm	0:9b334a45a8ff	1178	* @{
bogdanm	0:9b334a45a8ff	1179	*/
bogdanm	0:9b334a45a8ff	1180
bogdanm	0:9b334a45a8ff	1181	/**
bogdanm	0:9b334a45a8ff	1182	* @brief Enable UART in mute mode (does not mean UART enters mute mode;
bogdanm	0:9b334a45a8ff	1183	* to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called).
bogdanm	0:9b334a45a8ff	1184	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1185	* @retval HAL status
bogdanm	0:9b334a45a8ff	1186	*/
bogdanm	0:9b334a45a8ff	1187	HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1188	{
bogdanm	0:9b334a45a8ff	1189	/* Process Locked */
bogdanm	0:9b334a45a8ff	1190	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1191
bogdanm	0:9b334a45a8ff	1192	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1193
bogdanm	0:9b334a45a8ff	1194	/* Enable USART mute mode by setting the MME bit in the CR1 register */
bogdanm	0:9b334a45a8ff	1195	huart->Instance->CR1 \|= USART_CR1_MME;
bogdanm	0:9b334a45a8ff	1196
bogdanm	0:9b334a45a8ff	1197	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1198
bogdanm	0:9b334a45a8ff	1199	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	1200	}
bogdanm	0:9b334a45a8ff	1201
bogdanm	0:9b334a45a8ff	1202	/**
bogdanm	0:9b334a45a8ff	1203	* @brief Disable UART mute mode (does not mean the UART actually exits mute mode
bogdanm	0:9b334a45a8ff	1204	* as it may not have been in mute mode at this very moment).
bogdanm	0:9b334a45a8ff	1205	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1206	* @retval HAL status
bogdanm	0:9b334a45a8ff	1207	*/
bogdanm	0:9b334a45a8ff	1208	HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1209	{
bogdanm	0:9b334a45a8ff	1210	/* Process Locked */
bogdanm	0:9b334a45a8ff	1211	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1212
bogdanm	0:9b334a45a8ff	1213	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1214
bogdanm	0:9b334a45a8ff	1215	/* Disable USART mute mode by clearing the MME bit in the CR1 register */
bogdanm	0:9b334a45a8ff	1216	huart->Instance->CR1 &= ~(USART_CR1_MME);
bogdanm	0:9b334a45a8ff	1217
bogdanm	0:9b334a45a8ff	1218	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1219
bogdanm	0:9b334a45a8ff	1220	return (UART_CheckIdleState(huart));
bogdanm	0:9b334a45a8ff	1221	}
bogdanm	0:9b334a45a8ff	1222
bogdanm	0:9b334a45a8ff	1223	/**
bogdanm	0:9b334a45a8ff	1224	* @brief Enter UART mute mode (means UART actually enters mute mode).
bogdanm	0:9b334a45a8ff	1225	* @note To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called.
bogdanm	0:9b334a45a8ff	1226	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1227	* @retval None
bogdanm	0:9b334a45a8ff	1228	*/
bogdanm	0:9b334a45a8ff	1229	void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1230	{
bogdanm	0:9b334a45a8ff	1231	__HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST);
bogdanm	0:9b334a45a8ff	1232	}
bogdanm	0:9b334a45a8ff	1233
bogdanm	0:9b334a45a8ff	1234	/**
bogdanm	0:9b334a45a8ff	1235	* @brief Enable the UART transmitter and disable the UART receiver.
bogdanm	0:9b334a45a8ff	1236	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1237	* @retval HAL status
bogdanm	0:9b334a45a8ff	1238	*/
bogdanm	0:9b334a45a8ff	1239	HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1240	{
bogdanm	0:9b334a45a8ff	1241	/* Process Locked */
bogdanm	0:9b334a45a8ff	1242	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1243	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1244
bogdanm	0:9b334a45a8ff	1245	/* Clear TE and RE bits */
bogdanm	0:9b334a45a8ff	1246	CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE \| USART_CR1_RE));
bogdanm	0:9b334a45a8ff	1247	/* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
bogdanm	0:9b334a45a8ff	1248	SET_BIT(huart->Instance->CR1, USART_CR1_TE);
bogdanm	0:9b334a45a8ff	1249
bogdanm	0:9b334a45a8ff	1250	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1251
bogdanm	0:9b334a45a8ff	1252	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1253	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1254
bogdanm	0:9b334a45a8ff	1255	return HAL_OK;
bogdanm	0:9b334a45a8ff	1256	}
bogdanm	0:9b334a45a8ff	1257
bogdanm	0:9b334a45a8ff	1258	/**
bogdanm	0:9b334a45a8ff	1259	* @brief Enable the UART receiver and disable the UART transmitter.
bogdanm	0:9b334a45a8ff	1260	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1261	* @retval HAL status.
bogdanm	0:9b334a45a8ff	1262	*/
bogdanm	0:9b334a45a8ff	1263	HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1264	{
bogdanm	0:9b334a45a8ff	1265	/* Process Locked */
bogdanm	0:9b334a45a8ff	1266	__HAL_LOCK(huart);
bogdanm	0:9b334a45a8ff	1267	huart->State = HAL_UART_STATE_BUSY;
bogdanm	0:9b334a45a8ff	1268
bogdanm	0:9b334a45a8ff	1269	/* Clear TE and RE bits */
bogdanm	0:9b334a45a8ff	1270	CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE \| USART_CR1_RE));
bogdanm	0:9b334a45a8ff	1271	/* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
bogdanm	0:9b334a45a8ff	1272	SET_BIT(huart->Instance->CR1, USART_CR1_RE);
bogdanm	0:9b334a45a8ff	1273
bogdanm	0:9b334a45a8ff	1274	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1275	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1276	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1277
bogdanm	0:9b334a45a8ff	1278	return HAL_OK;
bogdanm	0:9b334a45a8ff	1279	}
bogdanm	0:9b334a45a8ff	1280
bogdanm	0:9b334a45a8ff	1281	/**
bogdanm	0:9b334a45a8ff	1282	* @}
bogdanm	0:9b334a45a8ff	1283	*/
bogdanm	0:9b334a45a8ff	1284
bogdanm	0:9b334a45a8ff	1285	/** @defgroup UART_Exported_Functions_Group4 Peripheral State and Error functions
bogdanm	0:9b334a45a8ff	1286	* @brief UART Peripheral State functions
bogdanm	0:9b334a45a8ff	1287	*
bogdanm	0:9b334a45a8ff	1288	@verbatim
bogdanm	0:9b334a45a8ff	1289	==============================================================================
bogdanm	0:9b334a45a8ff	1290	##### Peripheral State and Error functions #####
bogdanm	0:9b334a45a8ff	1291	==============================================================================
bogdanm	0:9b334a45a8ff	1292	[..]
bogdanm	0:9b334a45a8ff	1293	This subsection provides functions allowing to :
bogdanm	0:9b334a45a8ff	1294	(+) Return the UART handle state.
bogdanm	0:9b334a45a8ff	1295	(+) Return the UART handle error code
bogdanm	0:9b334a45a8ff	1296
bogdanm	0:9b334a45a8ff	1297	@endverbatim
bogdanm	0:9b334a45a8ff	1298	* @{
bogdanm	0:9b334a45a8ff	1299	*/
bogdanm	0:9b334a45a8ff	1300
bogdanm	0:9b334a45a8ff	1301	/**
bogdanm	0:9b334a45a8ff	1302	* @brief Return the UART handle state.
bogdanm	0:9b334a45a8ff	1303	* @param huart : pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1304	* the configuration information for the specified UART.
bogdanm	0:9b334a45a8ff	1305	* @retval HAL state
bogdanm	0:9b334a45a8ff	1306	*/
bogdanm	0:9b334a45a8ff	1307	HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1308	{
bogdanm	0:9b334a45a8ff	1309	return huart->State;
bogdanm	0:9b334a45a8ff	1310	}
bogdanm	0:9b334a45a8ff	1311
bogdanm	0:9b334a45a8ff	1312	/**
bogdanm	0:9b334a45a8ff	1313	* @brief Return the UART handle error code.
bogdanm	0:9b334a45a8ff	1314	* @param huart : pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1315	* the configuration information for the specified UART.
bogdanm	0:9b334a45a8ff	1316	* @retval UART Error Code
bogdanm	0:9b334a45a8ff	1317	*/
bogdanm	0:9b334a45a8ff	1318	uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1319	{
bogdanm	0:9b334a45a8ff	1320	return huart->ErrorCode;
bogdanm	0:9b334a45a8ff	1321	}
bogdanm	0:9b334a45a8ff	1322	/**
bogdanm	0:9b334a45a8ff	1323	* @}
bogdanm	0:9b334a45a8ff	1324	*/
bogdanm	0:9b334a45a8ff	1325
bogdanm	0:9b334a45a8ff	1326	/**
bogdanm	0:9b334a45a8ff	1327	* @}
bogdanm	0:9b334a45a8ff	1328	*/
bogdanm	0:9b334a45a8ff	1329
bogdanm	0:9b334a45a8ff	1330	/** @defgroup UART_Private_Functions UART Private Functions
bogdanm	0:9b334a45a8ff	1331	* @{
bogdanm	0:9b334a45a8ff	1332	*/
bogdanm	0:9b334a45a8ff	1333
bogdanm	0:9b334a45a8ff	1334	/**
bogdanm	0:9b334a45a8ff	1335	* @brief Configure the UART peripheral.
bogdanm	0:9b334a45a8ff	1336	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1337	* @retval HAL status
bogdanm	0:9b334a45a8ff	1338	*/
bogdanm	0:9b334a45a8ff	1339	HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1340	{
bogdanm	0:9b334a45a8ff	1341	uint32_t tmpreg = 0x00000000;
bogdanm	0:9b334a45a8ff	1342	UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED;
bogdanm	0:9b334a45a8ff	1343	uint16_t brrtemp = 0x0000;
bogdanm	0:9b334a45a8ff	1344	uint16_t usartdiv = 0x0000;
bogdanm	0:9b334a45a8ff	1345	HAL_StatusTypeDef ret = HAL_OK;
bogdanm	0:9b334a45a8ff	1346
bogdanm	0:9b334a45a8ff	1347	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1348	assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1349	assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
bogdanm	0:9b334a45a8ff	1350	assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
bogdanm	0:9b334a45a8ff	1351	assert_param(IS_UART_PARITY(huart->Init.Parity));
bogdanm	0:9b334a45a8ff	1352	assert_param(IS_UART_MODE(huart->Init.Mode));
bogdanm	0:9b334a45a8ff	1353	assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
bogdanm	0:9b334a45a8ff	1354	assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling));
bogdanm	0:9b334a45a8ff	1355	assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
bogdanm	0:9b334a45a8ff	1356
bogdanm	0:9b334a45a8ff	1357
bogdanm	0:9b334a45a8ff	1358	/-------------------------- USART CR1 Configuration -----------------------/
bogdanm	0:9b334a45a8ff	1359	/* Clear M, PCE, PS, TE, RE and OVER8 bits and configure
bogdanm	0:9b334a45a8ff	1360	* the UART Word Length, Parity, Mode and oversampling:
bogdanm	0:9b334a45a8ff	1361	* set the M bits according to huart->Init.WordLength value
bogdanm	0:9b334a45a8ff	1362	* set PCE and PS bits according to huart->Init.Parity value
bogdanm	0:9b334a45a8ff	1363	* set TE and RE bits according to huart->Init.Mode value
bogdanm	0:9b334a45a8ff	1364	* set OVER8 bit according to huart->Init.OverSampling value */
bogdanm	0:9b334a45a8ff	1365	tmpreg = (uint32_t)huart->Init.WordLength \| huart->Init.Parity \| huart->Init.Mode \| huart->Init.OverSampling ;
bogdanm	0:9b334a45a8ff	1366	MODIFY_REG(huart->Instance->CR1, UART_CR1_FIELDS, tmpreg);
bogdanm	0:9b334a45a8ff	1367
bogdanm	0:9b334a45a8ff	1368	/-------------------------- USART CR2 Configuration -----------------------/
bogdanm	0:9b334a45a8ff	1369	/* Configure the UART Stop Bits: Set STOP[13:12] bits according
bogdanm	0:9b334a45a8ff	1370	* to huart->Init.StopBits value */
bogdanm	0:9b334a45a8ff	1371	MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
bogdanm	0:9b334a45a8ff	1372
bogdanm	0:9b334a45a8ff	1373	/-------------------------- USART CR3 Configuration -----------------------/
bogdanm	0:9b334a45a8ff	1374	/* Configure
bogdanm	0:9b334a45a8ff	1375	* - UART HardWare Flow Control: set CTSE and RTSE bits according
bogdanm	0:9b334a45a8ff	1376	* to huart->Init.HwFlowCtl value
bogdanm	0:9b334a45a8ff	1377	* - one-bit sampling method versus three samples' majority rule according
bogdanm	0:9b334a45a8ff	1378	* to huart->Init.OneBitSampling */
bogdanm	0:9b334a45a8ff	1379	tmpreg = (uint32_t)huart->Init.HwFlowCtl \| huart->Init.OneBitSampling ;
bogdanm	0:9b334a45a8ff	1380	MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE \| USART_CR3_CTSE \| USART_CR3_ONEBIT), tmpreg);
bogdanm	0:9b334a45a8ff	1381
bogdanm	0:9b334a45a8ff	1382	/-------------------------- USART BRR Configuration -----------------------/
bogdanm	0:9b334a45a8ff	1383	UART_GETCLOCKSOURCE(huart, clocksource);
bogdanm	0:9b334a45a8ff	1384
bogdanm	0:9b334a45a8ff	1385	/* Check UART Over Sampling to set Baud Rate Register */
bogdanm	0:9b334a45a8ff	1386	if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
bogdanm	0:9b334a45a8ff	1387	{
bogdanm	0:9b334a45a8ff	1388	switch (clocksource)
bogdanm	0:9b334a45a8ff	1389	{
bogdanm	0:9b334a45a8ff	1390	case UART_CLOCKSOURCE_PCLK1:
bogdanm	0:9b334a45a8ff	1391	usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1392	break;
bogdanm	0:9b334a45a8ff	1393	case UART_CLOCKSOURCE_HSI:
bogdanm	0:9b334a45a8ff	1394	usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1395	break;
bogdanm	0:9b334a45a8ff	1396	case UART_CLOCKSOURCE_SYSCLK:
bogdanm	0:9b334a45a8ff	1397	usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1398	break;
bogdanm	0:9b334a45a8ff	1399	case UART_CLOCKSOURCE_LSE:
bogdanm	0:9b334a45a8ff	1400	usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1401	break;
bogdanm	0:9b334a45a8ff	1402	case UART_CLOCKSOURCE_UNDEFINED:
bogdanm	0:9b334a45a8ff	1403	default:
bogdanm	0:9b334a45a8ff	1404	ret = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1405	break;
bogdanm	0:9b334a45a8ff	1406	}
bogdanm	0:9b334a45a8ff	1407
bogdanm	0:9b334a45a8ff	1408	brrtemp = usartdiv & 0xFFF0;
bogdanm	0:9b334a45a8ff	1409	brrtemp \|= (uint16_t)((usartdiv & (uint16_t)0x000F) >> 1U);
bogdanm	0:9b334a45a8ff	1410	huart->Instance->BRR = brrtemp;
bogdanm	0:9b334a45a8ff	1411	}
bogdanm	0:9b334a45a8ff	1412	else
bogdanm	0:9b334a45a8ff	1413	{
bogdanm	0:9b334a45a8ff	1414	switch (clocksource)
bogdanm	0:9b334a45a8ff	1415	{
bogdanm	0:9b334a45a8ff	1416	case UART_CLOCKSOURCE_PCLK1:
bogdanm	0:9b334a45a8ff	1417	huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1418	break;
bogdanm	0:9b334a45a8ff	1419	case UART_CLOCKSOURCE_HSI:
bogdanm	0:9b334a45a8ff	1420	huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1421	break;
bogdanm	0:9b334a45a8ff	1422	case UART_CLOCKSOURCE_SYSCLK:
bogdanm	0:9b334a45a8ff	1423	huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1424	break;
bogdanm	0:9b334a45a8ff	1425	case UART_CLOCKSOURCE_LSE:
bogdanm	0:9b334a45a8ff	1426	huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate));
bogdanm	0:9b334a45a8ff	1427	break;
bogdanm	0:9b334a45a8ff	1428	case UART_CLOCKSOURCE_UNDEFINED:
bogdanm	0:9b334a45a8ff	1429	default:
bogdanm	0:9b334a45a8ff	1430	ret = HAL_ERROR;
bogdanm	0:9b334a45a8ff	1431	break;
bogdanm	0:9b334a45a8ff	1432	}
bogdanm	0:9b334a45a8ff	1433	}
bogdanm	0:9b334a45a8ff	1434
bogdanm	0:9b334a45a8ff	1435	return ret;
bogdanm	0:9b334a45a8ff	1436
bogdanm	0:9b334a45a8ff	1437	}
bogdanm	0:9b334a45a8ff	1438
bogdanm	0:9b334a45a8ff	1439	/**
bogdanm	0:9b334a45a8ff	1440	* @brief Configure the UART peripheral advanced features.
bogdanm	0:9b334a45a8ff	1441	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1442	* @retval None
bogdanm	0:9b334a45a8ff	1443	*/
bogdanm	0:9b334a45a8ff	1444	void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1445	{
bogdanm	0:9b334a45a8ff	1446	/* Check whether the set of advanced features to configure is properly set */
bogdanm	0:9b334a45a8ff	1447	assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
bogdanm	0:9b334a45a8ff	1448
bogdanm	0:9b334a45a8ff	1449	/* if required, configure TX pin active level inversion */
bogdanm	0:9b334a45a8ff	1450	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
bogdanm	0:9b334a45a8ff	1451	{
bogdanm	0:9b334a45a8ff	1452	assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
bogdanm	0:9b334a45a8ff	1453	MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
bogdanm	0:9b334a45a8ff	1454	}
bogdanm	0:9b334a45a8ff	1455
bogdanm	0:9b334a45a8ff	1456	/* if required, configure RX pin active level inversion */
bogdanm	0:9b334a45a8ff	1457	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
bogdanm	0:9b334a45a8ff	1458	{
bogdanm	0:9b334a45a8ff	1459	assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
bogdanm	0:9b334a45a8ff	1460	MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
bogdanm	0:9b334a45a8ff	1461	}
bogdanm	0:9b334a45a8ff	1462
bogdanm	0:9b334a45a8ff	1463	/* if required, configure data inversion */
bogdanm	0:9b334a45a8ff	1464	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
bogdanm	0:9b334a45a8ff	1465	{
bogdanm	0:9b334a45a8ff	1466	assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
bogdanm	0:9b334a45a8ff	1467	MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
bogdanm	0:9b334a45a8ff	1468	}
bogdanm	0:9b334a45a8ff	1469
bogdanm	0:9b334a45a8ff	1470	/* if required, configure RX/TX pins swap */
bogdanm	0:9b334a45a8ff	1471	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
bogdanm	0:9b334a45a8ff	1472	{
bogdanm	0:9b334a45a8ff	1473	assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
bogdanm	0:9b334a45a8ff	1474	MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
bogdanm	0:9b334a45a8ff	1475	}
bogdanm	0:9b334a45a8ff	1476
bogdanm	0:9b334a45a8ff	1477	/* if required, configure RX overrun detection disabling */
bogdanm	0:9b334a45a8ff	1478	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
bogdanm	0:9b334a45a8ff	1479	{
bogdanm	0:9b334a45a8ff	1480	assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
bogdanm	0:9b334a45a8ff	1481	MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
bogdanm	0:9b334a45a8ff	1482	}
bogdanm	0:9b334a45a8ff	1483
bogdanm	0:9b334a45a8ff	1484	/* if required, configure DMA disabling on reception error */
bogdanm	0:9b334a45a8ff	1485	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
bogdanm	0:9b334a45a8ff	1486	{
bogdanm	0:9b334a45a8ff	1487	assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
bogdanm	0:9b334a45a8ff	1488	MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
bogdanm	0:9b334a45a8ff	1489	}
bogdanm	0:9b334a45a8ff	1490
bogdanm	0:9b334a45a8ff	1491	/* if required, configure auto Baud rate detection scheme */
bogdanm	0:9b334a45a8ff	1492	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
bogdanm	0:9b334a45a8ff	1493	{
bogdanm	0:9b334a45a8ff	1494	assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
bogdanm	0:9b334a45a8ff	1495	assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
bogdanm	0:9b334a45a8ff	1496	MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
bogdanm	0:9b334a45a8ff	1497	/* set auto Baudrate detection parameters if detection is enabled */
bogdanm	0:9b334a45a8ff	1498	if(huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
bogdanm	0:9b334a45a8ff	1499	{
bogdanm	0:9b334a45a8ff	1500	assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
bogdanm	0:9b334a45a8ff	1501	MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
bogdanm	0:9b334a45a8ff	1502	}
bogdanm	0:9b334a45a8ff	1503	}
bogdanm	0:9b334a45a8ff	1504
bogdanm	0:9b334a45a8ff	1505	/* if required, configure MSB first on communication line */
bogdanm	0:9b334a45a8ff	1506	if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
bogdanm	0:9b334a45a8ff	1507	{
bogdanm	0:9b334a45a8ff	1508	assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
bogdanm	0:9b334a45a8ff	1509	MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
bogdanm	0:9b334a45a8ff	1510	}
bogdanm	0:9b334a45a8ff	1511	}
bogdanm	0:9b334a45a8ff	1512
bogdanm	0:9b334a45a8ff	1513	/**
bogdanm	0:9b334a45a8ff	1514	* @brief Check the UART Idle State.
bogdanm	0:9b334a45a8ff	1515	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1516	* @retval HAL status
bogdanm	0:9b334a45a8ff	1517	*/
bogdanm	0:9b334a45a8ff	1518	HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1519	{
bogdanm	0:9b334a45a8ff	1520	/* Initialize the UART ErrorCode */
bogdanm	0:9b334a45a8ff	1521	huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm	0:9b334a45a8ff	1522
bogdanm	0:9b334a45a8ff	1523	/* TEACK and REACK bits in ISR are checked only when available (not available on all F0 devices).
bogdanm	0:9b334a45a8ff	1524	Bits are defined for some specific devices, and are available only for UART instances supporting WakeUp from Stop Mode feature.
bogdanm	0:9b334a45a8ff	1525	*/
bogdanm	0:9b334a45a8ff	1526	#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	1527	if (IS_UART_WAKEUP_INSTANCE(huart->Instance))
bogdanm	0:9b334a45a8ff	1528	{
bogdanm	0:9b334a45a8ff	1529	/* Check if the Transmitter is enabled */
bogdanm	0:9b334a45a8ff	1530	if((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
bogdanm	0:9b334a45a8ff	1531	{
bogdanm	0:9b334a45a8ff	1532	/* Wait until TEACK flag is set */
bogdanm	0:9b334a45a8ff	1533	if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, UART_TEACK_REACK_TIMEOUT) != HAL_OK)
bogdanm	0:9b334a45a8ff	1534	{
bogdanm	0:9b334a45a8ff	1535	/* Timeout occurred */
bogdanm	0:9b334a45a8ff	1536	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1537	}
bogdanm	0:9b334a45a8ff	1538	}
bogdanm	0:9b334a45a8ff	1539
bogdanm	0:9b334a45a8ff	1540	/* Check if the Receiver is enabled */
bogdanm	0:9b334a45a8ff	1541	if((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
bogdanm	0:9b334a45a8ff	1542	{
bogdanm	0:9b334a45a8ff	1543	/* Wait until REACK flag is set */
bogdanm	0:9b334a45a8ff	1544	if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, UART_TEACK_REACK_TIMEOUT) != HAL_OK)
bogdanm	0:9b334a45a8ff	1545	{
bogdanm	0:9b334a45a8ff	1546	/* Timeout occurred */
bogdanm	0:9b334a45a8ff	1547	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1548	}
bogdanm	0:9b334a45a8ff	1549	}
bogdanm	0:9b334a45a8ff	1550	}
bogdanm	0:9b334a45a8ff	1551	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	1552
bogdanm	0:9b334a45a8ff	1553	/* Initialize the UART State */
bogdanm	0:9b334a45a8ff	1554	huart->State= HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1555
bogdanm	0:9b334a45a8ff	1556	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1557	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1558
bogdanm	0:9b334a45a8ff	1559	return HAL_OK;
bogdanm	0:9b334a45a8ff	1560	}
bogdanm	0:9b334a45a8ff	1561
bogdanm	0:9b334a45a8ff	1562
bogdanm	0:9b334a45a8ff	1563	/**
bogdanm	0:9b334a45a8ff	1564	* @brief Handle UART Communication Timeout.
bogdanm	0:9b334a45a8ff	1565	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1566	* @param Flag: specifies the UART flag to check.
bogdanm	0:9b334a45a8ff	1567	* @param Status: the Flag status (SET or RESET).
bogdanm	0:9b334a45a8ff	1568	* @param Timeout: Timeout duration.
bogdanm	0:9b334a45a8ff	1569	* @retval HAL status
bogdanm	0:9b334a45a8ff	1570	*/
bogdanm	0:9b334a45a8ff	1571	HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
bogdanm	0:9b334a45a8ff	1572	{
bogdanm	0:9b334a45a8ff	1573	uint32_t tickstart = HAL_GetTick();
bogdanm	0:9b334a45a8ff	1574
bogdanm	0:9b334a45a8ff	1575	/* Wait until flag is set */
bogdanm	0:9b334a45a8ff	1576	if(Status == RESET)
bogdanm	0:9b334a45a8ff	1577	{
bogdanm	0:9b334a45a8ff	1578	while(__HAL_UART_GET_FLAG(huart, Flag) == RESET)
bogdanm	0:9b334a45a8ff	1579	{
bogdanm	0:9b334a45a8ff	1580	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	1581	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	1582	{
bogdanm	0:9b334a45a8ff	1583	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
bogdanm	0:9b334a45a8ff	1584	{
bogdanm	0:9b334a45a8ff	1585	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
bogdanm	0:9b334a45a8ff	1586	__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	1587	__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	1588	__HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	1589	__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	1590
bogdanm	0:9b334a45a8ff	1591	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1592
bogdanm	0:9b334a45a8ff	1593	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1594	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1595
bogdanm	0:9b334a45a8ff	1596	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1597	}
bogdanm	0:9b334a45a8ff	1598	}
bogdanm	0:9b334a45a8ff	1599	}
bogdanm	0:9b334a45a8ff	1600	}
bogdanm	0:9b334a45a8ff	1601	else
bogdanm	0:9b334a45a8ff	1602	{
bogdanm	0:9b334a45a8ff	1603	while(__HAL_UART_GET_FLAG(huart, Flag) != RESET)
bogdanm	0:9b334a45a8ff	1604	{
bogdanm	0:9b334a45a8ff	1605	/* Check for the Timeout */
bogdanm	0:9b334a45a8ff	1606	if(Timeout != HAL_MAX_DELAY)
bogdanm	0:9b334a45a8ff	1607	{
bogdanm	0:9b334a45a8ff	1608	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
bogdanm	0:9b334a45a8ff	1609	{
bogdanm	0:9b334a45a8ff	1610	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
bogdanm	0:9b334a45a8ff	1611	__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	1612	__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	1613	__HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	1614	__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	1615
bogdanm	0:9b334a45a8ff	1616	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1617
bogdanm	0:9b334a45a8ff	1618	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	1619	__HAL_UNLOCK(huart);
bogdanm	0:9b334a45a8ff	1620
bogdanm	0:9b334a45a8ff	1621	return HAL_TIMEOUT;
bogdanm	0:9b334a45a8ff	1622	}
bogdanm	0:9b334a45a8ff	1623	}
bogdanm	0:9b334a45a8ff	1624	}
bogdanm	0:9b334a45a8ff	1625	}
bogdanm	0:9b334a45a8ff	1626	return HAL_OK;
bogdanm	0:9b334a45a8ff	1627	}
bogdanm	0:9b334a45a8ff	1628
bogdanm	0:9b334a45a8ff	1629	/**
bogdanm	0:9b334a45a8ff	1630	* @brief DMA UART transmit process complete callback.
bogdanm	0:9b334a45a8ff	1631	* @param hdma: DMA handle.
bogdanm	0:9b334a45a8ff	1632	* @retval None
bogdanm	0:9b334a45a8ff	1633	*/
bogdanm	0:9b334a45a8ff	1634	static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1635	{
bogdanm	0:9b334a45a8ff	1636	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	1637
bogdanm	0:9b334a45a8ff	1638	/* DMA Normal mode */
bogdanm	0:9b334a45a8ff	1639	if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
bogdanm	0:9b334a45a8ff	1640	{
bogdanm	0:9b334a45a8ff	1641	huart->TxXferCount = 0;
bogdanm	0:9b334a45a8ff	1642
bogdanm	0:9b334a45a8ff	1643	/* Disable the DMA transfer for transmit request by resetting the DMAT bit
bogdanm	0:9b334a45a8ff	1644	in the UART CR3 register */
bogdanm	0:9b334a45a8ff	1645	huart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAT);
bogdanm	0:9b334a45a8ff	1646
bogdanm	0:9b334a45a8ff	1647	/* Enable the UART Transmit Complete Interrupt */
bogdanm	0:9b334a45a8ff	1648	__HAL_UART_ENABLE_IT(huart, UART_IT_TC);
bogdanm	0:9b334a45a8ff	1649	}
bogdanm	0:9b334a45a8ff	1650	/* DMA Circular mode */
bogdanm	0:9b334a45a8ff	1651	else
bogdanm	0:9b334a45a8ff	1652	{
bogdanm	0:9b334a45a8ff	1653	HAL_UART_TxCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1654	}
bogdanm	0:9b334a45a8ff	1655
bogdanm	0:9b334a45a8ff	1656	}
bogdanm	0:9b334a45a8ff	1657
bogdanm	0:9b334a45a8ff	1658	/**
bogdanm	0:9b334a45a8ff	1659	* @brief DMA UART transmit process half complete callback.
bogdanm	0:9b334a45a8ff	1660	* @param hdma : DMA handle.
bogdanm	0:9b334a45a8ff	1661	* @retval None
bogdanm	0:9b334a45a8ff	1662	*/
bogdanm	0:9b334a45a8ff	1663	static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1664	{
bogdanm	0:9b334a45a8ff	1665	UART_HandleTypeDef* huart = (UART_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	1666
bogdanm	0:9b334a45a8ff	1667	HAL_UART_TxHalfCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1668	}
bogdanm	0:9b334a45a8ff	1669
bogdanm	0:9b334a45a8ff	1670	/**
bogdanm	0:9b334a45a8ff	1671	* @brief DMA UART receive process complete callback.
bogdanm	0:9b334a45a8ff	1672	* @param hdma: DMA handle.
bogdanm	0:9b334a45a8ff	1673	* @retval None
bogdanm	0:9b334a45a8ff	1674	*/
bogdanm	0:9b334a45a8ff	1675	static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1676	{
bogdanm	0:9b334a45a8ff	1677	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	1678
bogdanm	0:9b334a45a8ff	1679	/* DMA Normal mode */
bogdanm	0:9b334a45a8ff	1680	if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
bogdanm	0:9b334a45a8ff	1681	{
bogdanm	0:9b334a45a8ff	1682	huart->RxXferCount = 0;
bogdanm	0:9b334a45a8ff	1683
bogdanm	0:9b334a45a8ff	1684	/* Disable the DMA transfer for the receiver request by resetting the DMAR bit
bogdanm	0:9b334a45a8ff	1685	in the UART CR3 register */
bogdanm	0:9b334a45a8ff	1686	huart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAR);
bogdanm	0:9b334a45a8ff	1687
bogdanm	0:9b334a45a8ff	1688	/* Check if a transmit Process is ongoing or not */
bogdanm	0:9b334a45a8ff	1689	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1690	{
bogdanm	0:9b334a45a8ff	1691	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1692	}
bogdanm	0:9b334a45a8ff	1693	else
bogdanm	0:9b334a45a8ff	1694	{
bogdanm	0:9b334a45a8ff	1695	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1696	}
bogdanm	0:9b334a45a8ff	1697	}
bogdanm	0:9b334a45a8ff	1698
bogdanm	0:9b334a45a8ff	1699	HAL_UART_RxCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1700	}
bogdanm	0:9b334a45a8ff	1701
bogdanm	0:9b334a45a8ff	1702	/**
bogdanm	0:9b334a45a8ff	1703	* @brief DMA UART receive process half complete callback.
bogdanm	0:9b334a45a8ff	1704	* @param hdma : DMA handle.
bogdanm	0:9b334a45a8ff	1705	* @retval None
bogdanm	0:9b334a45a8ff	1706	*/
bogdanm	0:9b334a45a8ff	1707	static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1708	{
bogdanm	0:9b334a45a8ff	1709	UART_HandleTypeDef* huart = (UART_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
bogdanm	0:9b334a45a8ff	1710
bogdanm	0:9b334a45a8ff	1711	HAL_UART_RxHalfCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1712	}
bogdanm	0:9b334a45a8ff	1713
bogdanm	0:9b334a45a8ff	1714	/**
bogdanm	0:9b334a45a8ff	1715	* @brief DMA UART communication error callback.
bogdanm	0:9b334a45a8ff	1716	* @param hdma: DMA handle.
bogdanm	0:9b334a45a8ff	1717	* @retval None
bogdanm	0:9b334a45a8ff	1718	*/
bogdanm	0:9b334a45a8ff	1719	static void UART_DMAError(DMA_HandleTypeDef *hdma)
bogdanm	0:9b334a45a8ff	1720	{
bogdanm	0:9b334a45a8ff	1721	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm	0:9b334a45a8ff	1722	huart->RxXferCount = 0;
bogdanm	0:9b334a45a8ff	1723	huart->TxXferCount = 0;
bogdanm	0:9b334a45a8ff	1724	huart->State= HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1725	huart->ErrorCode \|= HAL_UART_ERROR_DMA;
bogdanm	0:9b334a45a8ff	1726	HAL_UART_ErrorCallback(huart);
bogdanm	0:9b334a45a8ff	1727	}
bogdanm	0:9b334a45a8ff	1728
bogdanm	0:9b334a45a8ff	1729	/**
bogdanm	0:9b334a45a8ff	1730	* @brief Send an amount of data in interrupt mode.
bogdanm	0:9b334a45a8ff	1731	* @note Function is called under interruption only, once
bogdanm	0:9b334a45a8ff	1732	* interruptions have been enabled by HAL_UART_Transmit_IT().
bogdanm	0:9b334a45a8ff	1733	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1734	* @retval HAL status
bogdanm	0:9b334a45a8ff	1735	*/
bogdanm	0:9b334a45a8ff	1736	HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1737	{
bogdanm	0:9b334a45a8ff	1738	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	1739
bogdanm	0:9b334a45a8ff	1740	if ((huart->State == HAL_UART_STATE_BUSY_TX) \|\| (huart->State == HAL_UART_STATE_BUSY_TX_RX))
bogdanm	0:9b334a45a8ff	1741	{
bogdanm	0:9b334a45a8ff	1742
bogdanm	0:9b334a45a8ff	1743	if(huart->TxXferCount == 0)
bogdanm	0:9b334a45a8ff	1744	{
bogdanm	0:9b334a45a8ff	1745	/* Disable the UART Transmit Data Register Empty Interrupt */
bogdanm	0:9b334a45a8ff	1746	__HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm	0:9b334a45a8ff	1747
bogdanm	0:9b334a45a8ff	1748	/* Enable the UART Transmit Complete Interrupt */
bogdanm	0:9b334a45a8ff	1749	__HAL_UART_ENABLE_IT(huart, UART_IT_TC);
bogdanm	0:9b334a45a8ff	1750
bogdanm	0:9b334a45a8ff	1751	return HAL_OK;
bogdanm	0:9b334a45a8ff	1752	}
bogdanm	0:9b334a45a8ff	1753	else
bogdanm	0:9b334a45a8ff	1754	{
bogdanm	0:9b334a45a8ff	1755	if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm	0:9b334a45a8ff	1756	{
bogdanm	0:9b334a45a8ff	1757	tmp = (uint16_t*) huart->pTxBuffPtr;
bogdanm	0:9b334a45a8ff	1758	huart->Instance->TDR = (*tmp & (uint16_t)0x01FF);
bogdanm	0:9b334a45a8ff	1759	huart->pTxBuffPtr += 2;
bogdanm	0:9b334a45a8ff	1760	}
bogdanm	0:9b334a45a8ff	1761	else
bogdanm	0:9b334a45a8ff	1762	{
bogdanm	0:9b334a45a8ff	1763	huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0xFF);
bogdanm	0:9b334a45a8ff	1764	}
bogdanm	0:9b334a45a8ff	1765
bogdanm	0:9b334a45a8ff	1766	huart->TxXferCount--;
bogdanm	0:9b334a45a8ff	1767
bogdanm	0:9b334a45a8ff	1768	return HAL_OK;
bogdanm	0:9b334a45a8ff	1769	}
bogdanm	0:9b334a45a8ff	1770	}
bogdanm	0:9b334a45a8ff	1771	else
bogdanm	0:9b334a45a8ff	1772	{
bogdanm	0:9b334a45a8ff	1773	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1774	}
bogdanm	0:9b334a45a8ff	1775	}
bogdanm	0:9b334a45a8ff	1776
bogdanm	0:9b334a45a8ff	1777
bogdanm	0:9b334a45a8ff	1778	/**
bogdanm	0:9b334a45a8ff	1779	* @brief Wrap up transmission in non-blocking mode.
bogdanm	0:9b334a45a8ff	1780	* @param huart: pointer to a UART_HandleTypeDef structure that contains
bogdanm	0:9b334a45a8ff	1781	* the configuration information for the specified UART module.
bogdanm	0:9b334a45a8ff	1782	* @retval HAL status
bogdanm	0:9b334a45a8ff	1783	*/
bogdanm	0:9b334a45a8ff	1784	HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1785	{
bogdanm	0:9b334a45a8ff	1786	/* Disable the UART Transmit Complete Interrupt */
bogdanm	0:9b334a45a8ff	1787	__HAL_UART_DISABLE_IT(huart, UART_IT_TC);
bogdanm	0:9b334a45a8ff	1788
bogdanm	0:9b334a45a8ff	1789	/* Check if a receive process is ongoing or not */
bogdanm	0:9b334a45a8ff	1790	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1791	{
bogdanm	0:9b334a45a8ff	1792	huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm	0:9b334a45a8ff	1793	}
bogdanm	0:9b334a45a8ff	1794	else
bogdanm	0:9b334a45a8ff	1795	{
bogdanm	0:9b334a45a8ff	1796	/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm	0:9b334a45a8ff	1797	__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	1798
bogdanm	0:9b334a45a8ff	1799	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1800	}
bogdanm	0:9b334a45a8ff	1801
bogdanm	0:9b334a45a8ff	1802	HAL_UART_TxCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1803
bogdanm	0:9b334a45a8ff	1804	return HAL_OK;
bogdanm	0:9b334a45a8ff	1805	}
bogdanm	0:9b334a45a8ff	1806
bogdanm	0:9b334a45a8ff	1807
bogdanm	0:9b334a45a8ff	1808	/**
bogdanm	0:9b334a45a8ff	1809	* @brief Receive an amount of data in interrupt mode.
bogdanm	0:9b334a45a8ff	1810	* @note Function is called under interruption only, once
bogdanm	0:9b334a45a8ff	1811	* interruptions have been enabled by HAL_UART_Receive_IT()
bogdanm	0:9b334a45a8ff	1812	* @param huart: UART handle.
bogdanm	0:9b334a45a8ff	1813	* @retval HAL status
bogdanm	0:9b334a45a8ff	1814	*/
bogdanm	0:9b334a45a8ff	1815	HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
bogdanm	0:9b334a45a8ff	1816	{
bogdanm	0:9b334a45a8ff	1817	uint16_t* tmp;
bogdanm	0:9b334a45a8ff	1818	uint16_t uhMask = huart->Mask;
bogdanm	0:9b334a45a8ff	1819
bogdanm	0:9b334a45a8ff	1820	if((huart->State == HAL_UART_STATE_BUSY_RX) \|\| (huart->State == HAL_UART_STATE_BUSY_TX_RX))
bogdanm	0:9b334a45a8ff	1821	{
bogdanm	0:9b334a45a8ff	1822
bogdanm	0:9b334a45a8ff	1823	if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm	0:9b334a45a8ff	1824	{
bogdanm	0:9b334a45a8ff	1825	tmp = (uint16_t*) huart->pRxBuffPtr ;
bogdanm	0:9b334a45a8ff	1826	*tmp = (uint16_t)(huart->Instance->RDR & uhMask);
bogdanm	0:9b334a45a8ff	1827	huart->pRxBuffPtr +=2;
bogdanm	0:9b334a45a8ff	1828	}
bogdanm	0:9b334a45a8ff	1829	else
bogdanm	0:9b334a45a8ff	1830	{
bogdanm	0:9b334a45a8ff	1831	*huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
bogdanm	0:9b334a45a8ff	1832	}
bogdanm	0:9b334a45a8ff	1833
bogdanm	0:9b334a45a8ff	1834	if(--huart->RxXferCount == 0)
bogdanm	0:9b334a45a8ff	1835	{
bogdanm	0:9b334a45a8ff	1836	__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm	0:9b334a45a8ff	1837
bogdanm	0:9b334a45a8ff	1838	/* Check if a transmit Process is ongoing or not */
bogdanm	0:9b334a45a8ff	1839	if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm	0:9b334a45a8ff	1840	{
bogdanm	0:9b334a45a8ff	1841	huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm	0:9b334a45a8ff	1842	}
bogdanm	0:9b334a45a8ff	1843	else
bogdanm	0:9b334a45a8ff	1844	{
bogdanm	0:9b334a45a8ff	1845	/* Disable the UART Parity Error Interrupt */
bogdanm	0:9b334a45a8ff	1846	__HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm	0:9b334a45a8ff	1847
bogdanm	0:9b334a45a8ff	1848	/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm	0:9b334a45a8ff	1849	__HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm	0:9b334a45a8ff	1850
bogdanm	0:9b334a45a8ff	1851	huart->State = HAL_UART_STATE_READY;
bogdanm	0:9b334a45a8ff	1852	}
bogdanm	0:9b334a45a8ff	1853
bogdanm	0:9b334a45a8ff	1854	HAL_UART_RxCpltCallback(huart);
bogdanm	0:9b334a45a8ff	1855
bogdanm	0:9b334a45a8ff	1856	return HAL_OK;
bogdanm	0:9b334a45a8ff	1857	}
bogdanm	0:9b334a45a8ff	1858
bogdanm	0:9b334a45a8ff	1859	return HAL_OK;
bogdanm	0:9b334a45a8ff	1860	}
bogdanm	0:9b334a45a8ff	1861	else
bogdanm	0:9b334a45a8ff	1862	{
bogdanm	0:9b334a45a8ff	1863	return HAL_BUSY;
bogdanm	0:9b334a45a8ff	1864	}
bogdanm	0:9b334a45a8ff	1865	}
bogdanm	0:9b334a45a8ff	1866
bogdanm	0:9b334a45a8ff	1867	/**
bogdanm	0:9b334a45a8ff	1868	* @}
bogdanm	0:9b334a45a8ff	1869	*/
bogdanm	0:9b334a45a8ff	1870
bogdanm	0:9b334a45a8ff	1871	#endif /* HAL_UART_MODULE_ENABLED */
bogdanm	0:9b334a45a8ff	1872	/**
bogdanm	0:9b334a45a8ff	1873	* @}
bogdanm	0:9b334a45a8ff	1874	*/
bogdanm	0:9b334a45a8ff	1875
bogdanm	0:9b334a45a8ff	1876	/**
bogdanm	0:9b334a45a8ff	1877	* @}
bogdanm	0:9b334a45a8ff	1878	*/
bogdanm	0:9b334a45a8ff	1879
bogdanm	0:9b334a45a8ff	1880	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	22 Dec 2016
Imports:	1
Forks:	0
Commits:	154
Dependents:	0
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_uart.c@0:9b334a45a8ff, 2015-10-01 (annotated)

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