Fawwaz Nadzmy / mbed-STM

mbed library sources. Supersedes mbed-src.

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targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/efm32wg_pcnt.h@153:9398a535854b, 2016-12-22 (annotated)

Committer:
fwndz
Date:
Thu Dec 22 05:12:40 2016 +0000
Revision:
153:9398a535854b
Parent:
150:02e0a0aed4ec 
device target maximize

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 150:02e0a0aed4ec 1 /**************************************************************************//**
<> 150:02e0a0aed4ec 2 * @file efm32wg_pcnt.h
<> 150:02e0a0aed4ec 3 * @brief EFM32WG_PCNT register and bit field definitions
<> 150:02e0a0aed4ec 4 * @version 5.0.0
<> 150:02e0a0aed4ec 5 ******************************************************************************
<> 150:02e0a0aed4ec 6 * @section License
<> 150:02e0a0aed4ec 7 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
<> 150:02e0a0aed4ec 8 ******************************************************************************
<> 150:02e0a0aed4ec 9 *
<> 150:02e0a0aed4ec 10 * Permission is granted to anyone to use this software for any purpose,
<> 150:02e0a0aed4ec 11 * including commercial applications, and to alter it and redistribute it
<> 150:02e0a0aed4ec 12 * freely, subject to the following restrictions:
<> 150:02e0a0aed4ec 13 *
<> 150:02e0a0aed4ec 14 * 1. The origin of this software must not be misrepresented; you must not
<> 150:02e0a0aed4ec 15 * claim that you wrote the original software.@n
<> 150:02e0a0aed4ec 16 * 2. Altered source versions must be plainly marked as such, and must not be
<> 150:02e0a0aed4ec 17 * misrepresented as being the original software.@n
<> 150:02e0a0aed4ec 18 * 3. This notice may not be removed or altered from any source distribution.
<> 150:02e0a0aed4ec 19 *
<> 150:02e0a0aed4ec 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
<> 150:02e0a0aed4ec 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
<> 150:02e0a0aed4ec 22 * providing the Software "AS IS", with no express or implied warranties of any
<> 150:02e0a0aed4ec 23 * kind, including, but not limited to, any implied warranties of
<> 150:02e0a0aed4ec 24 * merchantability or fitness for any particular purpose or warranties against
<> 150:02e0a0aed4ec 25 * infringement of any proprietary rights of a third party.
<> 150:02e0a0aed4ec 26 *
<> 150:02e0a0aed4ec 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
<> 150:02e0a0aed4ec 28 * incidental, or special damages, or any other relief, or for any claim by
<> 150:02e0a0aed4ec 29 * any third party, arising from your use of this Software.
<> 150:02e0a0aed4ec 30 *
<> 150:02e0a0aed4ec 31 *****************************************************************************/
<> 150:02e0a0aed4ec 32 /**************************************************************************//**
<> 150:02e0a0aed4ec 33 * @addtogroup Parts
<> 150:02e0a0aed4ec 34 * @{
<> 150:02e0a0aed4ec 35 ******************************************************************************/
<> 150:02e0a0aed4ec 36 /**************************************************************************//**
<> 150:02e0a0aed4ec 37 * @defgroup EFM32WG_PCNT
<> 150:02e0a0aed4ec 38 * @{
<> 150:02e0a0aed4ec 39 * @brief EFM32WG_PCNT Register Declaration
<> 150:02e0a0aed4ec 40 *****************************************************************************/
<> 150:02e0a0aed4ec 41 typedef struct
<> 150:02e0a0aed4ec 42 {
<> 150:02e0a0aed4ec 43 __IOM uint32_t CTRL; /**< Control Register */
<> 150:02e0a0aed4ec 44 __IOM uint32_t CMD; /**< Command Register */
<> 150:02e0a0aed4ec 45 __IM uint32_t STATUS; /**< Status Register */
<> 150:02e0a0aed4ec 46 __IM uint32_t CNT; /**< Counter Value Register */
<> 150:02e0a0aed4ec 47 __IM uint32_t TOP; /**< Top Value Register */
<> 150:02e0a0aed4ec 48 __IOM uint32_t TOPB; /**< Top Value Buffer Register */
<> 150:02e0a0aed4ec 49 __IM uint32_t IF; /**< Interrupt Flag Register */
<> 150:02e0a0aed4ec 50 __IOM uint32_t IFS; /**< Interrupt Flag Set Register */
<> 150:02e0a0aed4ec 51 __IOM uint32_t IFC; /**< Interrupt Flag Clear Register */
<> 150:02e0a0aed4ec 52 __IOM uint32_t IEN; /**< Interrupt Enable Register */
<> 150:02e0a0aed4ec 53 __IOM uint32_t ROUTE; /**< I/O Routing Register */
<> 150:02e0a0aed4ec 54
<> 150:02e0a0aed4ec 55 __IOM uint32_t FREEZE; /**< Freeze Register */
<> 150:02e0a0aed4ec 56 __IM uint32_t SYNCBUSY; /**< Synchronization Busy Register */
<> 150:02e0a0aed4ec 57
<> 150:02e0a0aed4ec 58 uint32_t RESERVED0[1]; /**< Reserved for future use **/
<> 150:02e0a0aed4ec 59 __IOM uint32_t AUXCNT; /**< Auxiliary Counter Value Register */
<> 150:02e0a0aed4ec 60 __IOM uint32_t INPUT; /**< PCNT Input Register */
<> 150:02e0a0aed4ec 61 } PCNT_TypeDef; /** @} */
<> 150:02e0a0aed4ec 62
<> 150:02e0a0aed4ec 63 /**************************************************************************//**
<> 150:02e0a0aed4ec 64 * @defgroup EFM32WG_PCNT_BitFields
<> 150:02e0a0aed4ec 65 * @{
<> 150:02e0a0aed4ec 66 *****************************************************************************/
<> 150:02e0a0aed4ec 67
<> 150:02e0a0aed4ec 68 /* Bit fields for PCNT CTRL */
<> 150:02e0a0aed4ec 69 #define _PCNT_CTRL_RESETVALUE 0x00000000UL /**< Default value for PCNT_CTRL */
<> 150:02e0a0aed4ec 70 #define _PCNT_CTRL_MASK 0x0000CF3FUL /**< Mask for PCNT_CTRL */
<> 150:02e0a0aed4ec 71 #define _PCNT_CTRL_MODE_SHIFT 0 /**< Shift value for PCNT_MODE */
<> 150:02e0a0aed4ec 72 #define _PCNT_CTRL_MODE_MASK 0x3UL /**< Bit mask for PCNT_MODE */
<> 150:02e0a0aed4ec 73 #define _PCNT_CTRL_MODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 74 #define _PCNT_CTRL_MODE_DISABLE 0x00000000UL /**< Mode DISABLE for PCNT_CTRL */
<> 150:02e0a0aed4ec 75 #define _PCNT_CTRL_MODE_OVSSINGLE 0x00000001UL /**< Mode OVSSINGLE for PCNT_CTRL */
<> 150:02e0a0aed4ec 76 #define _PCNT_CTRL_MODE_EXTCLKSINGLE 0x00000002UL /**< Mode EXTCLKSINGLE for PCNT_CTRL */
<> 150:02e0a0aed4ec 77 #define _PCNT_CTRL_MODE_EXTCLKQUAD 0x00000003UL /**< Mode EXTCLKQUAD for PCNT_CTRL */
<> 150:02e0a0aed4ec 78 #define PCNT_CTRL_MODE_DEFAULT (_PCNT_CTRL_MODE_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 79 #define PCNT_CTRL_MODE_DISABLE (_PCNT_CTRL_MODE_DISABLE << 0) /**< Shifted mode DISABLE for PCNT_CTRL */
<> 150:02e0a0aed4ec 80 #define PCNT_CTRL_MODE_OVSSINGLE (_PCNT_CTRL_MODE_OVSSINGLE << 0) /**< Shifted mode OVSSINGLE for PCNT_CTRL */
<> 150:02e0a0aed4ec 81 #define PCNT_CTRL_MODE_EXTCLKSINGLE (_PCNT_CTRL_MODE_EXTCLKSINGLE << 0) /**< Shifted mode EXTCLKSINGLE for PCNT_CTRL */
<> 150:02e0a0aed4ec 82 #define PCNT_CTRL_MODE_EXTCLKQUAD (_PCNT_CTRL_MODE_EXTCLKQUAD << 0) /**< Shifted mode EXTCLKQUAD for PCNT_CTRL */
<> 150:02e0a0aed4ec 83 #define PCNT_CTRL_CNTDIR (0x1UL << 2) /**< Non-Quadrature Mode Counter Direction Control */
<> 150:02e0a0aed4ec 84 #define _PCNT_CTRL_CNTDIR_SHIFT 2 /**< Shift value for PCNT_CNTDIR */
<> 150:02e0a0aed4ec 85 #define _PCNT_CTRL_CNTDIR_MASK 0x4UL /**< Bit mask for PCNT_CNTDIR */
<> 150:02e0a0aed4ec 86 #define _PCNT_CTRL_CNTDIR_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 87 #define _PCNT_CTRL_CNTDIR_UP 0x00000000UL /**< Mode UP for PCNT_CTRL */
<> 150:02e0a0aed4ec 88 #define _PCNT_CTRL_CNTDIR_DOWN 0x00000001UL /**< Mode DOWN for PCNT_CTRL */
<> 150:02e0a0aed4ec 89 #define PCNT_CTRL_CNTDIR_DEFAULT (_PCNT_CTRL_CNTDIR_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 90 #define PCNT_CTRL_CNTDIR_UP (_PCNT_CTRL_CNTDIR_UP << 2) /**< Shifted mode UP for PCNT_CTRL */
<> 150:02e0a0aed4ec 91 #define PCNT_CTRL_CNTDIR_DOWN (_PCNT_CTRL_CNTDIR_DOWN << 2) /**< Shifted mode DOWN for PCNT_CTRL */
<> 150:02e0a0aed4ec 92 #define PCNT_CTRL_EDGE (0x1UL << 3) /**< Edge Select */
<> 150:02e0a0aed4ec 93 #define _PCNT_CTRL_EDGE_SHIFT 3 /**< Shift value for PCNT_EDGE */
<> 150:02e0a0aed4ec 94 #define _PCNT_CTRL_EDGE_MASK 0x8UL /**< Bit mask for PCNT_EDGE */
<> 150:02e0a0aed4ec 95 #define _PCNT_CTRL_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 96 #define _PCNT_CTRL_EDGE_POS 0x00000000UL /**< Mode POS for PCNT_CTRL */
<> 150:02e0a0aed4ec 97 #define _PCNT_CTRL_EDGE_NEG 0x00000001UL /**< Mode NEG for PCNT_CTRL */
<> 150:02e0a0aed4ec 98 #define PCNT_CTRL_EDGE_DEFAULT (_PCNT_CTRL_EDGE_DEFAULT << 3) /**< Shifted mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 99 #define PCNT_CTRL_EDGE_POS (_PCNT_CTRL_EDGE_POS << 3) /**< Shifted mode POS for PCNT_CTRL */
<> 150:02e0a0aed4ec 100 #define PCNT_CTRL_EDGE_NEG (_PCNT_CTRL_EDGE_NEG << 3) /**< Shifted mode NEG for PCNT_CTRL */
<> 150:02e0a0aed4ec 101 #define PCNT_CTRL_FILT (0x1UL << 4) /**< Enable Digital Pulse Width Filter */
<> 150:02e0a0aed4ec 102 #define _PCNT_CTRL_FILT_SHIFT 4 /**< Shift value for PCNT_FILT */
<> 150:02e0a0aed4ec 103 #define _PCNT_CTRL_FILT_MASK 0x10UL /**< Bit mask for PCNT_FILT */
<> 150:02e0a0aed4ec 104 #define _PCNT_CTRL_FILT_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 105 #define PCNT_CTRL_FILT_DEFAULT (_PCNT_CTRL_FILT_DEFAULT << 4) /**< Shifted mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 106 #define PCNT_CTRL_RSTEN (0x1UL << 5) /**< Enable PCNT Clock Domain Reset */
<> 150:02e0a0aed4ec 107 #define _PCNT_CTRL_RSTEN_SHIFT 5 /**< Shift value for PCNT_RSTEN */
<> 150:02e0a0aed4ec 108 #define _PCNT_CTRL_RSTEN_MASK 0x20UL /**< Bit mask for PCNT_RSTEN */
<> 150:02e0a0aed4ec 109 #define _PCNT_CTRL_RSTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 110 #define PCNT_CTRL_RSTEN_DEFAULT (_PCNT_CTRL_RSTEN_DEFAULT << 5) /**< Shifted mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 111 #define PCNT_CTRL_HYST (0x1UL << 8) /**< Enable Hysteresis */
<> 150:02e0a0aed4ec 112 #define _PCNT_CTRL_HYST_SHIFT 8 /**< Shift value for PCNT_HYST */
<> 150:02e0a0aed4ec 113 #define _PCNT_CTRL_HYST_MASK 0x100UL /**< Bit mask for PCNT_HYST */
<> 150:02e0a0aed4ec 114 #define _PCNT_CTRL_HYST_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 115 #define PCNT_CTRL_HYST_DEFAULT (_PCNT_CTRL_HYST_DEFAULT << 8) /**< Shifted mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 116 #define PCNT_CTRL_S1CDIR (0x1UL << 9) /**< Count direction determined by S1 */
<> 150:02e0a0aed4ec 117 #define _PCNT_CTRL_S1CDIR_SHIFT 9 /**< Shift value for PCNT_S1CDIR */
<> 150:02e0a0aed4ec 118 #define _PCNT_CTRL_S1CDIR_MASK 0x200UL /**< Bit mask for PCNT_S1CDIR */
<> 150:02e0a0aed4ec 119 #define _PCNT_CTRL_S1CDIR_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 120 #define PCNT_CTRL_S1CDIR_DEFAULT (_PCNT_CTRL_S1CDIR_DEFAULT << 9) /**< Shifted mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 121 #define _PCNT_CTRL_CNTEV_SHIFT 10 /**< Shift value for PCNT_CNTEV */
<> 150:02e0a0aed4ec 122 #define _PCNT_CTRL_CNTEV_MASK 0xC00UL /**< Bit mask for PCNT_CNTEV */
<> 150:02e0a0aed4ec 123 #define _PCNT_CTRL_CNTEV_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 124 #define _PCNT_CTRL_CNTEV_BOTH 0x00000000UL /**< Mode BOTH for PCNT_CTRL */
<> 150:02e0a0aed4ec 125 #define _PCNT_CTRL_CNTEV_UP 0x00000001UL /**< Mode UP for PCNT_CTRL */
<> 150:02e0a0aed4ec 126 #define _PCNT_CTRL_CNTEV_DOWN 0x00000002UL /**< Mode DOWN for PCNT_CTRL */
<> 150:02e0a0aed4ec 127 #define _PCNT_CTRL_CNTEV_NONE 0x00000003UL /**< Mode NONE for PCNT_CTRL */
<> 150:02e0a0aed4ec 128 #define PCNT_CTRL_CNTEV_DEFAULT (_PCNT_CTRL_CNTEV_DEFAULT << 10) /**< Shifted mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 129 #define PCNT_CTRL_CNTEV_BOTH (_PCNT_CTRL_CNTEV_BOTH << 10) /**< Shifted mode BOTH for PCNT_CTRL */
<> 150:02e0a0aed4ec 130 #define PCNT_CTRL_CNTEV_UP (_PCNT_CTRL_CNTEV_UP << 10) /**< Shifted mode UP for PCNT_CTRL */
<> 150:02e0a0aed4ec 131 #define PCNT_CTRL_CNTEV_DOWN (_PCNT_CTRL_CNTEV_DOWN << 10) /**< Shifted mode DOWN for PCNT_CTRL */
<> 150:02e0a0aed4ec 132 #define PCNT_CTRL_CNTEV_NONE (_PCNT_CTRL_CNTEV_NONE << 10) /**< Shifted mode NONE for PCNT_CTRL */
<> 150:02e0a0aed4ec 133 #define _PCNT_CTRL_AUXCNTEV_SHIFT 14 /**< Shift value for PCNT_AUXCNTEV */
<> 150:02e0a0aed4ec 134 #define _PCNT_CTRL_AUXCNTEV_MASK 0xC000UL /**< Bit mask for PCNT_AUXCNTEV */
<> 150:02e0a0aed4ec 135 #define _PCNT_CTRL_AUXCNTEV_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 136 #define _PCNT_CTRL_AUXCNTEV_NONE 0x00000000UL /**< Mode NONE for PCNT_CTRL */
<> 150:02e0a0aed4ec 137 #define _PCNT_CTRL_AUXCNTEV_UP 0x00000001UL /**< Mode UP for PCNT_CTRL */
<> 150:02e0a0aed4ec 138 #define _PCNT_CTRL_AUXCNTEV_DOWN 0x00000002UL /**< Mode DOWN for PCNT_CTRL */
<> 150:02e0a0aed4ec 139 #define _PCNT_CTRL_AUXCNTEV_BOTH 0x00000003UL /**< Mode BOTH for PCNT_CTRL */
<> 150:02e0a0aed4ec 140 #define PCNT_CTRL_AUXCNTEV_DEFAULT (_PCNT_CTRL_AUXCNTEV_DEFAULT << 14) /**< Shifted mode DEFAULT for PCNT_CTRL */
<> 150:02e0a0aed4ec 141 #define PCNT_CTRL_AUXCNTEV_NONE (_PCNT_CTRL_AUXCNTEV_NONE << 14) /**< Shifted mode NONE for PCNT_CTRL */
<> 150:02e0a0aed4ec 142 #define PCNT_CTRL_AUXCNTEV_UP (_PCNT_CTRL_AUXCNTEV_UP << 14) /**< Shifted mode UP for PCNT_CTRL */
<> 150:02e0a0aed4ec 143 #define PCNT_CTRL_AUXCNTEV_DOWN (_PCNT_CTRL_AUXCNTEV_DOWN << 14) /**< Shifted mode DOWN for PCNT_CTRL */
<> 150:02e0a0aed4ec 144 #define PCNT_CTRL_AUXCNTEV_BOTH (_PCNT_CTRL_AUXCNTEV_BOTH << 14) /**< Shifted mode BOTH for PCNT_CTRL */
<> 150:02e0a0aed4ec 145
<> 150:02e0a0aed4ec 146 /* Bit fields for PCNT CMD */
<> 150:02e0a0aed4ec 147 #define _PCNT_CMD_RESETVALUE 0x00000000UL /**< Default value for PCNT_CMD */
<> 150:02e0a0aed4ec 148 #define _PCNT_CMD_MASK 0x00000003UL /**< Mask for PCNT_CMD */
<> 150:02e0a0aed4ec 149 #define PCNT_CMD_LCNTIM (0x1UL << 0) /**< Load CNT Immediately */
<> 150:02e0a0aed4ec 150 #define _PCNT_CMD_LCNTIM_SHIFT 0 /**< Shift value for PCNT_LCNTIM */
<> 150:02e0a0aed4ec 151 #define _PCNT_CMD_LCNTIM_MASK 0x1UL /**< Bit mask for PCNT_LCNTIM */
<> 150:02e0a0aed4ec 152 #define _PCNT_CMD_LCNTIM_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CMD */
<> 150:02e0a0aed4ec 153 #define PCNT_CMD_LCNTIM_DEFAULT (_PCNT_CMD_LCNTIM_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_CMD */
<> 150:02e0a0aed4ec 154 #define PCNT_CMD_LTOPBIM (0x1UL << 1) /**< Load TOPB Immediately */
<> 150:02e0a0aed4ec 155 #define _PCNT_CMD_LTOPBIM_SHIFT 1 /**< Shift value for PCNT_LTOPBIM */
<> 150:02e0a0aed4ec 156 #define _PCNT_CMD_LTOPBIM_MASK 0x2UL /**< Bit mask for PCNT_LTOPBIM */
<> 150:02e0a0aed4ec 157 #define _PCNT_CMD_LTOPBIM_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CMD */
<> 150:02e0a0aed4ec 158 #define PCNT_CMD_LTOPBIM_DEFAULT (_PCNT_CMD_LTOPBIM_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_CMD */
<> 150:02e0a0aed4ec 159
<> 150:02e0a0aed4ec 160 /* Bit fields for PCNT STATUS */
<> 150:02e0a0aed4ec 161 #define _PCNT_STATUS_RESETVALUE 0x00000000UL /**< Default value for PCNT_STATUS */
<> 150:02e0a0aed4ec 162 #define _PCNT_STATUS_MASK 0x00000001UL /**< Mask for PCNT_STATUS */
<> 150:02e0a0aed4ec 163 #define PCNT_STATUS_DIR (0x1UL << 0) /**< Current Counter Direction */
<> 150:02e0a0aed4ec 164 #define _PCNT_STATUS_DIR_SHIFT 0 /**< Shift value for PCNT_DIR */
<> 150:02e0a0aed4ec 165 #define _PCNT_STATUS_DIR_MASK 0x1UL /**< Bit mask for PCNT_DIR */
<> 150:02e0a0aed4ec 166 #define _PCNT_STATUS_DIR_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_STATUS */
<> 150:02e0a0aed4ec 167 #define _PCNT_STATUS_DIR_UP 0x00000000UL /**< Mode UP for PCNT_STATUS */
<> 150:02e0a0aed4ec 168 #define _PCNT_STATUS_DIR_DOWN 0x00000001UL /**< Mode DOWN for PCNT_STATUS */
<> 150:02e0a0aed4ec 169 #define PCNT_STATUS_DIR_DEFAULT (_PCNT_STATUS_DIR_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_STATUS */
<> 150:02e0a0aed4ec 170 #define PCNT_STATUS_DIR_UP (_PCNT_STATUS_DIR_UP << 0) /**< Shifted mode UP for PCNT_STATUS */
<> 150:02e0a0aed4ec 171 #define PCNT_STATUS_DIR_DOWN (_PCNT_STATUS_DIR_DOWN << 0) /**< Shifted mode DOWN for PCNT_STATUS */
<> 150:02e0a0aed4ec 172
<> 150:02e0a0aed4ec 173 /* Bit fields for PCNT CNT */
<> 150:02e0a0aed4ec 174 #define _PCNT_CNT_RESETVALUE 0x00000000UL /**< Default value for PCNT_CNT */
<> 150:02e0a0aed4ec 175 #define _PCNT_CNT_MASK 0x0000FFFFUL /**< Mask for PCNT_CNT */
<> 150:02e0a0aed4ec 176 #define _PCNT_CNT_CNT_SHIFT 0 /**< Shift value for PCNT_CNT */
<> 150:02e0a0aed4ec 177 #define _PCNT_CNT_CNT_MASK 0xFFFFUL /**< Bit mask for PCNT_CNT */
<> 150:02e0a0aed4ec 178 #define _PCNT_CNT_CNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CNT */
<> 150:02e0a0aed4ec 179 #define PCNT_CNT_CNT_DEFAULT (_PCNT_CNT_CNT_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_CNT */
<> 150:02e0a0aed4ec 180
<> 150:02e0a0aed4ec 181 /* Bit fields for PCNT TOP */
<> 150:02e0a0aed4ec 182 #define _PCNT_TOP_RESETVALUE 0x000000FFUL /**< Default value for PCNT_TOP */
<> 150:02e0a0aed4ec 183 #define _PCNT_TOP_MASK 0x0000FFFFUL /**< Mask for PCNT_TOP */
<> 150:02e0a0aed4ec 184 #define _PCNT_TOP_TOP_SHIFT 0 /**< Shift value for PCNT_TOP */
<> 150:02e0a0aed4ec 185 #define _PCNT_TOP_TOP_MASK 0xFFFFUL /**< Bit mask for PCNT_TOP */
<> 150:02e0a0aed4ec 186 #define _PCNT_TOP_TOP_DEFAULT 0x000000FFUL /**< Mode DEFAULT for PCNT_TOP */
<> 150:02e0a0aed4ec 187 #define PCNT_TOP_TOP_DEFAULT (_PCNT_TOP_TOP_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_TOP */
<> 150:02e0a0aed4ec 188
<> 150:02e0a0aed4ec 189 /* Bit fields for PCNT TOPB */
<> 150:02e0a0aed4ec 190 #define _PCNT_TOPB_RESETVALUE 0x000000FFUL /**< Default value for PCNT_TOPB */
<> 150:02e0a0aed4ec 191 #define _PCNT_TOPB_MASK 0x0000FFFFUL /**< Mask for PCNT_TOPB */
<> 150:02e0a0aed4ec 192 #define _PCNT_TOPB_TOPB_SHIFT 0 /**< Shift value for PCNT_TOPB */
<> 150:02e0a0aed4ec 193 #define _PCNT_TOPB_TOPB_MASK 0xFFFFUL /**< Bit mask for PCNT_TOPB */
<> 150:02e0a0aed4ec 194 #define _PCNT_TOPB_TOPB_DEFAULT 0x000000FFUL /**< Mode DEFAULT for PCNT_TOPB */
<> 150:02e0a0aed4ec 195 #define PCNT_TOPB_TOPB_DEFAULT (_PCNT_TOPB_TOPB_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_TOPB */
<> 150:02e0a0aed4ec 196
<> 150:02e0a0aed4ec 197 /* Bit fields for PCNT IF */
<> 150:02e0a0aed4ec 198 #define _PCNT_IF_RESETVALUE 0x00000000UL /**< Default value for PCNT_IF */
<> 150:02e0a0aed4ec 199 #define _PCNT_IF_MASK 0x0000000FUL /**< Mask for PCNT_IF */
<> 150:02e0a0aed4ec 200 #define PCNT_IF_UF (0x1UL << 0) /**< Underflow Interrupt Read Flag */
<> 150:02e0a0aed4ec 201 #define _PCNT_IF_UF_SHIFT 0 /**< Shift value for PCNT_UF */
<> 150:02e0a0aed4ec 202 #define _PCNT_IF_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */
<> 150:02e0a0aed4ec 203 #define _PCNT_IF_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */
<> 150:02e0a0aed4ec 204 #define PCNT_IF_UF_DEFAULT (_PCNT_IF_UF_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_IF */
<> 150:02e0a0aed4ec 205 #define PCNT_IF_OF (0x1UL << 1) /**< Overflow Interrupt Read Flag */
<> 150:02e0a0aed4ec 206 #define _PCNT_IF_OF_SHIFT 1 /**< Shift value for PCNT_OF */
<> 150:02e0a0aed4ec 207 #define _PCNT_IF_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */
<> 150:02e0a0aed4ec 208 #define _PCNT_IF_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */
<> 150:02e0a0aed4ec 209 #define PCNT_IF_OF_DEFAULT (_PCNT_IF_OF_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_IF */
<> 150:02e0a0aed4ec 210 #define PCNT_IF_DIRCNG (0x1UL << 2) /**< Direction Change Detect Interrupt Flag */
<> 150:02e0a0aed4ec 211 #define _PCNT_IF_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */
<> 150:02e0a0aed4ec 212 #define _PCNT_IF_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */
<> 150:02e0a0aed4ec 213 #define _PCNT_IF_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */
<> 150:02e0a0aed4ec 214 #define PCNT_IF_DIRCNG_DEFAULT (_PCNT_IF_DIRCNG_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_IF */
<> 150:02e0a0aed4ec 215 #define PCNT_IF_AUXOF (0x1UL << 3) /**< Overflow Interrupt Read Flag */
<> 150:02e0a0aed4ec 216 #define _PCNT_IF_AUXOF_SHIFT 3 /**< Shift value for PCNT_AUXOF */
<> 150:02e0a0aed4ec 217 #define _PCNT_IF_AUXOF_MASK 0x8UL /**< Bit mask for PCNT_AUXOF */
<> 150:02e0a0aed4ec 218 #define _PCNT_IF_AUXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */
<> 150:02e0a0aed4ec 219 #define PCNT_IF_AUXOF_DEFAULT (_PCNT_IF_AUXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for PCNT_IF */
<> 150:02e0a0aed4ec 220
<> 150:02e0a0aed4ec 221 /* Bit fields for PCNT IFS */
<> 150:02e0a0aed4ec 222 #define _PCNT_IFS_RESETVALUE 0x00000000UL /**< Default value for PCNT_IFS */
<> 150:02e0a0aed4ec 223 #define _PCNT_IFS_MASK 0x0000000FUL /**< Mask for PCNT_IFS */
<> 150:02e0a0aed4ec 224 #define PCNT_IFS_UF (0x1UL << 0) /**< Underflow interrupt set */
<> 150:02e0a0aed4ec 225 #define _PCNT_IFS_UF_SHIFT 0 /**< Shift value for PCNT_UF */
<> 150:02e0a0aed4ec 226 #define _PCNT_IFS_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */
<> 150:02e0a0aed4ec 227 #define _PCNT_IFS_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */
<> 150:02e0a0aed4ec 228 #define PCNT_IFS_UF_DEFAULT (_PCNT_IFS_UF_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_IFS */
<> 150:02e0a0aed4ec 229 #define PCNT_IFS_OF (0x1UL << 1) /**< Overflow Interrupt Set */
<> 150:02e0a0aed4ec 230 #define _PCNT_IFS_OF_SHIFT 1 /**< Shift value for PCNT_OF */
<> 150:02e0a0aed4ec 231 #define _PCNT_IFS_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */
<> 150:02e0a0aed4ec 232 #define _PCNT_IFS_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */
<> 150:02e0a0aed4ec 233 #define PCNT_IFS_OF_DEFAULT (_PCNT_IFS_OF_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_IFS */
<> 150:02e0a0aed4ec 234 #define PCNT_IFS_DIRCNG (0x1UL << 2) /**< Direction Change Detect Interrupt Set */
<> 150:02e0a0aed4ec 235 #define _PCNT_IFS_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */
<> 150:02e0a0aed4ec 236 #define _PCNT_IFS_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */
<> 150:02e0a0aed4ec 237 #define _PCNT_IFS_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */
<> 150:02e0a0aed4ec 238 #define PCNT_IFS_DIRCNG_DEFAULT (_PCNT_IFS_DIRCNG_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_IFS */
<> 150:02e0a0aed4ec 239 #define PCNT_IFS_AUXOF (0x1UL << 3) /**< Auxiliary Overflow Interrupt Set */
<> 150:02e0a0aed4ec 240 #define _PCNT_IFS_AUXOF_SHIFT 3 /**< Shift value for PCNT_AUXOF */
<> 150:02e0a0aed4ec 241 #define _PCNT_IFS_AUXOF_MASK 0x8UL /**< Bit mask for PCNT_AUXOF */
<> 150:02e0a0aed4ec 242 #define _PCNT_IFS_AUXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */
<> 150:02e0a0aed4ec 243 #define PCNT_IFS_AUXOF_DEFAULT (_PCNT_IFS_AUXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for PCNT_IFS */
<> 150:02e0a0aed4ec 244
<> 150:02e0a0aed4ec 245 /* Bit fields for PCNT IFC */
<> 150:02e0a0aed4ec 246 #define _PCNT_IFC_RESETVALUE 0x00000000UL /**< Default value for PCNT_IFC */
<> 150:02e0a0aed4ec 247 #define _PCNT_IFC_MASK 0x0000000FUL /**< Mask for PCNT_IFC */
<> 150:02e0a0aed4ec 248 #define PCNT_IFC_UF (0x1UL << 0) /**< Underflow Interrupt Clear */
<> 150:02e0a0aed4ec 249 #define _PCNT_IFC_UF_SHIFT 0 /**< Shift value for PCNT_UF */
<> 150:02e0a0aed4ec 250 #define _PCNT_IFC_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */
<> 150:02e0a0aed4ec 251 #define _PCNT_IFC_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */
<> 150:02e0a0aed4ec 252 #define PCNT_IFC_UF_DEFAULT (_PCNT_IFC_UF_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_IFC */
<> 150:02e0a0aed4ec 253 #define PCNT_IFC_OF (0x1UL << 1) /**< Overflow Interrupt Clear */
<> 150:02e0a0aed4ec 254 #define _PCNT_IFC_OF_SHIFT 1 /**< Shift value for PCNT_OF */
<> 150:02e0a0aed4ec 255 #define _PCNT_IFC_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */
<> 150:02e0a0aed4ec 256 #define _PCNT_IFC_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */
<> 150:02e0a0aed4ec 257 #define PCNT_IFC_OF_DEFAULT (_PCNT_IFC_OF_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_IFC */
<> 150:02e0a0aed4ec 258 #define PCNT_IFC_DIRCNG (0x1UL << 2) /**< Direction Change Detect Interrupt Clear */
<> 150:02e0a0aed4ec 259 #define _PCNT_IFC_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */
<> 150:02e0a0aed4ec 260 #define _PCNT_IFC_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */
<> 150:02e0a0aed4ec 261 #define _PCNT_IFC_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */
<> 150:02e0a0aed4ec 262 #define PCNT_IFC_DIRCNG_DEFAULT (_PCNT_IFC_DIRCNG_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_IFC */
<> 150:02e0a0aed4ec 263 #define PCNT_IFC_AUXOF (0x1UL << 3) /**< Auxiliary Overflow Interrupt Clear */
<> 150:02e0a0aed4ec 264 #define _PCNT_IFC_AUXOF_SHIFT 3 /**< Shift value for PCNT_AUXOF */
<> 150:02e0a0aed4ec 265 #define _PCNT_IFC_AUXOF_MASK 0x8UL /**< Bit mask for PCNT_AUXOF */
<> 150:02e0a0aed4ec 266 #define _PCNT_IFC_AUXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */
<> 150:02e0a0aed4ec 267 #define PCNT_IFC_AUXOF_DEFAULT (_PCNT_IFC_AUXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for PCNT_IFC */
<> 150:02e0a0aed4ec 268
<> 150:02e0a0aed4ec 269 /* Bit fields for PCNT IEN */
<> 150:02e0a0aed4ec 270 #define _PCNT_IEN_RESETVALUE 0x00000000UL /**< Default value for PCNT_IEN */
<> 150:02e0a0aed4ec 271 #define _PCNT_IEN_MASK 0x0000000FUL /**< Mask for PCNT_IEN */
<> 150:02e0a0aed4ec 272 #define PCNT_IEN_UF (0x1UL << 0) /**< Underflow Interrupt Enable */
<> 150:02e0a0aed4ec 273 #define _PCNT_IEN_UF_SHIFT 0 /**< Shift value for PCNT_UF */
<> 150:02e0a0aed4ec 274 #define _PCNT_IEN_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */
<> 150:02e0a0aed4ec 275 #define _PCNT_IEN_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */
<> 150:02e0a0aed4ec 276 #define PCNT_IEN_UF_DEFAULT (_PCNT_IEN_UF_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_IEN */
<> 150:02e0a0aed4ec 277 #define PCNT_IEN_OF (0x1UL << 1) /**< Overflow Interrupt Enable */
<> 150:02e0a0aed4ec 278 #define _PCNT_IEN_OF_SHIFT 1 /**< Shift value for PCNT_OF */
<> 150:02e0a0aed4ec 279 #define _PCNT_IEN_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */
<> 150:02e0a0aed4ec 280 #define _PCNT_IEN_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */
<> 150:02e0a0aed4ec 281 #define PCNT_IEN_OF_DEFAULT (_PCNT_IEN_OF_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_IEN */
<> 150:02e0a0aed4ec 282 #define PCNT_IEN_DIRCNG (0x1UL << 2) /**< Direction Change Detect Interrupt Enable */
<> 150:02e0a0aed4ec 283 #define _PCNT_IEN_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */
<> 150:02e0a0aed4ec 284 #define _PCNT_IEN_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */
<> 150:02e0a0aed4ec 285 #define _PCNT_IEN_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */
<> 150:02e0a0aed4ec 286 #define PCNT_IEN_DIRCNG_DEFAULT (_PCNT_IEN_DIRCNG_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_IEN */
<> 150:02e0a0aed4ec 287 #define PCNT_IEN_AUXOF (0x1UL << 3) /**< Auxiliary Overflow Interrupt Enable */
<> 150:02e0a0aed4ec 288 #define _PCNT_IEN_AUXOF_SHIFT 3 /**< Shift value for PCNT_AUXOF */
<> 150:02e0a0aed4ec 289 #define _PCNT_IEN_AUXOF_MASK 0x8UL /**< Bit mask for PCNT_AUXOF */
<> 150:02e0a0aed4ec 290 #define _PCNT_IEN_AUXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */
<> 150:02e0a0aed4ec 291 #define PCNT_IEN_AUXOF_DEFAULT (_PCNT_IEN_AUXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for PCNT_IEN */
<> 150:02e0a0aed4ec 292
<> 150:02e0a0aed4ec 293 /* Bit fields for PCNT ROUTE */
<> 150:02e0a0aed4ec 294 #define _PCNT_ROUTE_RESETVALUE 0x00000000UL /**< Default value for PCNT_ROUTE */
<> 150:02e0a0aed4ec 295 #define _PCNT_ROUTE_MASK 0x00000700UL /**< Mask for PCNT_ROUTE */
<> 150:02e0a0aed4ec 296 #define _PCNT_ROUTE_LOCATION_SHIFT 8 /**< Shift value for PCNT_LOCATION */
<> 150:02e0a0aed4ec 297 #define _PCNT_ROUTE_LOCATION_MASK 0x700UL /**< Bit mask for PCNT_LOCATION */
<> 150:02e0a0aed4ec 298 #define _PCNT_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for PCNT_ROUTE */
<> 150:02e0a0aed4ec 299 #define _PCNT_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_ROUTE */
<> 150:02e0a0aed4ec 300 #define _PCNT_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for PCNT_ROUTE */
<> 150:02e0a0aed4ec 301 #define _PCNT_ROUTE_LOCATION_LOC2 0x00000002UL /**< Mode LOC2 for PCNT_ROUTE */
<> 150:02e0a0aed4ec 302 #define _PCNT_ROUTE_LOCATION_LOC3 0x00000003UL /**< Mode LOC3 for PCNT_ROUTE */
<> 150:02e0a0aed4ec 303 #define PCNT_ROUTE_LOCATION_LOC0 (_PCNT_ROUTE_LOCATION_LOC0 << 8) /**< Shifted mode LOC0 for PCNT_ROUTE */
<> 150:02e0a0aed4ec 304 #define PCNT_ROUTE_LOCATION_DEFAULT (_PCNT_ROUTE_LOCATION_DEFAULT << 8) /**< Shifted mode DEFAULT for PCNT_ROUTE */
<> 150:02e0a0aed4ec 305 #define PCNT_ROUTE_LOCATION_LOC1 (_PCNT_ROUTE_LOCATION_LOC1 << 8) /**< Shifted mode LOC1 for PCNT_ROUTE */
<> 150:02e0a0aed4ec 306 #define PCNT_ROUTE_LOCATION_LOC2 (_PCNT_ROUTE_LOCATION_LOC2 << 8) /**< Shifted mode LOC2 for PCNT_ROUTE */
<> 150:02e0a0aed4ec 307 #define PCNT_ROUTE_LOCATION_LOC3 (_PCNT_ROUTE_LOCATION_LOC3 << 8) /**< Shifted mode LOC3 for PCNT_ROUTE */
<> 150:02e0a0aed4ec 308
<> 150:02e0a0aed4ec 309 /* Bit fields for PCNT FREEZE */
<> 150:02e0a0aed4ec 310 #define _PCNT_FREEZE_RESETVALUE 0x00000000UL /**< Default value for PCNT_FREEZE */
<> 150:02e0a0aed4ec 311 #define _PCNT_FREEZE_MASK 0x00000001UL /**< Mask for PCNT_FREEZE */
<> 150:02e0a0aed4ec 312 #define PCNT_FREEZE_REGFREEZE (0x1UL << 0) /**< Register Update Freeze */
<> 150:02e0a0aed4ec 313 #define _PCNT_FREEZE_REGFREEZE_SHIFT 0 /**< Shift value for PCNT_REGFREEZE */
<> 150:02e0a0aed4ec 314 #define _PCNT_FREEZE_REGFREEZE_MASK 0x1UL /**< Bit mask for PCNT_REGFREEZE */
<> 150:02e0a0aed4ec 315 #define _PCNT_FREEZE_REGFREEZE_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_FREEZE */
<> 150:02e0a0aed4ec 316 #define _PCNT_FREEZE_REGFREEZE_UPDATE 0x00000000UL /**< Mode UPDATE for PCNT_FREEZE */
<> 150:02e0a0aed4ec 317 #define _PCNT_FREEZE_REGFREEZE_FREEZE 0x00000001UL /**< Mode FREEZE for PCNT_FREEZE */
<> 150:02e0a0aed4ec 318 #define PCNT_FREEZE_REGFREEZE_DEFAULT (_PCNT_FREEZE_REGFREEZE_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_FREEZE */
<> 150:02e0a0aed4ec 319 #define PCNT_FREEZE_REGFREEZE_UPDATE (_PCNT_FREEZE_REGFREEZE_UPDATE << 0) /**< Shifted mode UPDATE for PCNT_FREEZE */
<> 150:02e0a0aed4ec 320 #define PCNT_FREEZE_REGFREEZE_FREEZE (_PCNT_FREEZE_REGFREEZE_FREEZE << 0) /**< Shifted mode FREEZE for PCNT_FREEZE */
<> 150:02e0a0aed4ec 321
<> 150:02e0a0aed4ec 322 /* Bit fields for PCNT SYNCBUSY */
<> 150:02e0a0aed4ec 323 #define _PCNT_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for PCNT_SYNCBUSY */
<> 150:02e0a0aed4ec 324 #define _PCNT_SYNCBUSY_MASK 0x00000007UL /**< Mask for PCNT_SYNCBUSY */
<> 150:02e0a0aed4ec 325 #define PCNT_SYNCBUSY_CTRL (0x1UL << 0) /**< CTRL Register Busy */
<> 150:02e0a0aed4ec 326 #define _PCNT_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for PCNT_CTRL */
<> 150:02e0a0aed4ec 327 #define _PCNT_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for PCNT_CTRL */
<> 150:02e0a0aed4ec 328 #define _PCNT_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_SYNCBUSY */
<> 150:02e0a0aed4ec 329 #define PCNT_SYNCBUSY_CTRL_DEFAULT (_PCNT_SYNCBUSY_CTRL_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_SYNCBUSY */
<> 150:02e0a0aed4ec 330 #define PCNT_SYNCBUSY_CMD (0x1UL << 1) /**< CMD Register Busy */
<> 150:02e0a0aed4ec 331 #define _PCNT_SYNCBUSY_CMD_SHIFT 1 /**< Shift value for PCNT_CMD */
<> 150:02e0a0aed4ec 332 #define _PCNT_SYNCBUSY_CMD_MASK 0x2UL /**< Bit mask for PCNT_CMD */
<> 150:02e0a0aed4ec 333 #define _PCNT_SYNCBUSY_CMD_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_SYNCBUSY */
<> 150:02e0a0aed4ec 334 #define PCNT_SYNCBUSY_CMD_DEFAULT (_PCNT_SYNCBUSY_CMD_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_SYNCBUSY */
<> 150:02e0a0aed4ec 335 #define PCNT_SYNCBUSY_TOPB (0x1UL << 2) /**< TOPB Register Busy */
<> 150:02e0a0aed4ec 336 #define _PCNT_SYNCBUSY_TOPB_SHIFT 2 /**< Shift value for PCNT_TOPB */
<> 150:02e0a0aed4ec 337 #define _PCNT_SYNCBUSY_TOPB_MASK 0x4UL /**< Bit mask for PCNT_TOPB */
<> 150:02e0a0aed4ec 338 #define _PCNT_SYNCBUSY_TOPB_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_SYNCBUSY */
<> 150:02e0a0aed4ec 339 #define PCNT_SYNCBUSY_TOPB_DEFAULT (_PCNT_SYNCBUSY_TOPB_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_SYNCBUSY */
<> 150:02e0a0aed4ec 340
<> 150:02e0a0aed4ec 341 /* Bit fields for PCNT AUXCNT */
<> 150:02e0a0aed4ec 342 #define _PCNT_AUXCNT_RESETVALUE 0x00000000UL /**< Default value for PCNT_AUXCNT */
<> 150:02e0a0aed4ec 343 #define _PCNT_AUXCNT_MASK 0x0000FFFFUL /**< Mask for PCNT_AUXCNT */
<> 150:02e0a0aed4ec 344 #define _PCNT_AUXCNT_AUXCNT_SHIFT 0 /**< Shift value for PCNT_AUXCNT */
<> 150:02e0a0aed4ec 345 #define _PCNT_AUXCNT_AUXCNT_MASK 0xFFFFUL /**< Bit mask for PCNT_AUXCNT */
<> 150:02e0a0aed4ec 346 #define _PCNT_AUXCNT_AUXCNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_AUXCNT */
<> 150:02e0a0aed4ec 347 #define PCNT_AUXCNT_AUXCNT_DEFAULT (_PCNT_AUXCNT_AUXCNT_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_AUXCNT */
<> 150:02e0a0aed4ec 348
<> 150:02e0a0aed4ec 349 /* Bit fields for PCNT INPUT */
<> 150:02e0a0aed4ec 350 #define _PCNT_INPUT_RESETVALUE 0x00000000UL /**< Default value for PCNT_INPUT */
<> 150:02e0a0aed4ec 351 #define _PCNT_INPUT_MASK 0x000007DFUL /**< Mask for PCNT_INPUT */
<> 150:02e0a0aed4ec 352 #define _PCNT_INPUT_S0PRSSEL_SHIFT 0 /**< Shift value for PCNT_S0PRSSEL */
<> 150:02e0a0aed4ec 353 #define _PCNT_INPUT_S0PRSSEL_MASK 0xFUL /**< Bit mask for PCNT_S0PRSSEL */
<> 150:02e0a0aed4ec 354 #define _PCNT_INPUT_S0PRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_INPUT */
<> 150:02e0a0aed4ec 355 #define _PCNT_INPUT_S0PRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for PCNT_INPUT */
<> 150:02e0a0aed4ec 356 #define _PCNT_INPUT_S0PRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for PCNT_INPUT */
<> 150:02e0a0aed4ec 357 #define _PCNT_INPUT_S0PRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for PCNT_INPUT */
<> 150:02e0a0aed4ec 358 #define _PCNT_INPUT_S0PRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for PCNT_INPUT */
<> 150:02e0a0aed4ec 359 #define _PCNT_INPUT_S0PRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for PCNT_INPUT */
<> 150:02e0a0aed4ec 360 #define _PCNT_INPUT_S0PRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for PCNT_INPUT */
<> 150:02e0a0aed4ec 361 #define _PCNT_INPUT_S0PRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for PCNT_INPUT */
<> 150:02e0a0aed4ec 362 #define _PCNT_INPUT_S0PRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for PCNT_INPUT */
<> 150:02e0a0aed4ec 363 #define _PCNT_INPUT_S0PRSSEL_PRSCH8 0x00000008UL /**< Mode PRSCH8 for PCNT_INPUT */
<> 150:02e0a0aed4ec 364 #define _PCNT_INPUT_S0PRSSEL_PRSCH9 0x00000009UL /**< Mode PRSCH9 for PCNT_INPUT */
<> 150:02e0a0aed4ec 365 #define _PCNT_INPUT_S0PRSSEL_PRSCH10 0x0000000AUL /**< Mode PRSCH10 for PCNT_INPUT */
<> 150:02e0a0aed4ec 366 #define _PCNT_INPUT_S0PRSSEL_PRSCH11 0x0000000BUL /**< Mode PRSCH11 for PCNT_INPUT */
<> 150:02e0a0aed4ec 367 #define PCNT_INPUT_S0PRSSEL_DEFAULT (_PCNT_INPUT_S0PRSSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_INPUT */
<> 150:02e0a0aed4ec 368 #define PCNT_INPUT_S0PRSSEL_PRSCH0 (_PCNT_INPUT_S0PRSSEL_PRSCH0 << 0) /**< Shifted mode PRSCH0 for PCNT_INPUT */
<> 150:02e0a0aed4ec 369 #define PCNT_INPUT_S0PRSSEL_PRSCH1 (_PCNT_INPUT_S0PRSSEL_PRSCH1 << 0) /**< Shifted mode PRSCH1 for PCNT_INPUT */
<> 150:02e0a0aed4ec 370 #define PCNT_INPUT_S0PRSSEL_PRSCH2 (_PCNT_INPUT_S0PRSSEL_PRSCH2 << 0) /**< Shifted mode PRSCH2 for PCNT_INPUT */
<> 150:02e0a0aed4ec 371 #define PCNT_INPUT_S0PRSSEL_PRSCH3 (_PCNT_INPUT_S0PRSSEL_PRSCH3 << 0) /**< Shifted mode PRSCH3 for PCNT_INPUT */
<> 150:02e0a0aed4ec 372 #define PCNT_INPUT_S0PRSSEL_PRSCH4 (_PCNT_INPUT_S0PRSSEL_PRSCH4 << 0) /**< Shifted mode PRSCH4 for PCNT_INPUT */
<> 150:02e0a0aed4ec 373 #define PCNT_INPUT_S0PRSSEL_PRSCH5 (_PCNT_INPUT_S0PRSSEL_PRSCH5 << 0) /**< Shifted mode PRSCH5 for PCNT_INPUT */
<> 150:02e0a0aed4ec 374 #define PCNT_INPUT_S0PRSSEL_PRSCH6 (_PCNT_INPUT_S0PRSSEL_PRSCH6 << 0) /**< Shifted mode PRSCH6 for PCNT_INPUT */
<> 150:02e0a0aed4ec 375 #define PCNT_INPUT_S0PRSSEL_PRSCH7 (_PCNT_INPUT_S0PRSSEL_PRSCH7 << 0) /**< Shifted mode PRSCH7 for PCNT_INPUT */
<> 150:02e0a0aed4ec 376 #define PCNT_INPUT_S0PRSSEL_PRSCH8 (_PCNT_INPUT_S0PRSSEL_PRSCH8 << 0) /**< Shifted mode PRSCH8 for PCNT_INPUT */
<> 150:02e0a0aed4ec 377 #define PCNT_INPUT_S0PRSSEL_PRSCH9 (_PCNT_INPUT_S0PRSSEL_PRSCH9 << 0) /**< Shifted mode PRSCH9 for PCNT_INPUT */
<> 150:02e0a0aed4ec 378 #define PCNT_INPUT_S0PRSSEL_PRSCH10 (_PCNT_INPUT_S0PRSSEL_PRSCH10 << 0) /**< Shifted mode PRSCH10 for PCNT_INPUT */
<> 150:02e0a0aed4ec 379 #define PCNT_INPUT_S0PRSSEL_PRSCH11 (_PCNT_INPUT_S0PRSSEL_PRSCH11 << 0) /**< Shifted mode PRSCH11 for PCNT_INPUT */
<> 150:02e0a0aed4ec 380 #define PCNT_INPUT_S0PRSEN (0x1UL << 4) /**< S0IN PRS Enable */
<> 150:02e0a0aed4ec 381 #define _PCNT_INPUT_S0PRSEN_SHIFT 4 /**< Shift value for PCNT_S0PRSEN */
<> 150:02e0a0aed4ec 382 #define _PCNT_INPUT_S0PRSEN_MASK 0x10UL /**< Bit mask for PCNT_S0PRSEN */
<> 150:02e0a0aed4ec 383 #define _PCNT_INPUT_S0PRSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_INPUT */
<> 150:02e0a0aed4ec 384 #define PCNT_INPUT_S0PRSEN_DEFAULT (_PCNT_INPUT_S0PRSEN_DEFAULT << 4) /**< Shifted mode DEFAULT for PCNT_INPUT */
<> 150:02e0a0aed4ec 385 #define _PCNT_INPUT_S1PRSSEL_SHIFT 6 /**< Shift value for PCNT_S1PRSSEL */
<> 150:02e0a0aed4ec 386 #define _PCNT_INPUT_S1PRSSEL_MASK 0x3C0UL /**< Bit mask for PCNT_S1PRSSEL */
<> 150:02e0a0aed4ec 387 #define _PCNT_INPUT_S1PRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_INPUT */
<> 150:02e0a0aed4ec 388 #define _PCNT_INPUT_S1PRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for PCNT_INPUT */
<> 150:02e0a0aed4ec 389 #define _PCNT_INPUT_S1PRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for PCNT_INPUT */
<> 150:02e0a0aed4ec 390 #define _PCNT_INPUT_S1PRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for PCNT_INPUT */
<> 150:02e0a0aed4ec 391 #define _PCNT_INPUT_S1PRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for PCNT_INPUT */
<> 150:02e0a0aed4ec 392 #define _PCNT_INPUT_S1PRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for PCNT_INPUT */
<> 150:02e0a0aed4ec 393 #define _PCNT_INPUT_S1PRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for PCNT_INPUT */
<> 150:02e0a0aed4ec 394 #define _PCNT_INPUT_S1PRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for PCNT_INPUT */
<> 150:02e0a0aed4ec 395 #define _PCNT_INPUT_S1PRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for PCNT_INPUT */
<> 150:02e0a0aed4ec 396 #define _PCNT_INPUT_S1PRSSEL_PRSCH8 0x00000008UL /**< Mode PRSCH8 for PCNT_INPUT */
<> 150:02e0a0aed4ec 397 #define _PCNT_INPUT_S1PRSSEL_PRSCH9 0x00000009UL /**< Mode PRSCH9 for PCNT_INPUT */
<> 150:02e0a0aed4ec 398 #define _PCNT_INPUT_S1PRSSEL_PRSCH10 0x0000000AUL /**< Mode PRSCH10 for PCNT_INPUT */
<> 150:02e0a0aed4ec 399 #define _PCNT_INPUT_S1PRSSEL_PRSCH11 0x0000000BUL /**< Mode PRSCH11 for PCNT_INPUT */
<> 150:02e0a0aed4ec 400 #define PCNT_INPUT_S1PRSSEL_DEFAULT (_PCNT_INPUT_S1PRSSEL_DEFAULT << 6) /**< Shifted mode DEFAULT for PCNT_INPUT */
<> 150:02e0a0aed4ec 401 #define PCNT_INPUT_S1PRSSEL_PRSCH0 (_PCNT_INPUT_S1PRSSEL_PRSCH0 << 6) /**< Shifted mode PRSCH0 for PCNT_INPUT */
<> 150:02e0a0aed4ec 402 #define PCNT_INPUT_S1PRSSEL_PRSCH1 (_PCNT_INPUT_S1PRSSEL_PRSCH1 << 6) /**< Shifted mode PRSCH1 for PCNT_INPUT */
<> 150:02e0a0aed4ec 403 #define PCNT_INPUT_S1PRSSEL_PRSCH2 (_PCNT_INPUT_S1PRSSEL_PRSCH2 << 6) /**< Shifted mode PRSCH2 for PCNT_INPUT */
<> 150:02e0a0aed4ec 404 #define PCNT_INPUT_S1PRSSEL_PRSCH3 (_PCNT_INPUT_S1PRSSEL_PRSCH3 << 6) /**< Shifted mode PRSCH3 for PCNT_INPUT */
<> 150:02e0a0aed4ec 405 #define PCNT_INPUT_S1PRSSEL_PRSCH4 (_PCNT_INPUT_S1PRSSEL_PRSCH4 << 6) /**< Shifted mode PRSCH4 for PCNT_INPUT */
<> 150:02e0a0aed4ec 406 #define PCNT_INPUT_S1PRSSEL_PRSCH5 (_PCNT_INPUT_S1PRSSEL_PRSCH5 << 6) /**< Shifted mode PRSCH5 for PCNT_INPUT */
<> 150:02e0a0aed4ec 407 #define PCNT_INPUT_S1PRSSEL_PRSCH6 (_PCNT_INPUT_S1PRSSEL_PRSCH6 << 6) /**< Shifted mode PRSCH6 for PCNT_INPUT */
<> 150:02e0a0aed4ec 408 #define PCNT_INPUT_S1PRSSEL_PRSCH7 (_PCNT_INPUT_S1PRSSEL_PRSCH7 << 6) /**< Shifted mode PRSCH7 for PCNT_INPUT */
<> 150:02e0a0aed4ec 409 #define PCNT_INPUT_S1PRSSEL_PRSCH8 (_PCNT_INPUT_S1PRSSEL_PRSCH8 << 6) /**< Shifted mode PRSCH8 for PCNT_INPUT */
<> 150:02e0a0aed4ec 410 #define PCNT_INPUT_S1PRSSEL_PRSCH9 (_PCNT_INPUT_S1PRSSEL_PRSCH9 << 6) /**< Shifted mode PRSCH9 for PCNT_INPUT */
<> 150:02e0a0aed4ec 411 #define PCNT_INPUT_S1PRSSEL_PRSCH10 (_PCNT_INPUT_S1PRSSEL_PRSCH10 << 6) /**< Shifted mode PRSCH10 for PCNT_INPUT */
<> 150:02e0a0aed4ec 412 #define PCNT_INPUT_S1PRSSEL_PRSCH11 (_PCNT_INPUT_S1PRSSEL_PRSCH11 << 6) /**< Shifted mode PRSCH11 for PCNT_INPUT */
<> 150:02e0a0aed4ec 413 #define PCNT_INPUT_S1PRSEN (0x1UL << 10) /**< S1IN PRS Enable */
<> 150:02e0a0aed4ec 414 #define _PCNT_INPUT_S1PRSEN_SHIFT 10 /**< Shift value for PCNT_S1PRSEN */
<> 150:02e0a0aed4ec 415 #define _PCNT_INPUT_S1PRSEN_MASK 0x400UL /**< Bit mask for PCNT_S1PRSEN */
<> 150:02e0a0aed4ec 416 #define _PCNT_INPUT_S1PRSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_INPUT */
<> 150:02e0a0aed4ec 417 #define PCNT_INPUT_S1PRSEN_DEFAULT (_PCNT_INPUT_S1PRSEN_DEFAULT << 10) /**< Shifted mode DEFAULT for PCNT_INPUT */
<> 150:02e0a0aed4ec 418
<> 150:02e0a0aed4ec 419 /** @} End of group EFM32WG_PCNT */
<> 150:02e0a0aed4ec 420 /** @} End of group Parts */
<> 150:02e0a0aed4ec 421