Fawwaz Nadzmy / mbed-STM

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by mbed official

targets/TARGET_STM/TARGET_STM32F7/gpio_irq_api.c@153:9398a535854b, 2016-12-22 (annotated)

Committer:
fwndz
Date:
Thu Dec 22 05:12:40 2016 +0000
Revision:
153:9398a535854b
Parent:
149:156823d33999 
device target maximize

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 *******************************************************************************
<> 149:156823d33999 3 * Copyright (c) 2015, STMicroelectronics
<> 149:156823d33999 4 * All rights reserved.
<> 149:156823d33999 5 *
<> 149:156823d33999 6 * Redistribution and use in source and binary forms, with or without
<> 149:156823d33999 7 * modification, are permitted provided that the following conditions are met:
<> 149:156823d33999 8 *
<> 149:156823d33999 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 10 * this list of conditions and the following disclaimer.
<> 149:156823d33999 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 12 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 13 * and/or other materials provided with the distribution.
<> 149:156823d33999 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 15 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 16 * without specific prior written permission.
<> 149:156823d33999 17 *
<> 149:156823d33999 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 28 *******************************************************************************
<> 149:156823d33999 29 */
<> 149:156823d33999 30 #include <stddef.h>
<> 149:156823d33999 31 #include "cmsis.h"
<> 149:156823d33999 32 #include "gpio_irq_api.h"
<> 149:156823d33999 33 #include "pinmap.h"
<> 149:156823d33999 34 #include "mbed_error.h"
<> 149:156823d33999 35
<> 149:156823d33999 36 #define EDGE_NONE (0)
<> 149:156823d33999 37 #define EDGE_RISE (1)
<> 149:156823d33999 38 #define EDGE_FALL (2)
<> 149:156823d33999 39 #define EDGE_BOTH (3)
<> 149:156823d33999 40
<> 149:156823d33999 41 // Number of EXTI irq vectors (EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5_9, EXTI10_15)
<> 149:156823d33999 42 #define CHANNEL_NUM (7)
<> 149:156823d33999 43
<> 149:156823d33999 44 // Max pins for one line (max with EXTI10_15)
<> 149:156823d33999 45 #define MAX_PIN_LINE (6)
<> 149:156823d33999 46
<> 149:156823d33999 47 typedef struct gpio_channel {
<> 149:156823d33999 48 uint32_t pin_mask; // bitmask representing which pins are configured for receiving interrupts
<> 149:156823d33999 49 uint32_t channel_ids[MAX_PIN_LINE]; // mbed "gpio_irq_t gpio_irq" field of instance
<> 149:156823d33999 50 uint32_t channel_gpio[MAX_PIN_LINE]; // base address of gpio port group
<> 149:156823d33999 51 uint32_t channel_pin[MAX_PIN_LINE]; // pin number in port group
<> 149:156823d33999 52 } gpio_channel_t;
<> 149:156823d33999 53
<> 149:156823d33999 54 static gpio_channel_t channels[CHANNEL_NUM] = {
<> 149:156823d33999 55 {.pin_mask = 0},
<> 149:156823d33999 56 {.pin_mask = 0},
<> 149:156823d33999 57 {.pin_mask = 0},
<> 149:156823d33999 58 {.pin_mask = 0},
<> 149:156823d33999 59 {.pin_mask = 0},
<> 149:156823d33999 60 {.pin_mask = 0},
<> 149:156823d33999 61 {.pin_mask = 0}
<> 149:156823d33999 62 };
<> 149:156823d33999 63
<> 149:156823d33999 64 // Used to return the index for channels array.
<> 149:156823d33999 65 static uint32_t pin_base_nr[16] = {
<> 149:156823d33999 66 // EXTI0
<> 149:156823d33999 67 0, // pin 0
<> 149:156823d33999 68 // EXTI1
<> 149:156823d33999 69 0, // pin 1
<> 149:156823d33999 70 // EXTI2
<> 149:156823d33999 71 0, // pin 2
<> 149:156823d33999 72 // EXTI3
<> 149:156823d33999 73 0, // pin 3
<> 149:156823d33999 74 // EXTI4
<> 149:156823d33999 75 0, // pin 4
<> 149:156823d33999 76 // EXTI5_9
<> 149:156823d33999 77 0, // pin 5
<> 149:156823d33999 78 1, // pin 6
<> 149:156823d33999 79 2, // pin 7
<> 149:156823d33999 80 3, // pin 8
<> 149:156823d33999 81 4, // pin 9
<> 149:156823d33999 82 // EXTI10_15
<> 149:156823d33999 83 0, // pin 10
<> 149:156823d33999 84 1, // pin 11
<> 149:156823d33999 85 2, // pin 12
<> 149:156823d33999 86 3, // pin 13
<> 149:156823d33999 87 4, // pin 14
<> 149:156823d33999 88 5 // pin 15
<> 149:156823d33999 89 };
<> 149:156823d33999 90
<> 149:156823d33999 91 static gpio_irq_handler irq_handler;
<> 149:156823d33999 92
<> 149:156823d33999 93 static void handle_interrupt_in(uint32_t irq_index, uint32_t max_num_pin_line)
<> 149:156823d33999 94 {
<> 149:156823d33999 95 gpio_channel_t *gpio_channel = &channels[irq_index];
<> 149:156823d33999 96 uint32_t gpio_idx;
<> 149:156823d33999 97
<> 149:156823d33999 98 for (gpio_idx = 0; gpio_idx < max_num_pin_line; gpio_idx++) {
<> 149:156823d33999 99 uint32_t current_mask = (1 << gpio_idx);
<> 149:156823d33999 100
<> 149:156823d33999 101 if (gpio_channel->pin_mask & current_mask) {
<> 149:156823d33999 102 // Retrieve the gpio and pin that generate the irq
<> 149:156823d33999 103 GPIO_TypeDef *gpio = (GPIO_TypeDef *)(gpio_channel->channel_gpio[gpio_idx]);
<> 149:156823d33999 104 uint32_t pin = (uint32_t)(1 << (gpio_channel->channel_pin[gpio_idx]));
<> 149:156823d33999 105
<> 149:156823d33999 106 // Clear interrupt flag
<> 149:156823d33999 107 if (__HAL_GPIO_EXTI_GET_FLAG(pin) != RESET) {
<> 149:156823d33999 108 __HAL_GPIO_EXTI_CLEAR_FLAG(pin);
<> 149:156823d33999 109
<> 149:156823d33999 110 if (gpio_channel->channel_ids[gpio_idx] == 0) continue;
<> 149:156823d33999 111
<> 149:156823d33999 112 // Check which edge has generated the irq
<> 149:156823d33999 113 if ((gpio->IDR & pin) == 0) {
<> 149:156823d33999 114 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_FALL);
<> 149:156823d33999 115 } else {
<> 149:156823d33999 116 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_RISE);
<> 149:156823d33999 117 }
<> 149:156823d33999 118 }
<> 149:156823d33999 119 }
<> 149:156823d33999 120 }
<> 149:156823d33999 121 }
<> 149:156823d33999 122
<> 149:156823d33999 123 // EXTI line 0
<> 149:156823d33999 124 static void gpio_irq0(void)
<> 149:156823d33999 125 {
<> 149:156823d33999 126 handle_interrupt_in(0, 1);
<> 149:156823d33999 127 }
<> 149:156823d33999 128
<> 149:156823d33999 129 // EXTI line 1
<> 149:156823d33999 130 static void gpio_irq1(void)
<> 149:156823d33999 131 {
<> 149:156823d33999 132 handle_interrupt_in(1, 1);
<> 149:156823d33999 133 }
<> 149:156823d33999 134
<> 149:156823d33999 135 // EXTI line 2
<> 149:156823d33999 136 static void gpio_irq2(void)
<> 149:156823d33999 137 {
<> 149:156823d33999 138 handle_interrupt_in(2, 1);
<> 149:156823d33999 139 }
<> 149:156823d33999 140
<> 149:156823d33999 141 // EXTI line 3
<> 149:156823d33999 142 static void gpio_irq3(void)
<> 149:156823d33999 143 {
<> 149:156823d33999 144 handle_interrupt_in(3, 1);
<> 149:156823d33999 145 }
<> 149:156823d33999 146
<> 149:156823d33999 147 // EXTI line 4
<> 149:156823d33999 148 static void gpio_irq4(void)
<> 149:156823d33999 149 {
<> 149:156823d33999 150 handle_interrupt_in(4, 1);
<> 149:156823d33999 151 }
<> 149:156823d33999 152
<> 149:156823d33999 153 // EXTI lines 5 to 9
<> 149:156823d33999 154 static void gpio_irq5(void)
<> 149:156823d33999 155 {
<> 149:156823d33999 156 handle_interrupt_in(5, 5);
<> 149:156823d33999 157 }
<> 149:156823d33999 158
<> 149:156823d33999 159 // EXTI lines 10 to 15
<> 149:156823d33999 160 static void gpio_irq6(void)
<> 149:156823d33999 161 {
<> 149:156823d33999 162 handle_interrupt_in(6, 6);
<> 149:156823d33999 163 }
<> 149:156823d33999 164
<> 149:156823d33999 165 extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
<> 149:156823d33999 166 extern void pin_function_gpiomode(PinName pin, uint32_t gpiomode);
<> 149:156823d33999 167
<> 149:156823d33999 168 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
<> 149:156823d33999 169 {
<> 149:156823d33999 170 IRQn_Type irq_n = (IRQn_Type)0;
<> 149:156823d33999 171 uint32_t vector = 0;
<> 149:156823d33999 172 uint32_t irq_index;
<> 149:156823d33999 173 gpio_channel_t *gpio_channel;
<> 149:156823d33999 174 uint32_t gpio_idx;
<> 149:156823d33999 175
<> 149:156823d33999 176 if (pin == NC) return -1;
<> 149:156823d33999 177
<> 149:156823d33999 178 uint32_t port_index = STM_PORT(pin);
<> 149:156823d33999 179 uint32_t pin_index = STM_PIN(pin);
<> 149:156823d33999 180
<> 149:156823d33999 181 // Select irq number and interrupt routine
<> 149:156823d33999 182 switch (pin_index) {
<> 149:156823d33999 183 case 0:
<> 149:156823d33999 184 irq_n = EXTI0_IRQn;
<> 149:156823d33999 185 vector = (uint32_t)&gpio_irq0;
<> 149:156823d33999 186 irq_index = 0;
<> 149:156823d33999 187 break;
<> 149:156823d33999 188 case 1:
<> 149:156823d33999 189 irq_n = EXTI1_IRQn;
<> 149:156823d33999 190 vector = (uint32_t)&gpio_irq1;
<> 149:156823d33999 191 irq_index = 1;
<> 149:156823d33999 192 break;
<> 149:156823d33999 193 case 2:
<> 149:156823d33999 194 irq_n = EXTI2_IRQn;
<> 149:156823d33999 195 vector = (uint32_t)&gpio_irq2;
<> 149:156823d33999 196 irq_index = 2;
<> 149:156823d33999 197 break;
<> 149:156823d33999 198 case 3:
<> 149:156823d33999 199 irq_n = EXTI3_IRQn;
<> 149:156823d33999 200 vector = (uint32_t)&gpio_irq3;
<> 149:156823d33999 201 irq_index = 3;
<> 149:156823d33999 202 break;
<> 149:156823d33999 203 case 4:
<> 149:156823d33999 204 irq_n = EXTI4_IRQn;
<> 149:156823d33999 205 vector = (uint32_t)&gpio_irq4;
<> 149:156823d33999 206 irq_index = 4;
<> 149:156823d33999 207 break;
<> 149:156823d33999 208 case 5:
<> 149:156823d33999 209 case 6:
<> 149:156823d33999 210 case 7:
<> 149:156823d33999 211 case 8:
<> 149:156823d33999 212 case 9:
<> 149:156823d33999 213 irq_n = EXTI9_5_IRQn;
<> 149:156823d33999 214 vector = (uint32_t)&gpio_irq5;
<> 149:156823d33999 215 irq_index = 5;
<> 149:156823d33999 216 break;
<> 149:156823d33999 217 case 10:
<> 149:156823d33999 218 case 11:
<> 149:156823d33999 219 case 12:
<> 149:156823d33999 220 case 13:
<> 149:156823d33999 221 case 14:
<> 149:156823d33999 222 case 15:
<> 149:156823d33999 223 irq_n = EXTI15_10_IRQn;
<> 149:156823d33999 224 vector = (uint32_t)&gpio_irq6;
<> 149:156823d33999 225 irq_index = 6;
<> 149:156823d33999 226 break;
<> 149:156823d33999 227 default:
<> 149:156823d33999 228 error("InterruptIn error: pin not supported.\n");
<> 149:156823d33999 229 return -1;
<> 149:156823d33999 230 }
<> 149:156823d33999 231
<> 149:156823d33999 232 // Enable GPIO clock
<> 149:156823d33999 233 uint32_t gpio_add = Set_GPIO_Clock(port_index);
<> 149:156823d33999 234
<> 149:156823d33999 235 // Configure GPIO
<> 149:156823d33999 236 pin_function(pin, STM_PIN_DATA(STM_MODE_IT_FALLING, GPIO_NOPULL, 0));
<> 149:156823d33999 237
<> 149:156823d33999 238 // Enable EXTI interrupt
<> 149:156823d33999 239 NVIC_SetVector(irq_n, vector);
<> 149:156823d33999 240 NVIC_EnableIRQ(irq_n);
<> 149:156823d33999 241
<> 149:156823d33999 242 // Save informations for future use
<> 149:156823d33999 243 obj->irq_n = irq_n;
<> 149:156823d33999 244 obj->irq_index = irq_index;
<> 149:156823d33999 245 obj->event = EDGE_NONE;
<> 149:156823d33999 246 obj->pin = pin;
<> 149:156823d33999 247
<> 149:156823d33999 248 gpio_channel = &channels[irq_index];
<> 149:156823d33999 249 gpio_idx = pin_base_nr[pin_index];
<> 149:156823d33999 250 gpio_channel->pin_mask |= (1 << gpio_idx);
<> 149:156823d33999 251 gpio_channel->channel_ids[gpio_idx] = id;
<> 149:156823d33999 252 gpio_channel->channel_gpio[gpio_idx] = gpio_add;
<> 149:156823d33999 253 gpio_channel->channel_pin[gpio_idx] = pin_index;
<> 149:156823d33999 254
<> 149:156823d33999 255 irq_handler = handler;
<> 149:156823d33999 256
<> 149:156823d33999 257 return 0;
<> 149:156823d33999 258 }
<> 149:156823d33999 259
<> 149:156823d33999 260 void gpio_irq_free(gpio_irq_t *obj)
<> 149:156823d33999 261 {
<> 149:156823d33999 262 gpio_channel_t *gpio_channel = &channels[obj->irq_index];
<> 149:156823d33999 263 uint32_t pin_index = STM_PIN(obj->pin);
<> 149:156823d33999 264 uint32_t gpio_idx = pin_base_nr[pin_index];
<> 149:156823d33999 265
<> 149:156823d33999 266 gpio_channel->pin_mask &= ~(1 << gpio_idx);
<> 149:156823d33999 267 gpio_channel->channel_ids[gpio_idx] = 0;
<> 149:156823d33999 268 gpio_channel->channel_gpio[gpio_idx] = 0;
<> 149:156823d33999 269 gpio_channel->channel_pin[gpio_idx] = 0;
<> 149:156823d33999 270
<> 149:156823d33999 271 // Disable EXTI line, but don't change pull-up config
<> 149:156823d33999 272 pin_function_gpiomode(obj->pin, STM_MODE_INPUT);
<> 149:156823d33999 273 obj->event = EDGE_NONE;
<> 149:156823d33999 274 }
<> 149:156823d33999 275
<> 149:156823d33999 276 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
<> 149:156823d33999 277 {
<> 149:156823d33999 278 uint32_t mode = STM_MODE_IT_EVT_RESET;
<> 149:156823d33999 279
<> 149:156823d33999 280 if (enable) {
<> 149:156823d33999 281 if (event == IRQ_RISE) {
<> 149:156823d33999 282 if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
<> 149:156823d33999 283 mode = STM_MODE_IT_RISING_FALLING;
<> 149:156823d33999 284 obj->event = EDGE_BOTH;
<> 149:156823d33999 285 } else { // NONE or RISE
<> 149:156823d33999 286 mode = STM_MODE_IT_RISING;
<> 149:156823d33999 287 obj->event = EDGE_RISE;
<> 149:156823d33999 288 }
<> 149:156823d33999 289 }
<> 149:156823d33999 290 if (event == IRQ_FALL) {
<> 149:156823d33999 291 if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
<> 149:156823d33999 292 mode = STM_MODE_IT_RISING_FALLING;
<> 149:156823d33999 293 obj->event = EDGE_BOTH;
<> 149:156823d33999 294 } else { // NONE or FALL
<> 149:156823d33999 295 mode = STM_MODE_IT_FALLING;
<> 149:156823d33999 296 obj->event = EDGE_FALL;
<> 149:156823d33999 297 }
<> 149:156823d33999 298 }
<> 149:156823d33999 299 } else { // Disable
<> 149:156823d33999 300 if (event == IRQ_RISE) {
<> 149:156823d33999 301 if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
<> 149:156823d33999 302 mode = STM_MODE_IT_FALLING;
<> 149:156823d33999 303 obj->event = EDGE_FALL;
<> 149:156823d33999 304 } else { // NONE or RISE
<> 149:156823d33999 305 mode = STM_MODE_IT_EVT_RESET;
<> 149:156823d33999 306 obj->event = EDGE_NONE;
<> 149:156823d33999 307 }
<> 149:156823d33999 308 }
<> 149:156823d33999 309 if (event == IRQ_FALL) {
<> 149:156823d33999 310 if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
<> 149:156823d33999 311 mode = STM_MODE_IT_RISING;
<> 149:156823d33999 312 obj->event = EDGE_RISE;
<> 149:156823d33999 313 } else { // NONE or FALL
<> 149:156823d33999 314 mode = STM_MODE_IT_EVT_RESET;
<> 149:156823d33999 315 obj->event = EDGE_NONE;
<> 149:156823d33999 316 }
<> 149:156823d33999 317 }
<> 149:156823d33999 318 }
<> 149:156823d33999 319
<> 149:156823d33999 320 pin_function_gpiomode(obj->pin, mode);
<> 149:156823d33999 321 }
<> 149:156823d33999 322
<> 149:156823d33999 323 void gpio_irq_enable(gpio_irq_t *obj)
<> 149:156823d33999 324 {
<> 149:156823d33999 325 NVIC_EnableIRQ(obj->irq_n);
<> 149:156823d33999 326 }
<> 149:156823d33999 327
<> 149:156823d33999 328 void gpio_irq_disable(gpio_irq_t *obj)
<> 149:156823d33999 329 {
<> 149:156823d33999 330 NVIC_DisableIRQ(obj->irq_n);
<> 149:156823d33999 331 obj->event = EDGE_NONE;
<> 149:156823d33999 332 }