mbed library sources. Supersedes mbed-src.
Fork of mbed-dev by
targets/TARGET_NORDIC/TARGET_NRF5/port_api.c@153:9398a535854b, 2016-12-22 (annotated)
- Committer:
- fwndz
- Date:
- Thu Dec 22 05:12:40 2016 +0000
- Revision:
- 153:9398a535854b
- Parent:
- 149:156823d33999
device target maximize
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2013 Nordic Semiconductor ASA |
<> | 144:ef7eb2e8f9f7 | 3 | * All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 4 | * |
<> | 144:ef7eb2e8f9f7 | 5 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 6 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * 1. Redistributions of source code must retain the above copyright notice, this list |
<> | 144:ef7eb2e8f9f7 | 9 | * of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 10 | * |
<> | 144:ef7eb2e8f9f7 | 11 | * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA |
<> | 144:ef7eb2e8f9f7 | 12 | * integrated circuit in a product or a software update for such product, must reproduce |
<> | 144:ef7eb2e8f9f7 | 13 | * the above copyright notice, this list of conditions and the following disclaimer in |
<> | 144:ef7eb2e8f9f7 | 14 | * the documentation and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 15 | * |
<> | 144:ef7eb2e8f9f7 | 16 | * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be |
<> | 144:ef7eb2e8f9f7 | 17 | * used to endorse or promote products derived from this software without specific prior |
<> | 144:ef7eb2e8f9f7 | 18 | * written permission. |
<> | 144:ef7eb2e8f9f7 | 19 | * |
<> | 144:ef7eb2e8f9f7 | 20 | * 4. This software, with or without modification, must only be used with a |
<> | 144:ef7eb2e8f9f7 | 21 | * Nordic Semiconductor ASA integrated circuit. |
<> | 144:ef7eb2e8f9f7 | 22 | * |
<> | 144:ef7eb2e8f9f7 | 23 | * 5. Any software provided in binary or object form under this license must not be reverse |
<> | 144:ef7eb2e8f9f7 | 24 | * engineered, decompiled, modified and/or disassembled. |
<> | 144:ef7eb2e8f9f7 | 25 | * |
<> | 144:ef7eb2e8f9f7 | 26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
<> | 144:ef7eb2e8f9f7 | 27 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
<> | 144:ef7eb2e8f9f7 | 28 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 29 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
<> | 144:ef7eb2e8f9f7 | 30 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
<> | 144:ef7eb2e8f9f7 | 31 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
<> | 144:ef7eb2e8f9f7 | 32 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
<> | 144:ef7eb2e8f9f7 | 33 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
<> | 144:ef7eb2e8f9f7 | 34 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
<> | 144:ef7eb2e8f9f7 | 35 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 36 | * |
<> | 144:ef7eb2e8f9f7 | 37 | */ |
<> | 144:ef7eb2e8f9f7 | 38 | |
<> | 144:ef7eb2e8f9f7 | 39 | #include "port_api.h" |
<> | 144:ef7eb2e8f9f7 | 40 | #include "pinmap.h" |
<> | 144:ef7eb2e8f9f7 | 41 | #include "gpio_api.h" |
<> | 144:ef7eb2e8f9f7 | 42 | |
<> | 144:ef7eb2e8f9f7 | 43 | PinName port_pin(PortName port, int pin_n) |
<> | 144:ef7eb2e8f9f7 | 44 | { |
<> | 144:ef7eb2e8f9f7 | 45 | (void) port; |
<> | 144:ef7eb2e8f9f7 | 46 | return (PinName)(pin_n); |
<> | 144:ef7eb2e8f9f7 | 47 | } |
<> | 144:ef7eb2e8f9f7 | 48 | |
<> | 144:ef7eb2e8f9f7 | 49 | void port_init(port_t *obj, PortName port, int mask, PinDirection dir) |
<> | 144:ef7eb2e8f9f7 | 50 | { |
<> | 144:ef7eb2e8f9f7 | 51 | obj->port = port; |
<> | 144:ef7eb2e8f9f7 | 52 | obj->mask = mask; |
<> | 144:ef7eb2e8f9f7 | 53 | |
<> | 144:ef7eb2e8f9f7 | 54 | obj->reg_out = &NRF_GPIO->OUT; |
<> | 144:ef7eb2e8f9f7 | 55 | obj->reg_in = &NRF_GPIO->IN; |
<> | 144:ef7eb2e8f9f7 | 56 | obj->reg_cnf = NRF_GPIO->PIN_CNF; |
<> | 144:ef7eb2e8f9f7 | 57 | |
<> | 144:ef7eb2e8f9f7 | 58 | port_dir(obj, dir); |
<> | 144:ef7eb2e8f9f7 | 59 | } |
<> | 144:ef7eb2e8f9f7 | 60 | |
<> | 144:ef7eb2e8f9f7 | 61 | void port_mode(port_t *obj, PinMode mode) |
<> | 144:ef7eb2e8f9f7 | 62 | { |
<> | 144:ef7eb2e8f9f7 | 63 | uint32_t i; |
<> | 144:ef7eb2e8f9f7 | 64 | // The mode is set per pin: reuse pinmap logic |
<> | 144:ef7eb2e8f9f7 | 65 | for (i = 0; i<31; i++) { |
<> | 144:ef7eb2e8f9f7 | 66 | if (obj->mask & (1 << i)) { |
<> | 144:ef7eb2e8f9f7 | 67 | pin_mode(port_pin(obj->port, i), mode); |
<> | 144:ef7eb2e8f9f7 | 68 | } |
<> | 144:ef7eb2e8f9f7 | 69 | } |
<> | 144:ef7eb2e8f9f7 | 70 | } |
<> | 144:ef7eb2e8f9f7 | 71 | |
<> | 144:ef7eb2e8f9f7 | 72 | void port_dir(port_t *obj, PinDirection dir) |
<> | 144:ef7eb2e8f9f7 | 73 | { |
<> | 144:ef7eb2e8f9f7 | 74 | int i; |
<> | 144:ef7eb2e8f9f7 | 75 | switch (dir) { |
<> | 144:ef7eb2e8f9f7 | 76 | case PIN_INPUT: |
<> | 144:ef7eb2e8f9f7 | 77 | for (i = 0; i<31; i++) { |
<> | 144:ef7eb2e8f9f7 | 78 | if (obj->mask & (1 << i)) { |
<> | 144:ef7eb2e8f9f7 | 79 | obj->reg_cnf[i] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
<> | 144:ef7eb2e8f9f7 | 80 | | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
<> | 144:ef7eb2e8f9f7 | 81 | | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
<> | 144:ef7eb2e8f9f7 | 82 | | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos); |
<> | 144:ef7eb2e8f9f7 | 83 | } |
<> | 144:ef7eb2e8f9f7 | 84 | } |
<> | 144:ef7eb2e8f9f7 | 85 | break; |
<> | 144:ef7eb2e8f9f7 | 86 | case PIN_OUTPUT: |
<> | 144:ef7eb2e8f9f7 | 87 | for (i = 0; i<31; i++) { |
<> | 144:ef7eb2e8f9f7 | 88 | if (obj->mask & (1 << i)) { |
<> | 144:ef7eb2e8f9f7 | 89 | obj->reg_cnf[i] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
<> | 144:ef7eb2e8f9f7 | 90 | | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
<> | 144:ef7eb2e8f9f7 | 91 | | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
<> | 144:ef7eb2e8f9f7 | 92 | | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
<> | 144:ef7eb2e8f9f7 | 93 | | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); |
<> | 144:ef7eb2e8f9f7 | 94 | } |
<> | 144:ef7eb2e8f9f7 | 95 | } |
<> | 144:ef7eb2e8f9f7 | 96 | break; |
<> | 144:ef7eb2e8f9f7 | 97 | } |
<> | 144:ef7eb2e8f9f7 | 98 | } |
<> | 144:ef7eb2e8f9f7 | 99 | |
<> | 144:ef7eb2e8f9f7 | 100 | void port_write(port_t *obj, int value) |
<> | 144:ef7eb2e8f9f7 | 101 | { |
<> | 144:ef7eb2e8f9f7 | 102 | *obj->reg_out = value; |
<> | 144:ef7eb2e8f9f7 | 103 | } |
<> | 144:ef7eb2e8f9f7 | 104 | |
<> | 144:ef7eb2e8f9f7 | 105 | int port_read(port_t *obj) |
<> | 144:ef7eb2e8f9f7 | 106 | { |
<> | 144:ef7eb2e8f9f7 | 107 | return (*obj->reg_in); |
<> | 144:ef7eb2e8f9f7 | 108 | } |