Fawwaz Nadzmy / mbed-STM

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by mbed official

targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_ARM_STD/startup_MAX32620.S@153:9398a535854b, 2016-12-22 (annotated)

Committer:
fwndz
Date:
Thu Dec 22 05:12:40 2016 +0000
Revision:
153:9398a535854b
Parent:
151:5eaa88a5bcc7 
device target maximize

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 ;*******************************************************************************
<> 149:156823d33999 2 ; Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 149:156823d33999 3 ;
<> 149:156823d33999 4 ; Permission is hereby granted, free of charge, to any person obtaining a
<> 149:156823d33999 5 ; copy of this software and associated documentation files (the "Software"),
<> 149:156823d33999 6 ; to deal in the Software without restriction, including without limitation
<> 149:156823d33999 7 ; the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 149:156823d33999 8 ; and/or sell copies of the Software, and to permit persons to whom the
<> 149:156823d33999 9 ; Software is furnished to do so, subject to the following conditions:
<> 149:156823d33999 10 ;
<> 149:156823d33999 11 ; The above copyright notice and this permission notice shall be included
<> 149:156823d33999 12 ; in all copies or substantial portions of the Software.
<> 149:156823d33999 13 ;
<> 149:156823d33999 14 ; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 149:156823d33999 15 ; OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 149:156823d33999 16 ; MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 149:156823d33999 17 ; IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 149:156823d33999 18 ; OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 149:156823d33999 19 ; ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 149:156823d33999 20 ; OTHER DEALINGS IN THE SOFTWARE.
<> 149:156823d33999 21 ;
<> 149:156823d33999 22 ; Except as contained in this notice, the name of Maxim Integrated
<> 149:156823d33999 23 ; Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 149:156823d33999 24 ; Products, Inc. Branding Policy.
<> 149:156823d33999 25 ;
<> 149:156823d33999 26 ; The mere transfer of this software does not imply any licenses
<> 149:156823d33999 27 ; of trade secrets, proprietary technology, copyrights, patents,
<> 149:156823d33999 28 ; trademarks, maskwork rights, or any other form of intellectual
<> 149:156823d33999 29 ; property whatsoever. Maxim Integrated Products, Inc. retains all
<> 149:156823d33999 30 ; ownership rights.
<> 149:156823d33999 31 ;*******************************************************************************
<> 149:156823d33999 32
<> 149:156823d33999 33 __initial_sp EQU 0x20040000 ; Top of RAM
<> 149:156823d33999 34
<> 149:156823d33999 35 PRESERVE8
<> 149:156823d33999 36 THUMB
<> 149:156823d33999 37
<> 149:156823d33999 38
<> 149:156823d33999 39 ; Vector Table Mapped to Address 0 at Reset
<> 149:156823d33999 40
<> 149:156823d33999 41 AREA RESET, DATA, READONLY
<> 149:156823d33999 42 EXPORT __Vectors
<> 149:156823d33999 43 EXPORT __Vectors_End
<> 149:156823d33999 44 EXPORT __Vectors_Size
<> 149:156823d33999 45
<> 149:156823d33999 46 __Vectors DCD __initial_sp ; Top of Stack
<> 149:156823d33999 47 DCD Reset_Handler ; Reset Handler
<> 149:156823d33999 48 DCD NMI_Handler ; NMI Handler
<> 149:156823d33999 49 DCD HardFault_Handler ; Hard Fault Handler
<> 149:156823d33999 50 DCD MemManage_Handler ; MPU Fault Handler
<> 149:156823d33999 51 DCD BusFault_Handler ; Bus Fault Handler
<> 149:156823d33999 52 DCD UsageFault_Handler ; Usage Fault Handler
<> 149:156823d33999 53 DCD 0 ; Reserved
<> 149:156823d33999 54 DCD 0 ; Reserved
<> 149:156823d33999 55 DCD 0 ; Reserved
<> 149:156823d33999 56 DCD 0 ; Reserved
<> 149:156823d33999 57 DCD SVC_Handler ; SVCall Handler
<> 149:156823d33999 58 DCD DebugMon_Handler ; Debug Monitor Handler
<> 149:156823d33999 59 DCD 0 ; Reserved
<> 149:156823d33999 60 DCD PendSV_Handler ; PendSV Handler
<> 149:156823d33999 61 DCD SysTick_Handler ; SysTick Handler
<> 149:156823d33999 62
<> 149:156823d33999 63 ; Maxim 32620 Externals interrupts
<> 151:5eaa88a5bcc7 64 DCD CLKMAN_IRQHandler ; 16:01 CLKMAN
<> 151:5eaa88a5bcc7 65 DCD PWRMAN_IRQHandler ; 17:02 PWRMAN
<> 151:5eaa88a5bcc7 66 DCD FLC_IRQHandler ; 18:03 Flash Controller
<> 151:5eaa88a5bcc7 67 DCD RTC0_IRQHandler ; 19:04 RTC INT0
<> 151:5eaa88a5bcc7 68 DCD RTC1_IRQHandler ; 20:05 RTC INT1
<> 151:5eaa88a5bcc7 69 DCD RTC2_IRQHandler ; 21:06 RTC INT2
<> 151:5eaa88a5bcc7 70 DCD RTC3_IRQHandler ; 22:07 RTC INT3
<> 151:5eaa88a5bcc7 71 DCD PMU_IRQHandler ; 23:08 PMU
<> 151:5eaa88a5bcc7 72 DCD USB_IRQHandler ; 24:09 USB
<> 151:5eaa88a5bcc7 73 DCD AES_IRQHandler ; 25:10 AES
<> 151:5eaa88a5bcc7 74 DCD MAA_IRQHandler ; 26:11 MAA
<> 151:5eaa88a5bcc7 75 DCD WDT0_IRQHandler ; 27:12 WATCHDOG0
<> 151:5eaa88a5bcc7 76 DCD WDT0_P_IRQHandler ; 28:13 WATCHDOG0 PRE-WINDOW
<> 151:5eaa88a5bcc7 77 DCD WDT1_IRQHandler ; 29:14 WATCHDOG1
<> 151:5eaa88a5bcc7 78 DCD WDT1_P_IRQHandler ; 30:15 WATCHDOG1 PRE-WINDOW
<> 151:5eaa88a5bcc7 79 DCD GPIO_P0_IRQHandler ; 31:16 GPIO Port 0
<> 151:5eaa88a5bcc7 80 DCD GPIO_P1_IRQHandler ; 32:17 GPIO Port 1
<> 151:5eaa88a5bcc7 81 DCD GPIO_P2_IRQHandler ; 33:18 GPIO Port 2
<> 151:5eaa88a5bcc7 82 DCD GPIO_P3_IRQHandler ; 34:19 GPIO Port 3
<> 151:5eaa88a5bcc7 83 DCD GPIO_P4_IRQHandler ; 35:20 GPIO Port 4
<> 151:5eaa88a5bcc7 84 DCD GPIO_P5_IRQHandler ; 36:21 GPIO Port 5
<> 151:5eaa88a5bcc7 85 DCD GPIO_P6_IRQHandler ; 37:22 GPIO Port 6
<> 151:5eaa88a5bcc7 86 DCD TMR0_IRQHandler ; 38:23 Timer32-0
<> 151:5eaa88a5bcc7 87 DCD TMR16_0_IRQHandler ; 39:24 Timer16-s0
<> 151:5eaa88a5bcc7 88 DCD TMR1_IRQHandler ; 40:25 Timer32-1
<> 151:5eaa88a5bcc7 89 DCD TMR16_1_IRQHandler ; 41:26 Timer16-s1
<> 151:5eaa88a5bcc7 90 DCD TMR2_IRQHandler ; 42:27 Timer32-2
<> 151:5eaa88a5bcc7 91 DCD TMR16_2_IRQHandler ; 43:28 Timer16-s2
<> 151:5eaa88a5bcc7 92 DCD TMR3_IRQHandler ; 44:29 Timer32-3
<> 151:5eaa88a5bcc7 93 DCD TMR16_3_IRQHandler ; 45:30 Timer16-s3
<> 151:5eaa88a5bcc7 94 DCD TMR4_IRQHandler ; 46:31 Timer32-4
<> 151:5eaa88a5bcc7 95 DCD TMR16_4_IRQHandler ; 47:32 Timer16-s4
<> 151:5eaa88a5bcc7 96 DCD TMR5_IRQHandler ; 48:33 Timer32-5
<> 151:5eaa88a5bcc7 97 DCD TMR16_5_IRQHandler ; 49:34 Timer16-s5
<> 151:5eaa88a5bcc7 98 DCD UART0_IRQHandler ; 50:35 UART0
<> 151:5eaa88a5bcc7 99 DCD UART1_IRQHandler ; 51:36 UART1
<> 151:5eaa88a5bcc7 100 DCD UART2_IRQHandler ; 52:37 UART0
<> 151:5eaa88a5bcc7 101 DCD UART3_IRQHandler ; 53:38 UART1
<> 151:5eaa88a5bcc7 102 DCD PT_IRQHandler ; 54:39 PT
<> 151:5eaa88a5bcc7 103 DCD I2CM0_IRQHandler ; 55:40 I2C Master 0
<> 151:5eaa88a5bcc7 104 DCD I2CM1_IRQHandler ; 56:41 I2C Master 1
<> 151:5eaa88a5bcc7 105 DCD I2CM2_IRQHandler ; 57:42 I2C Master 2
<> 151:5eaa88a5bcc7 106 DCD I2CS_IRQHandler ; 58:43 I2C Slave
<> 151:5eaa88a5bcc7 107 DCD SPI0_IRQHandler ; 59:44 SPI0
<> 151:5eaa88a5bcc7 108 DCD SPI1_IRQHandler ; 60:45 SPI1
<> 151:5eaa88a5bcc7 109 DCD SPI2_IRQHandler ; 61:46 SPI2
<> 151:5eaa88a5bcc7 110 DCD SPIB_IRQHandler ; 62:47 SPI Bridge
<> 151:5eaa88a5bcc7 111 DCD OWM_IRQHandler ; 63:48 1-Wire Master
<> 151:5eaa88a5bcc7 112 DCD AFE_IRQHandler ; 64:49 AFE
<> 149:156823d33999 113
<> 149:156823d33999 114 __Vectors_End
<> 149:156823d33999 115
<> 149:156823d33999 116 __Vectors_Size EQU __Vectors_End - __Vectors
<> 149:156823d33999 117
<> 149:156823d33999 118 AREA |.text|, CODE, READONLY
<> 149:156823d33999 119
<> 149:156823d33999 120 Reset_Handler PROC
<> 149:156823d33999 121 EXPORT Reset_Handler [WEAK]
<> 149:156823d33999 122 IMPORT SystemInit
<> 149:156823d33999 123 IMPORT __main
<> 149:156823d33999 124 LDR R0, =SystemInit
<> 149:156823d33999 125 BLX R0
<> 149:156823d33999 126 LDR R0, =__main
<> 149:156823d33999 127 BX R0
<> 149:156823d33999 128 ENDP
<> 149:156823d33999 129
<> 149:156823d33999 130 ; Dummy Exception Handlers (infinite loops which can be modified)
<> 149:156823d33999 131
<> 149:156823d33999 132 NMI_Handler PROC
<> 149:156823d33999 133 EXPORT NMI_Handler [WEAK]
<> 149:156823d33999 134 B NMI_Handler
<> 149:156823d33999 135 ENDP
<> 149:156823d33999 136
<> 149:156823d33999 137 HardFault_Handler PROC
<> 149:156823d33999 138 EXPORT HardFault_Handler [WEAK]
<> 149:156823d33999 139 B HardFault_Handler
<> 149:156823d33999 140 ENDP
<> 149:156823d33999 141
<> 149:156823d33999 142 MemManage_Handler PROC
<> 149:156823d33999 143 EXPORT MemManage_Handler [WEAK]
<> 149:156823d33999 144 B MemManage_Handler
<> 149:156823d33999 145 ENDP
<> 149:156823d33999 146
<> 149:156823d33999 147 BusFault_Handler PROC
<> 149:156823d33999 148 EXPORT BusFault_Handler [WEAK]
<> 149:156823d33999 149 B BusFault_Handler
<> 149:156823d33999 150 ENDP
<> 149:156823d33999 151
<> 149:156823d33999 152 UsageFault_Handler PROC
<> 149:156823d33999 153 EXPORT UsageFault_Handler [WEAK]
<> 149:156823d33999 154 B UsageFault_Handler
<> 149:156823d33999 155 ENDP
<> 149:156823d33999 156
<> 149:156823d33999 157 SVC_Handler PROC
<> 149:156823d33999 158 EXPORT SVC_Handler [WEAK]
<> 149:156823d33999 159 B SVC_Handler
<> 149:156823d33999 160 ENDP
<> 149:156823d33999 161
<> 149:156823d33999 162 DebugMon_Handler PROC
<> 149:156823d33999 163 EXPORT DebugMon_Handler [WEAK]
<> 149:156823d33999 164 B DebugMon_Handler
<> 149:156823d33999 165 ENDP
<> 149:156823d33999 166
<> 149:156823d33999 167 PendSV_Handler PROC
<> 149:156823d33999 168 EXPORT PendSV_Handler [WEAK]
<> 149:156823d33999 169 B PendSV_Handler
<> 149:156823d33999 170 ENDP
<> 149:156823d33999 171
<> 149:156823d33999 172 SysTick_Handler PROC
<> 149:156823d33999 173 EXPORT SysTick_Handler [WEAK]
<> 149:156823d33999 174 B SysTick_Handler
<> 149:156823d33999 175 ENDP
<> 149:156823d33999 176
<> 149:156823d33999 177 Default_Handler PROC
<> 149:156823d33999 178
<> 149:156823d33999 179 EXPORT CLKMAN_IRQHandler [WEAK]
<> 149:156823d33999 180 EXPORT PWRMAN_IRQHandler [WEAK]
<> 149:156823d33999 181 EXPORT FLC_IRQHandler [WEAK]
<> 149:156823d33999 182 EXPORT RTC0_IRQHandler [WEAK]
<> 149:156823d33999 183 EXPORT RTC1_IRQHandler [WEAK]
<> 149:156823d33999 184 EXPORT RTC2_IRQHandler [WEAK]
<> 149:156823d33999 185 EXPORT RTC3_IRQHandler [WEAK]
<> 149:156823d33999 186 EXPORT PMU_IRQHandler [WEAK]
<> 149:156823d33999 187 EXPORT USB_IRQHandler [WEAK]
<> 149:156823d33999 188 EXPORT AES_IRQHandler [WEAK]
<> 149:156823d33999 189 EXPORT MAA_IRQHandler [WEAK]
<> 149:156823d33999 190 EXPORT WDT0_IRQHandler [WEAK]
<> 149:156823d33999 191 EXPORT WDT0_P_IRQHandler [WEAK]
<> 149:156823d33999 192 EXPORT WDT1_IRQHandler [WEAK]
<> 149:156823d33999 193 EXPORT WDT1_P_IRQHandler [WEAK]
<> 149:156823d33999 194 EXPORT GPIO_P0_IRQHandler [WEAK]
<> 149:156823d33999 195 EXPORT GPIO_P1_IRQHandler [WEAK]
<> 149:156823d33999 196 EXPORT GPIO_P2_IRQHandler [WEAK]
<> 149:156823d33999 197 EXPORT GPIO_P3_IRQHandler [WEAK]
<> 149:156823d33999 198 EXPORT GPIO_P4_IRQHandler [WEAK]
<> 149:156823d33999 199 EXPORT GPIO_P5_IRQHandler [WEAK]
<> 149:156823d33999 200 EXPORT GPIO_P6_IRQHandler [WEAK]
<> 149:156823d33999 201 EXPORT TMR0_IRQHandler [WEAK]
<> 149:156823d33999 202 EXPORT TMR16_0_IRQHandler [WEAK]
<> 149:156823d33999 203 EXPORT TMR1_IRQHandler [WEAK]
<> 149:156823d33999 204 EXPORT TMR16_1_IRQHandler [WEAK]
<> 149:156823d33999 205 EXPORT TMR2_IRQHandler [WEAK]
<> 149:156823d33999 206 EXPORT TMR16_2_IRQHandler [WEAK]
<> 149:156823d33999 207 EXPORT TMR3_IRQHandler [WEAK]
<> 149:156823d33999 208 EXPORT TMR16_3_IRQHandler [WEAK]
<> 149:156823d33999 209 EXPORT TMR4_IRQHandler [WEAK]
<> 149:156823d33999 210 EXPORT TMR16_4_IRQHandler [WEAK]
<> 149:156823d33999 211 EXPORT TMR5_IRQHandler [WEAK]
<> 149:156823d33999 212 EXPORT TMR16_5_IRQHandler [WEAK]
<> 149:156823d33999 213 EXPORT UART0_IRQHandler [WEAK]
<> 149:156823d33999 214 EXPORT UART1_IRQHandler [WEAK]
<> 149:156823d33999 215 EXPORT UART2_IRQHandler [WEAK]
<> 149:156823d33999 216 EXPORT UART3_IRQHandler [WEAK]
<> 149:156823d33999 217 EXPORT PT_IRQHandler [WEAK]
<> 149:156823d33999 218 EXPORT I2CM0_IRQHandler [WEAK]
<> 149:156823d33999 219 EXPORT I2CM1_IRQHandler [WEAK]
<> 149:156823d33999 220 EXPORT I2CM2_IRQHandler [WEAK]
<> 149:156823d33999 221 EXPORT I2CS_IRQHandler [WEAK]
<> 149:156823d33999 222 EXPORT SPI0_IRQHandler [WEAK]
<> 149:156823d33999 223 EXPORT SPI1_IRQHandler [WEAK]
<> 149:156823d33999 224 EXPORT SPI2_IRQHandler [WEAK]
<> 149:156823d33999 225 EXPORT SPIB_IRQHandler [WEAK]
<> 149:156823d33999 226 EXPORT OWM_IRQHandler [WEAK]
<> 149:156823d33999 227 EXPORT AFE_IRQHandler [WEAK]
<> 149:156823d33999 228
<> 149:156823d33999 229 CLKMAN_IRQHandler
<> 149:156823d33999 230 PWRMAN_IRQHandler
<> 149:156823d33999 231 FLC_IRQHandler
<> 149:156823d33999 232 RTC0_IRQHandler
<> 149:156823d33999 233 RTC1_IRQHandler
<> 149:156823d33999 234 RTC2_IRQHandler
<> 149:156823d33999 235 RTC3_IRQHandler
<> 149:156823d33999 236 PMU_IRQHandler
<> 149:156823d33999 237 USB_IRQHandler
<> 149:156823d33999 238 AES_IRQHandler
<> 149:156823d33999 239 MAA_IRQHandler
<> 149:156823d33999 240 WDT0_IRQHandler
<> 149:156823d33999 241 WDT0_P_IRQHandler
<> 149:156823d33999 242 WDT1_IRQHandler
<> 149:156823d33999 243 WDT1_P_IRQHandler
<> 149:156823d33999 244 GPIO_P0_IRQHandler
<> 149:156823d33999 245 GPIO_P1_IRQHandler
<> 149:156823d33999 246 GPIO_P2_IRQHandler
<> 149:156823d33999 247 GPIO_P3_IRQHandler
<> 149:156823d33999 248 GPIO_P4_IRQHandler
<> 149:156823d33999 249 GPIO_P5_IRQHandler
<> 149:156823d33999 250 GPIO_P6_IRQHandler
<> 149:156823d33999 251 TMR0_IRQHandler
<> 149:156823d33999 252 TMR16_0_IRQHandler
<> 149:156823d33999 253 TMR1_IRQHandler
<> 149:156823d33999 254 TMR16_1_IRQHandler
<> 149:156823d33999 255 TMR2_IRQHandler
<> 149:156823d33999 256 TMR16_2_IRQHandler
<> 149:156823d33999 257 TMR3_IRQHandler
<> 149:156823d33999 258 TMR16_3_IRQHandler
<> 149:156823d33999 259 TMR4_IRQHandler
<> 149:156823d33999 260 TMR16_4_IRQHandler
<> 149:156823d33999 261 TMR5_IRQHandler
<> 149:156823d33999 262 TMR16_5_IRQHandler
<> 149:156823d33999 263 UART0_IRQHandler
<> 149:156823d33999 264 UART1_IRQHandler
<> 149:156823d33999 265 UART2_IRQHandler
<> 149:156823d33999 266 UART3_IRQHandler
<> 149:156823d33999 267 PT_IRQHandler
<> 149:156823d33999 268 I2CM0_IRQHandler
<> 149:156823d33999 269 I2CM1_IRQHandler
<> 149:156823d33999 270 I2CM2_IRQHandler
<> 149:156823d33999 271 I2CS_IRQHandler
<> 149:156823d33999 272 SPI0_IRQHandler
<> 149:156823d33999 273 SPI1_IRQHandler
<> 149:156823d33999 274 SPI2_IRQHandler
<> 149:156823d33999 275 SPIB_IRQHandler
<> 149:156823d33999 276 OWM_IRQHandler
<> 149:156823d33999 277 AFE_IRQHandler
<> 149:156823d33999 278
<> 149:156823d33999 279 B .
<> 149:156823d33999 280 ENDP
<> 149:156823d33999 281 ALIGN
<> 149:156823d33999 282 END