Target_LPC4088.cpp

00001 /**
00002  * @file
00003  * LPC176xのターゲットテーブルです。
00004  */
00005 #include "TargetTypes.h"
00006 #include "RpcHandlerBase.h"
00007 #ifdef TARGET_LPC4088
00008 namespace MiMic
00009 {
00010 
00011 #define NS_LPC_PIN_0    PINID_LPC
00012 #define NS_LPC_PIN_1    (NS_LPC_PIN_0+32)
00013 #define NS_LPC_PIN_2    (NS_LPC_PIN_1+32)
00014 #define NS_LPC_PIN_3    (NS_LPC_PIN_2+32)
00015 #define NS_LPC_PIN_4    (NS_LPC_PIN_3+32)
00016 #define NS_LPC_PIN_5    (NS_LPC_PIN_4+32)
00017 
00018 const static struct TPinNameMapItem pin_table[]={
00019     {P0_0   ,NS_LPC_PIN_0+0},   {P0_1   ,NS_LPC_PIN_0+1},   {P0_2   ,NS_LPC_PIN_0+2},   {P0_3   ,NS_LPC_PIN_0+3},
00020     {P0_4   ,NS_LPC_PIN_0+4},   {P0_5   ,NS_LPC_PIN_0+5},   {P0_6   ,NS_LPC_PIN_0+6},   {P0_7   ,NS_LPC_PIN_0+7},
00021     {P0_8   ,NS_LPC_PIN_0+8},   {P0_9   ,NS_LPC_PIN_0+9},   {P0_10  ,NS_LPC_PIN_0+10},  {P0_11  ,NS_LPC_PIN_0+11},
00022     {P0_12  ,NS_LPC_PIN_0+12},  {P0_13  ,NS_LPC_PIN_0+13},  {P0_14  ,NS_LPC_PIN_0+14},  {P0_15  ,NS_LPC_PIN_0+15},
00023     {P0_16  ,NS_LPC_PIN_0+16},  {P0_17  ,NS_LPC_PIN_0+17},  {P0_18  ,NS_LPC_PIN_0+18},  {P0_19  ,NS_LPC_PIN_0+19},
00024     {P0_20  ,NS_LPC_PIN_0+20},  {P0_21  ,NS_LPC_PIN_0+21},  {P0_22  ,NS_LPC_PIN_0+22},  {P0_23  ,NS_LPC_PIN_0+23},
00025     {P0_24  ,NS_LPC_PIN_0+24},  {P0_25  ,NS_LPC_PIN_0+25},  {P0_26  ,NS_LPC_PIN_0+26},  {P0_27  ,NS_LPC_PIN_0+27},
00026     {P0_28  ,NS_LPC_PIN_0+28},  {P0_29  ,NS_LPC_PIN_0+29},  {P0_30  ,NS_LPC_PIN_0+30},  {P0_31  ,NS_LPC_PIN_0+31},
00027 
00028     {P1_0   ,NS_LPC_PIN_1+0},   {P1_1   ,NS_LPC_PIN_1+1},   {P1_2   ,NS_LPC_PIN_1+2},   {P1_3   ,NS_LPC_PIN_1+3},
00029     {P1_4   ,NS_LPC_PIN_1+4},   {P1_5   ,NS_LPC_PIN_1+5},   {P1_6   ,NS_LPC_PIN_1+6},   {P1_7   ,NS_LPC_PIN_1+7},
00030     {P1_8   ,NS_LPC_PIN_1+8},   {P1_9   ,NS_LPC_PIN_1+9},   {P1_10  ,NS_LPC_PIN_1+10},  {P1_11  ,NS_LPC_PIN_1+11},
00031     {P1_12  ,NS_LPC_PIN_1+12},  {P1_13  ,NS_LPC_PIN_1+13},  {P1_14  ,NS_LPC_PIN_1+14},  {P1_15  ,NS_LPC_PIN_1+15},
00032     {P1_16  ,NS_LPC_PIN_1+16},  {P1_17  ,NS_LPC_PIN_1+17},  {P1_18  ,NS_LPC_PIN_1+18},  {P1_19  ,NS_LPC_PIN_1+19},
00033     {P1_20  ,NS_LPC_PIN_1+20},  {P1_21  ,NS_LPC_PIN_1+21},  {P1_22  ,NS_LPC_PIN_1+22},  {P1_23  ,NS_LPC_PIN_1+23},
00034     {P1_24  ,NS_LPC_PIN_1+24},  {P1_25  ,NS_LPC_PIN_1+25},  {P1_26  ,NS_LPC_PIN_1+26},  {P1_27  ,NS_LPC_PIN_1+27},
00035     {P1_28  ,NS_LPC_PIN_1+28},  {P1_29  ,NS_LPC_PIN_1+29},  {P1_30  ,NS_LPC_PIN_1+30},  {P1_31  ,NS_LPC_PIN_1+31},
00036 
00037     {P2_0   ,NS_LPC_PIN_2+0},   {P2_1   ,NS_LPC_PIN_2+1},   {P2_2   ,NS_LPC_PIN_2+2},   {P2_3   ,NS_LPC_PIN_2+3},
00038     {P2_4   ,NS_LPC_PIN_2+4},   {P2_5   ,NS_LPC_PIN_2+5},   {P2_6   ,NS_LPC_PIN_2+6},   {P2_7   ,NS_LPC_PIN_2+7},
00039     {P2_8   ,NS_LPC_PIN_2+8},   {P2_9   ,NS_LPC_PIN_2+9},   {P2_10  ,NS_LPC_PIN_2+10},  {P2_11  ,NS_LPC_PIN_2+11},
00040     {P2_12  ,NS_LPC_PIN_2+12},  {P2_13  ,NS_LPC_PIN_2+13},  {P2_14  ,NS_LPC_PIN_2+14},  {P2_15  ,NS_LPC_PIN_2+15},
00041     {P2_16  ,NS_LPC_PIN_2+16},  {P2_17  ,NS_LPC_PIN_2+17},  {P2_18  ,NS_LPC_PIN_2+18},  {P2_19  ,NS_LPC_PIN_2+19},
00042     {P2_20  ,NS_LPC_PIN_2+20},  {P2_21  ,NS_LPC_PIN_2+21},  {P2_22  ,NS_LPC_PIN_2+22},  {P2_23  ,NS_LPC_PIN_2+23},
00043     {P2_24  ,NS_LPC_PIN_2+24},  {P2_25  ,NS_LPC_PIN_2+25},  {P2_26  ,NS_LPC_PIN_2+26},  {P2_27  ,NS_LPC_PIN_2+27},
00044     {P2_28  ,NS_LPC_PIN_2+28},  {P2_29  ,NS_LPC_PIN_2+29},  {P2_30  ,NS_LPC_PIN_2+30},  {P2_31  ,NS_LPC_PIN_2+31},
00045 
00046     {P3_0   ,NS_LPC_PIN_2+0},   {P3_1   ,NS_LPC_PIN_2+1},   {P3_2   ,NS_LPC_PIN_2+2},   {P3_3   ,NS_LPC_PIN_2+3},
00047     {P3_4   ,NS_LPC_PIN_2+4},   {P3_5   ,NS_LPC_PIN_2+5},   {P3_6   ,NS_LPC_PIN_2+6},   {P3_7   ,NS_LPC_PIN_2+7},
00048     {P3_8   ,NS_LPC_PIN_2+8},   {P3_9   ,NS_LPC_PIN_2+9},   {P3_10  ,NS_LPC_PIN_2+10},  {P3_11  ,NS_LPC_PIN_2+11},
00049     {P3_12  ,NS_LPC_PIN_2+12},  {P3_13  ,NS_LPC_PIN_2+13},  {P3_14  ,NS_LPC_PIN_2+14},  {P3_15  ,NS_LPC_PIN_2+15},
00050     {P3_16  ,NS_LPC_PIN_2+16},  {P3_17  ,NS_LPC_PIN_2+17},  {P3_18  ,NS_LPC_PIN_2+18},  {P3_19  ,NS_LPC_PIN_2+19},
00051     {P3_20  ,NS_LPC_PIN_2+20},  {P3_21  ,NS_LPC_PIN_2+21},  {P3_22  ,NS_LPC_PIN_2+22},  {P3_23  ,NS_LPC_PIN_2+23},
00052     {P3_24  ,NS_LPC_PIN_2+24},  {P3_25  ,NS_LPC_PIN_2+25},  {P3_26  ,NS_LPC_PIN_2+26},  {P3_27  ,NS_LPC_PIN_2+27},
00053     {P3_28  ,NS_LPC_PIN_2+28},  {P3_29  ,NS_LPC_PIN_2+29},  {P3_30  ,NS_LPC_PIN_2+30},  {P3_31  ,NS_LPC_PIN_2+31},
00054     
00055     {P4_0   ,NS_LPC_PIN_4+0},   {P4_1   ,NS_LPC_PIN_4+1},   {P4_2   ,NS_LPC_PIN_4+2},   {P4_3   ,NS_LPC_PIN_4+3},
00056     {P4_4   ,NS_LPC_PIN_4+4},   {P4_5   ,NS_LPC_PIN_4+5},   {P4_6   ,NS_LPC_PIN_4+6},   {P4_7   ,NS_LPC_PIN_4+7},
00057     {P4_8   ,NS_LPC_PIN_4+8},   {P4_9   ,NS_LPC_PIN_4+9},   {P4_10  ,NS_LPC_PIN_4+10},  {P4_11  ,NS_LPC_PIN_4+11},
00058     {P4_12  ,NS_LPC_PIN_4+12},  {P4_13  ,NS_LPC_PIN_4+13},  {P4_14  ,NS_LPC_PIN_4+14},  {P4_15  ,NS_LPC_PIN_4+15},
00059     {P4_16  ,NS_LPC_PIN_4+16},  {P4_17  ,NS_LPC_PIN_4+17},  {P4_18  ,NS_LPC_PIN_4+18},  {P4_19  ,NS_LPC_PIN_4+19},
00060     {P4_20  ,NS_LPC_PIN_4+20},  {P4_21  ,NS_LPC_PIN_4+21},  {P4_22  ,NS_LPC_PIN_4+22},  {P4_23  ,NS_LPC_PIN_4+23},
00061     {P4_24  ,NS_LPC_PIN_4+24},  {P4_25  ,NS_LPC_PIN_4+25},  {P4_26  ,NS_LPC_PIN_4+26},  {P4_27  ,NS_LPC_PIN_4+27},
00062     {P4_28  ,NS_LPC_PIN_4+28},  {P4_29  ,NS_LPC_PIN_4+29},  {P4_30  ,NS_LPC_PIN_4+30},  {P4_31  ,NS_LPC_PIN_4+31},
00063 
00064     {P5_0   ,NS_LPC_PIN_5+0},   {P5_1   ,NS_LPC_PIN_5+1},   {P5_2   ,NS_LPC_PIN_5+2},   {P5_3   ,NS_LPC_PIN_5+3},
00065     {P5_4   ,NS_LPC_PIN_5+4},
00066 
00067     // mbed DIP Pin Names
00068     {P1_24,PINID_MBED_DIP+5},   {P1_23,PINID_MBED_DIP+6},   {P1_20,PINID_MBED_DIP+7},   {P0_21,PINID_MBED_DIP+8},
00069     {P0_0,PINID_MBED_DIP+9},    {P0_1,PINID_MBED_DIP+10},   {P0_9,PINID_MBED_DIP+11},   {P0_8,PINID_MBED_DIP+12},
00070     {P0_7,PINID_MBED_DIP+13},   {P0_6,PINID_MBED_DIP+14},   {P0_23,PINID_MBED_DIP+15},  {P0_24,PINID_MBED_DIP+16},
00071     {P0_25,PINID_MBED_DIP+17},  {P0_26,PINID_MBED_DIP+18},  {P1_30,PINID_MBED_DIP+19},  {P1_31,PINID_MBED_DIP+20},
00072 
00073     {P2_10,PINID_MBED_DIP+23},  {P1_12,PINID_MBED_DIP+24},  {P1_11,PINID_MBED_DIP+25},  {P1_7,PINID_MBED_DIP+26},
00074     {P1_6,PINID_MBED_DIP+27},   {P1_5,PINID_MBED_DIP+28},   {P1_3,PINID_MBED_DIP+29},   {P1_2,PINID_MBED_DIP+30},
00075     {P5_3,PINID_MBED_DIP+31},   {P5_2,PINID_MBED_DIP+32},   {P0_5,PINID_MBED_DIP+33},   {P0_4,PINID_MBED_DIP+34},
00076     {P5_4,PINID_MBED_DIP+37},   {P5_1,PINID_MBED_DIP+38},   {P5_0,PINID_MBED_DIP+39},
00077     
00078         
00079     // Other mbed Pin Names 
00080 
00081     {P1_18  ,PINID_OTHER_MBED_LEDx+0},  {P0_13  ,PINID_OTHER_MBED_LEDx+1},  {P1_13  ,PINID_OTHER_MBED_LEDx+2},  {P2_19  ,PINID_OTHER_MBED_LEDx+3},
00082 
00083     {P0_2,PINID_OTHER_MBED_USBx+0},{P0_3,PINID_OTHER_MBED_USBx+1},
00084 
00085     // Arch Pro Pin Names
00086     {p10,PINID_ARCH_PRO_Dx+0},  {p9,PINID_ARCH_PRO_Dx+1},   {p31,PINID_ARCH_PRO_Dx+2},  {p32,PINID_ARCH_PRO_Dx+3},
00087     {p33,PINID_ARCH_PRO_Dx+4},  {p37,PINID_ARCH_PRO_Dx+5},  {p38,PINID_ARCH_PRO_Dx+6},  {p34,PINID_ARCH_PRO_Dx+7},
00088     {p8,PINID_ARCH_PRO_Dx+8},   {p39,PINID_ARCH_PRO_Dx+9},  {p14,PINID_ARCH_PRO_Dx+10}, {p11,PINID_ARCH_PRO_Dx+11},
00089     {p12,PINID_ARCH_PRO_Dx+12}, {p13,PINID_ARCH_PRO_Dx+13}, {p19,PINID_ARCH_PRO_Dx+14}, {p20,PINID_ARCH_PRO_Dx+15},
00090     
00091     {p15,PINID_ARCH_PRO_Ax+0},  {p16,PINID_ARCH_PRO_Ax+1},  {p17,PINID_ARCH_PRO_Ax+2},  {p18,PINID_ARCH_PRO_Ax+3},
00092     {p19,PINID_ARCH_PRO_Ax+4},  {p20,PINID_ARCH_PRO_Ax+5},
00093  
00094     {NC,PINID_NC}
00095 };
00096 
00097 #define NUMBER_OF_PINMODE 5
00098 const static struct TPinModeMapItem pinmode_table[]=
00099 {
00100     {PullUp     ,PINMODEID+0},
00101     {PullDown   ,PINMODEID+1},
00102     {PullNone   ,PINMODEID+2},
00103     {OpenDrain  ,PINMODEID+3},
00104     {PullDefault,PINMODEID+1}
00105 };
00106 #define NUMBER_OF_PORT_NAME 6
00107 const static struct TPortNameMapItem portname_table[]=
00108 {
00109     {Port0  ,PORTID+0},
00110     {Port1  ,PORTID+1},
00111     {Port2  ,PORTID+2},
00112     {Port3  ,PORTID+3},
00113     {Port4  ,PORTID+4},
00114     {Port5  ,PORTID+5},
00115 };
00116 
00117 PinName RpcHandlerBase::pinId2PinName(unsigned int i_id)
00118 {
00119     for(int i=0;pin_table[i].name!=NC;i++){
00120         if(i_id==pin_table[i].id){
00121             return pin_table[i].name;
00122         }
00123     }
00124     return NC;
00125 }
00126 
00127 PinMode RpcHandlerBase::pinmodeId2PinMode(unsigned int i_id)
00128 {
00129     for(int i=0;i<NUMBER_OF_PINMODE;i++){
00130         if(i_id==pinmode_table[i].id){
00131             return pinmode_table[i].mode;
00132         }
00133     }
00134     return PullDefault;
00135 }
00136 PortName RpcHandlerBase::portId2PortName(unsigned int i_id)
00137 {
00138     for(int i=0;i<NUMBER_OF_PORT_NAME;i++){
00139         if(i_id==portname_table[i].id){
00140             return portname_table[i].port;
00141         }
00142     }
00143     return Port0;
00144 }
00145 
00146 }
00147 #endif
00148